1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022, NVIDIA Corporation.
6 #ifndef DRM_TEGRA_RISCV_H
7 #define DRM_TEGRA_RISCV_H
9 struct tegra_drm_riscv_descriptor {
17 struct tegra_drm_riscv {
18 /* User initializes */
22 struct tegra_drm_riscv_descriptor bl_desc;
23 struct tegra_drm_riscv_descriptor os_desc;
26 int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv);
27 int tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address,
28 u32 gscid, const struct tegra_drm_riscv_descriptor *desc);