drivers/gpu/drm/sti/sti_hdmi.c

   1 /*
   2  * Copyright (C) STMicroelectronics SA 2014
   3  * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
   4  * License terms:  GNU General Public License (GPL), version 2
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/component.h>
   9 #include <linux/hdmi.h>
  10 #include <linux/module.h>
  11 #include <linux/of_gpio.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/reset.h>
  14
  15 #include <drm/drmP.h>
  16 #include <drm/drm_atomic_helper.h>
  17 #include <drm/drm_crtc_helper.h>
  18 #include <drm/drm_edid.h>
  19
  20 #include "sti_hdmi.h"
  21 #include "sti_hdmi_tx3g4c28phy.h"
  22 #include "sti_hdmi_tx3g0c55phy.h"
  23 #include "sti_vtg.h"
  24
  25 #define HDMI_CFG                        0x0000
  26 #define HDMI_INT_EN                     0x0004
  27 #define HDMI_INT_STA                    0x0008
  28 #define HDMI_INT_CLR                    0x000C
  29 #define HDMI_STA                        0x0010
  30 #define HDMI_ACTIVE_VID_XMIN            0x0100
  31 #define HDMI_ACTIVE_VID_XMAX            0x0104
  32 #define HDMI_ACTIVE_VID_YMIN            0x0108
  33 #define HDMI_ACTIVE_VID_YMAX            0x010C
  34 #define HDMI_DFLT_CHL0_DAT              0x0110
  35 #define HDMI_DFLT_CHL1_DAT              0x0114
  36 #define HDMI_DFLT_CHL2_DAT              0x0118
  37 #define HDMI_SW_DI_1_HEAD_WORD          0x0210
  38 #define HDMI_SW_DI_1_PKT_WORD0          0x0214
  39 #define HDMI_SW_DI_1_PKT_WORD1          0x0218
  40 #define HDMI_SW_DI_1_PKT_WORD2          0x021C
  41 #define HDMI_SW_DI_1_PKT_WORD3          0x0220
  42 #define HDMI_SW_DI_1_PKT_WORD4          0x0224
  43 #define HDMI_SW_DI_1_PKT_WORD5          0x0228
  44 #define HDMI_SW_DI_1_PKT_WORD6          0x022C
  45 #define HDMI_SW_DI_CFG                  0x0230
  46 #define HDMI_SW_DI_2_HEAD_WORD          0x0600
  47 #define HDMI_SW_DI_2_PKT_WORD0          0x0604
  48 #define HDMI_SW_DI_2_PKT_WORD1          0x0608
  49 #define HDMI_SW_DI_2_PKT_WORD2          0x060C
  50 #define HDMI_SW_DI_2_PKT_WORD3          0x0610
  51 #define HDMI_SW_DI_2_PKT_WORD4          0x0614
  52 #define HDMI_SW_DI_2_PKT_WORD5          0x0618
  53 #define HDMI_SW_DI_2_PKT_WORD6          0x061C
  54 #define HDMI_SW_DI_3_HEAD_WORD          0x0620
  55 #define HDMI_SW_DI_3_PKT_WORD0          0x0624
  56 #define HDMI_SW_DI_3_PKT_WORD1          0x0628
  57 #define HDMI_SW_DI_3_PKT_WORD2          0x062C
  58 #define HDMI_SW_DI_3_PKT_WORD3          0x0630
  59 #define HDMI_SW_DI_3_PKT_WORD4          0x0634
  60 #define HDMI_SW_DI_3_PKT_WORD5          0x0638
  61 #define HDMI_SW_DI_3_PKT_WORD6          0x063C
  62
  63 #define HDMI_IFRAME_SLOT_AVI            1
  64 #define HDMI_IFRAME_SLOT_AUDIO          2
  65 #define HDMI_IFRAME_SLOT_VENDOR         3
  66
  67 #define  XCAT(prefix, x, suffix)        prefix ## x ## suffix
  68 #define  HDMI_SW_DI_N_HEAD_WORD(x)      XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
  69 #define  HDMI_SW_DI_N_PKT_WORD0(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
  70 #define  HDMI_SW_DI_N_PKT_WORD1(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
  71 #define  HDMI_SW_DI_N_PKT_WORD2(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
  72 #define  HDMI_SW_DI_N_PKT_WORD3(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
  73 #define  HDMI_SW_DI_N_PKT_WORD4(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
  74 #define  HDMI_SW_DI_N_PKT_WORD5(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
  75 #define  HDMI_SW_DI_N_PKT_WORD6(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
  76
  77 #define HDMI_SW_DI_MAX_WORD             7
  78
  79 #define HDMI_IFRAME_DISABLED            0x0
  80 #define HDMI_IFRAME_SINGLE_SHOT         0x1
  81 #define HDMI_IFRAME_FIELD               0x2
  82 #define HDMI_IFRAME_FRAME               0x3
  83 #define HDMI_IFRAME_MASK                0x3
  84 #define HDMI_IFRAME_CFG_DI_N(x, n)       ((x) << ((n-1)*4)) /* n from 1 to 6 */
  85
  86 #define HDMI_CFG_DEVICE_EN              BIT(0)
  87 #define HDMI_CFG_HDMI_NOT_DVI           BIT(1)
  88 #define HDMI_CFG_HDCP_EN                BIT(2)
  89 #define HDMI_CFG_ESS_NOT_OESS           BIT(3)
  90 #define HDMI_CFG_H_SYNC_POL_NEG         BIT(4)
  91 #define HDMI_CFG_SINK_TERM_DET_EN       BIT(5)
  92 #define HDMI_CFG_V_SYNC_POL_NEG         BIT(6)
  93 #define HDMI_CFG_422_EN                 BIT(8)
  94 #define HDMI_CFG_FIFO_OVERRUN_CLR       BIT(12)
  95 #define HDMI_CFG_FIFO_UNDERRUN_CLR      BIT(13)
  96 #define HDMI_CFG_SW_RST_EN              BIT(31)
  97
  98 #define HDMI_INT_GLOBAL                 BIT(0)
  99 #define HDMI_INT_SW_RST                 BIT(1)
 100 #define HDMI_INT_PIX_CAP                BIT(3)
 101 #define HDMI_INT_HOT_PLUG               BIT(4)
 102 #define HDMI_INT_DLL_LCK                BIT(5)
 103 #define HDMI_INT_NEW_FRAME              BIT(6)
 104 #define HDMI_INT_GENCTRL_PKT            BIT(7)
 105 #define HDMI_INT_SINK_TERM_PRESENT      BIT(11)
 106
 107 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
 108                         | HDMI_INT_DLL_LCK \
 109                         | HDMI_INT_HOT_PLUG \
 110                         | HDMI_INT_GLOBAL)
 111
 112 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
 113                         | HDMI_INT_GENCTRL_PKT \
 114                         | HDMI_INT_NEW_FRAME \
 115                         | HDMI_INT_DLL_LCK \
 116                         | HDMI_INT_HOT_PLUG \
 117                         | HDMI_INT_PIX_CAP \
 118                         | HDMI_INT_SW_RST \
 119                         | HDMI_INT_GLOBAL)
 120
 121 #define HDMI_STA_SW_RST                 BIT(1)
 122
 123 #define HDMI_INFOFRAME_HEADER_TYPE(x)    (((x) & 0xff) <<  0)
 124 #define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) <<  8)
 125 #define HDMI_INFOFRAME_HEADER_LEN(x)     (((x) & 0x0f) << 16)
 126
 127 struct sti_hdmi_connector {
 128         struct drm_connector drm_connector;
 129         struct drm_encoder *encoder;
 130         struct sti_hdmi *hdmi;
 131 };
 132
 133 #define to_sti_hdmi_connector(x) \
 134         container_of(x, struct sti_hdmi_connector, drm_connector)
 135
 136 u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
 137 {
 138         return readl(hdmi->regs + offset);
 139 }
 140
 141 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
 142 {
 143         writel(val, hdmi->regs + offset);
 144 }
 145
 146 /**
 147  * HDMI interrupt handler threaded
 148  *
 149  * @irq: irq number
 150  * @arg: connector structure
 151  */
 152 static irqreturn_t hdmi_irq_thread(int irq, void *arg)
 153 {
 154         struct sti_hdmi *hdmi = arg;
 155
 156         /* Hot plug/unplug IRQ */
 157         if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
 158                 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
 159                 if (hdmi->drm_dev)
 160                         drm_helper_hpd_irq_event(hdmi->drm_dev);
 161         }
 162
 163         /* Sw reset and PLL lock are exclusive so we can use the same
 164          * event to signal them
 165          */
 166         if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
 167                 hdmi->event_received = true;
 168                 wake_up_interruptible(&hdmi->wait_event);
 169         }
 170
 171         return IRQ_HANDLED;
 172 }
 173
 174 /**
 175  * HDMI interrupt handler
 176  *
 177  * @irq: irq number
 178  * @arg: connector structure
 179  */
 180 static irqreturn_t hdmi_irq(int irq, void *arg)
 181 {
 182         struct sti_hdmi *hdmi = arg;
 183
 184         /* read interrupt status */
 185         hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
 186
 187         /* clear interrupt status */
 188         hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
 189
 190         /* force sync bus write */
 191         hdmi_read(hdmi, HDMI_INT_STA);
 192
 193         return IRQ_WAKE_THREAD;
 194 }
 195
 196 /**
 197  * Set hdmi active area depending on the drm display mode selected
 198  *
 199  * @hdmi: pointer on the hdmi internal structure
 200  */
 201 static void hdmi_active_area(struct sti_hdmi *hdmi)
 202 {
 203         u32 xmin, xmax;
 204         u32 ymin, ymax;
 205
 206         xmin = sti_vtg_get_pixel_number(hdmi->mode, 1);
 207         xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay);
 208         ymin = sti_vtg_get_line_number(hdmi->mode, 0);
 209         ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
 210
 211         hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
 212         hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
 213         hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
 214         hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
 215 }
 216
 217 /**
 218  * Overall hdmi configuration
 219  *
 220  * @hdmi: pointer on the hdmi internal structure
 221  */
 222 static void hdmi_config(struct sti_hdmi *hdmi)
 223 {
 224         u32 conf;
 225
 226         DRM_DEBUG_DRIVER("\n");
 227
 228         /* Clear overrun and underrun fifo */
 229         conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
 230
 231         /* Enable HDMI mode not DVI */
 232         conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS;
 233
 234         /* Enable sink term detection */
 235         conf |= HDMI_CFG_SINK_TERM_DET_EN;
 236
 237         /* Set Hsync polarity */
 238         if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
 239                 DRM_DEBUG_DRIVER("H Sync Negative\n");
 240                 conf |= HDMI_CFG_H_SYNC_POL_NEG;
 241         }
 242
 243         /* Set Vsync polarity */
 244         if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
 245                 DRM_DEBUG_DRIVER("V Sync Negative\n");
 246                 conf |= HDMI_CFG_V_SYNC_POL_NEG;
 247         }
 248
 249         /* Enable HDMI */
 250         conf |= HDMI_CFG_DEVICE_EN;
 251
 252         hdmi_write(hdmi, conf, HDMI_CFG);
 253 }
 254
 255 /*
 256  * Helper to reset info frame
 257  *
 258  * @hdmi: pointer on the hdmi internal structure
 259  * @slot: infoframe to reset
 260  */
 261 static void hdmi_infoframe_reset(struct sti_hdmi *hdmi,
 262                                  u32 slot)
 263 {
 264         u32 val, i;
 265         u32 head_offset, pack_offset;
 266
 267         switch (slot) {
 268         case HDMI_IFRAME_SLOT_AVI:
 269                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
 270                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
 271                 break;
 272         case HDMI_IFRAME_SLOT_AUDIO:
 273                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
 274                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
 275                 break;
 276         case HDMI_IFRAME_SLOT_VENDOR:
 277                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
 278                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
 279                 break;
 280         default:
 281                 DRM_ERROR("unsupported infoframe slot: %#x\n", slot);
 282                 return;
 283         }
 284
 285         /* Disable transmission for the selected slot */
 286         val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
 287         val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
 288         hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
 289
 290         /* Reset info frame registers */
 291         hdmi_write(hdmi, 0x0, head_offset);
 292         for (i = 0; i < HDMI_SW_DI_MAX_WORD; i += sizeof(u32))
 293                 hdmi_write(hdmi, 0x0, pack_offset + i);
 294 }
 295
 296 /**
 297  * Helper to concatenate infoframe in 32 bits word
 298  *
 299  * @ptr: pointer on the hdmi internal structure
 300  * @data: infoframe to write
 301  * @size: size to write
 302  */
 303 static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size)
 304 {
 305         unsigned long value = 0;
 306         size_t i;
 307
 308         for (i = size; i > 0; i--)
 309                 value = (value << 8) | ptr[i - 1];
 310
 311         return value;
 312 }
 313
 314 /**
 315  * Helper to write info frame
 316  *
 317  * @hdmi: pointer on the hdmi internal structure
 318  * @data: infoframe to write
 319  * @size: size to write
 320  */
 321 static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi,
 322                                           const u8 *data,
 323                                           size_t size)
 324 {
 325         const u8 *ptr = data;
 326         u32 val, slot, mode, i;
 327         u32 head_offset, pack_offset;
 328
 329         switch (*ptr) {
 330         case HDMI_INFOFRAME_TYPE_AVI:
 331                 slot = HDMI_IFRAME_SLOT_AVI;
 332                 mode = HDMI_IFRAME_FIELD;
 333                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
 334                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
 335                 break;
 336         case HDMI_INFOFRAME_TYPE_AUDIO:
 337                 slot = HDMI_IFRAME_SLOT_AUDIO;
 338                 mode = HDMI_IFRAME_FRAME;
 339                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
 340                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
 341                 break;
 342         case HDMI_INFOFRAME_TYPE_VENDOR:
 343                 slot = HDMI_IFRAME_SLOT_VENDOR;
 344                 mode = HDMI_IFRAME_FRAME;
 345                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
 346                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
 347                 break;
 348         default:
 349                 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr);
 350                 return;
 351         }
 352
 353         /* Disable transmission slot for updated infoframe */
 354         val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
 355         val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
 356         hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
 357
 358         val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++);
 359         val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++);
 360         val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++);
 361         writel(val, hdmi->regs + head_offset);
 362
 363         /*
 364          * Each subpack contains 4 bytes
 365          * The First Bytes of the first subpacket must contain the checksum
 366          * Packet size is increase by one.
 367          */
 368         size = size - HDMI_INFOFRAME_HEADER_SIZE + 1;
 369         for (i = 0; i < size; i += sizeof(u32)) {
 370                 size_t num;
 371
 372                 num = min_t(size_t, size - i, sizeof(u32));
 373                 val = hdmi_infoframe_subpack(ptr, num);
 374                 ptr += sizeof(u32);
 375                 writel(val, hdmi->regs + pack_offset + i);
 376         }
 377
 378         /* Enable transmission slot for updated infoframe */
 379         val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
 380         val |= HDMI_IFRAME_CFG_DI_N(mode, slot);
 381         hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
 382 }
 383
 384 /**
 385  * Prepare and configure the AVI infoframe
 386  *
 387  * AVI infoframe are transmitted at least once per two video field and
 388  * contains information about HDMI transmission mode such as color space,
 389  * colorimetry, ...
 390  *
 391  * @hdmi: pointer on the hdmi internal structure
 392  *
 393  * Return negative value if error occurs
 394  */
 395 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
 396 {
 397         struct drm_display_mode *mode = &hdmi->mode;
 398         struct hdmi_avi_infoframe infoframe;
 399         u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
 400         int ret;
 401
 402         DRM_DEBUG_DRIVER("\n");
 403
 404         ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
 405         if (ret < 0) {
 406                 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
 407                 return ret;
 408         }
 409
 410         /* fixed infoframe configuration not linked to the mode */
 411         infoframe.colorspace = HDMI_COLORSPACE_RGB;
 412         infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
 413         infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
 414
 415         ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
 416         if (ret < 0) {
 417                 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
 418                 return ret;
 419         }
 420
 421         hdmi_infoframe_write_infopack(hdmi, buffer, ret);
 422
 423         return 0;
 424 }
 425
 426 /**
 427  * Prepare and configure the AUDIO infoframe
 428  *
 429  * AUDIO infoframe are transmitted once per frame and
 430  * contains information about HDMI transmission mode such as audio codec,
 431  * sample size, ...
 432  *
 433  * @hdmi: pointer on the hdmi internal structure
 434  *
 435  * Return negative value if error occurs
 436  */
 437 static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
 438 {
 439         struct hdmi_audio_infoframe infofame;
 440         u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
 441         int ret;
 442
 443         ret = hdmi_audio_infoframe_init(&infofame);
 444         if (ret < 0) {
 445                 DRM_ERROR("failed to setup audio infoframe: %d\n", ret);
 446                 return ret;
 447         }
 448
 449         infofame.channels = 2;
 450
 451         ret = hdmi_audio_infoframe_pack(&infofame, buffer, sizeof(buffer));
 452         if (ret < 0) {
 453                 DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
 454                 return ret;
 455         }
 456
 457         hdmi_infoframe_write_infopack(hdmi, buffer, ret);
 458
 459         return 0;
 460 }
 461
 462 /*
 463  * Prepare and configure the VS infoframe
 464  *
 465  * Vendor Specific infoframe are transmitted once per frame and
 466  * contains vendor specific information.
 467  *
 468  * @hdmi: pointer on the hdmi internal structure
 469  *
 470  * Return negative value if error occurs
 471  */
 472 #define HDMI_VENDOR_INFOFRAME_MAX_SIZE 6
 473 static int hdmi_vendor_infoframe_config(struct sti_hdmi *hdmi)
 474 {
 475         struct drm_display_mode *mode = &hdmi->mode;
 476         struct hdmi_vendor_infoframe infoframe;
 477         u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_VENDOR_INFOFRAME_MAX_SIZE];
 478         int ret;
 479
 480         DRM_DEBUG_DRIVER("\n");
 481
 482         ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe, mode);
 483         if (ret < 0) {
 484                 /*
 485                  * Going into that statement does not means vendor infoframe
 486                  * fails. It just informed us that vendor infoframe is not
 487                  * needed for the selected mode. Only  4k or stereoscopic 3D
 488                  * mode requires vendor infoframe. So just simply return 0.
 489                  */
 490                 return 0;
 491         }
 492
 493         ret = hdmi_vendor_infoframe_pack(&infoframe, buffer, sizeof(buffer));
 494         if (ret < 0) {
 495                 DRM_ERROR("failed to pack VS infoframe: %d\n", ret);
 496                 return ret;
 497         }
 498
 499         hdmi_infoframe_write_infopack(hdmi, buffer, ret);
 500
 501         return 0;
 502 }
 503
 504 /**
 505  * Software reset of the hdmi subsystem
 506  *
 507  * @hdmi: pointer on the hdmi internal structure
 508  *
 509  */
 510 #define HDMI_TIMEOUT_SWRESET  100   /*milliseconds */
 511 static void hdmi_swreset(struct sti_hdmi *hdmi)
 512 {
 513         u32 val;
 514
 515         DRM_DEBUG_DRIVER("\n");
 516
 517         /* Enable hdmi_audio clock only during hdmi reset */
 518         if (clk_prepare_enable(hdmi->clk_audio))
 519                 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
 520
 521         /* Sw reset */
 522         hdmi->event_received = false;
 523
 524         val = hdmi_read(hdmi, HDMI_CFG);
 525         val |= HDMI_CFG_SW_RST_EN;
 526         hdmi_write(hdmi, val, HDMI_CFG);
 527
 528         /* Wait reset completed */
 529         wait_event_interruptible_timeout(hdmi->wait_event,
 530                                          hdmi->event_received == true,
 531                                          msecs_to_jiffies
 532                                          (HDMI_TIMEOUT_SWRESET));
 533
 534         /*
 535          * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
 536          * set to '1' and clk_audio is running.
 537          */
 538         if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
 539                 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
 540
 541         val = hdmi_read(hdmi, HDMI_CFG);
 542         val &= ~HDMI_CFG_SW_RST_EN;
 543         hdmi_write(hdmi, val, HDMI_CFG);
 544
 545         /* Disable hdmi_audio clock. Not used anymore for drm purpose */
 546         clk_disable_unprepare(hdmi->clk_audio);
 547 }
 548
 549 static void sti_hdmi_disable(struct drm_bridge *bridge)
 550 {
 551         struct sti_hdmi *hdmi = bridge->driver_private;
 552
 553         u32 val = hdmi_read(hdmi, HDMI_CFG);
 554
 555         if (!hdmi->enabled)
 556                 return;
 557
 558         DRM_DEBUG_DRIVER("\n");
 559
 560         /* Disable HDMI */
 561         val &= ~HDMI_CFG_DEVICE_EN;
 562         hdmi_write(hdmi, val, HDMI_CFG);
 563
 564         hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
 565
 566         /* Stop the phy */
 567         hdmi->phy_ops->stop(hdmi);
 568
 569         /* Reset info frame transmission */
 570         hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI);
 571         hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO);
 572         hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_VENDOR);
 573
 574         /* Set the default channel data to be a dark red */
 575         hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
 576         hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
 577         hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
 578
 579         /* Disable/unprepare hdmi clock */
 580         clk_disable_unprepare(hdmi->clk_phy);
 581         clk_disable_unprepare(hdmi->clk_tmds);
 582         clk_disable_unprepare(hdmi->clk_pix);
 583
 584         hdmi->enabled = false;
 585 }
 586
 587 static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
 588 {
 589         struct sti_hdmi *hdmi = bridge->driver_private;
 590
 591         DRM_DEBUG_DRIVER("\n");
 592
 593         if (hdmi->enabled)
 594                 return;
 595
 596         /* Prepare/enable clocks */
 597         if (clk_prepare_enable(hdmi->clk_pix))
 598                 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
 599         if (clk_prepare_enable(hdmi->clk_tmds))
 600                 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
 601         if (clk_prepare_enable(hdmi->clk_phy))
 602                 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
 603
 604         hdmi->enabled = true;
 605
 606         /* Program hdmi serializer and start phy */
 607         if (!hdmi->phy_ops->start(hdmi)) {
 608                 DRM_ERROR("Unable to start hdmi phy\n");
 609                 return;
 610         }
 611
 612         /* Program hdmi active area */
 613         hdmi_active_area(hdmi);
 614
 615         /* Enable working interrupts */
 616         hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
 617
 618         /* Program hdmi config */
 619         hdmi_config(hdmi);
 620
 621         /* Program AVI infoframe */
 622         if (hdmi_avi_infoframe_config(hdmi))
 623                 DRM_ERROR("Unable to configure AVI infoframe\n");
 624
 625         /* Program AUDIO infoframe */
 626         if (hdmi_audio_infoframe_config(hdmi))
 627                 DRM_ERROR("Unable to configure AUDIO infoframe\n");
 628
 629         /* Program VS infoframe */
 630         if (hdmi_vendor_infoframe_config(hdmi))
 631                 DRM_ERROR("Unable to configure VS infoframe\n");
 632
 633         /* Sw reset */
 634         hdmi_swreset(hdmi);
 635 }
 636
 637 static void sti_hdmi_set_mode(struct drm_bridge *bridge,
 638                 struct drm_display_mode *mode,
 639                 struct drm_display_mode *adjusted_mode)
 640 {
 641         struct sti_hdmi *hdmi = bridge->driver_private;
 642         int ret;
 643
 644         DRM_DEBUG_DRIVER("\n");
 645
 646         /* Copy the drm display mode in the connector local structure */
 647         memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
 648
 649         /* Update clock framerate according to the selected mode */
 650         ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
 651         if (ret < 0) {
 652                 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
 653                           mode->clock * 1000);
 654                 return;
 655         }
 656         ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
 657         if (ret < 0) {
 658                 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
 659                           mode->clock * 1000);
 660                 return;
 661         }
 662 }
 663
 664 static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
 665 {
 666         /* do nothing */
 667 }
 668
 669 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
 670         .pre_enable = sti_hdmi_pre_enable,
 671         .enable = sti_hdmi_bridge_nope,
 672         .disable = sti_hdmi_disable,
 673         .post_disable = sti_hdmi_bridge_nope,
 674         .mode_set = sti_hdmi_set_mode,
 675 };
 676
 677 static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
 678 {
 679         struct sti_hdmi_connector *hdmi_connector
 680                 = to_sti_hdmi_connector(connector);
 681         struct sti_hdmi *hdmi = hdmi_connector->hdmi;
 682         struct edid *edid;
 683         int count;
 684
 685         DRM_DEBUG_DRIVER("\n");
 686
 687         edid = drm_get_edid(connector, hdmi->ddc_adapt);
 688         if (!edid)
 689                 goto fail;
 690
 691         count = drm_add_edid_modes(connector, edid);
 692         drm_mode_connector_update_edid_property(connector, edid);
 693
 694         kfree(edid);
 695         return count;
 696
 697 fail:
 698         DRM_ERROR("Can't read HDMI EDID\n");
 699         return 0;
 700 }
 701
 702 #define CLK_TOLERANCE_HZ 50
 703
 704 static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
 705                                         struct drm_display_mode *mode)
 706 {
 707         int target = mode->clock * 1000;
 708         int target_min = target - CLK_TOLERANCE_HZ;
 709         int target_max = target + CLK_TOLERANCE_HZ;
 710         int result;
 711         struct sti_hdmi_connector *hdmi_connector
 712                 = to_sti_hdmi_connector(connector);
 713         struct sti_hdmi *hdmi = hdmi_connector->hdmi;
 714
 715
 716         result = clk_round_rate(hdmi->clk_pix, target);
 717
 718         DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
 719                          target, result);
 720
 721         if ((result < target_min) || (result > target_max)) {
 722                 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
 723                 return MODE_BAD;
 724         }
 725
 726         return MODE_OK;
 727 }
 728
 729 struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector)
 730 {
 731         struct sti_hdmi_connector *hdmi_connector
 732                 = to_sti_hdmi_connector(connector);
 733
 734         /* Best encoder is the one associated during connector creation */
 735         return hdmi_connector->encoder;
 736 }
 737
 738 static const
 739 struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
 740         .get_modes = sti_hdmi_connector_get_modes,
 741         .mode_valid = sti_hdmi_connector_mode_valid,
 742         .best_encoder = sti_hdmi_best_encoder,
 743 };
 744
 745 /* get detection status of display device */
 746 static enum drm_connector_status
 747 sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
 748 {
 749         struct sti_hdmi_connector *hdmi_connector
 750                 = to_sti_hdmi_connector(connector);
 751         struct sti_hdmi *hdmi = hdmi_connector->hdmi;
 752
 753         DRM_DEBUG_DRIVER("\n");
 754
 755         if (hdmi->hpd) {
 756                 DRM_DEBUG_DRIVER("hdmi cable connected\n");
 757                 return connector_status_connected;
 758         }
 759
 760         DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
 761         return connector_status_disconnected;
 762 }
 763
 764 static void sti_hdmi_connector_destroy(struct drm_connector *connector)
 765 {
 766         struct sti_hdmi_connector *hdmi_connector
 767                 = to_sti_hdmi_connector(connector);
 768
 769         drm_connector_unregister(connector);
 770         drm_connector_cleanup(connector);
 771         kfree(hdmi_connector);
 772 }
 773
 774 static const struct drm_connector_funcs sti_hdmi_connector_funcs = {
 775         .dpms = drm_atomic_helper_connector_dpms,
 776         .fill_modes = drm_helper_probe_single_connector_modes,
 777         .detect = sti_hdmi_connector_detect,
 778         .destroy = sti_hdmi_connector_destroy,
 779         .reset = drm_atomic_helper_connector_reset,
 780         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 781         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 782 };
 783
 784 static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
 785 {
 786         struct drm_encoder *encoder;
 787
 788         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 789                 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
 790                         return encoder;
 791         }
 792
 793         return NULL;
 794 }
 795
 796 static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
 797 {
 798         struct sti_hdmi *hdmi = dev_get_drvdata(dev);
 799         struct drm_device *drm_dev = data;
 800         struct drm_encoder *encoder;
 801         struct sti_hdmi_connector *connector;
 802         struct drm_connector *drm_connector;
 803         struct drm_bridge *bridge;
 804         int err;
 805
 806         /* Set the drm device handle */
 807         hdmi->drm_dev = drm_dev;
 808
 809         encoder = sti_hdmi_find_encoder(drm_dev);
 810         if (!encoder)
 811                 return -EINVAL;
 812
 813         connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
 814         if (!connector)
 815                 return -EINVAL;
 816
 817         connector->hdmi = hdmi;
 818
 819         bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
 820         if (!bridge)
 821                 return -EINVAL;
 822
 823         bridge->driver_private = hdmi;
 824         bridge->funcs = &sti_hdmi_bridge_funcs;
 825         drm_bridge_attach(drm_dev, bridge);
 826
 827         encoder->bridge = bridge;
 828         connector->encoder = encoder;
 829
 830         drm_connector = (struct drm_connector *)connector;
 831
 832         drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
 833
 834         drm_connector_init(drm_dev, drm_connector,
 835                         &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
 836         drm_connector_helper_add(drm_connector,
 837                         &sti_hdmi_connector_helper_funcs);
 838
 839         err = drm_connector_register(drm_connector);
 840         if (err)
 841                 goto err_connector;
 842
 843         err = drm_mode_connector_attach_encoder(drm_connector, encoder);
 844         if (err) {
 845                 DRM_ERROR("Failed to attach a connector to a encoder\n");
 846                 goto err_sysfs;
 847         }
 848
 849         /* Enable default interrupts */
 850         hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
 851
 852         return 0;
 853
 854 err_sysfs:
 855         drm_connector_unregister(drm_connector);
 856 err_connector:
 857         drm_connector_cleanup(drm_connector);
 858
 859         return -EINVAL;
 860 }
 861
 862 static void sti_hdmi_unbind(struct device *dev,
 863                 struct device *master, void *data)
 864 {
 865         /* do nothing */
 866 }
 867
 868 static const struct component_ops sti_hdmi_ops = {
 869         .bind = sti_hdmi_bind,
 870         .unbind = sti_hdmi_unbind,
 871 };
 872
 873 static const struct of_device_id hdmi_of_match[] = {
 874         {
 875                 .compatible = "st,stih416-hdmi",
 876                 .data = &tx3g0c55phy_ops,
 877         }, {
 878                 .compatible = "st,stih407-hdmi",
 879                 .data = &tx3g4c28phy_ops,
 880         }, {
 881                 /* end node */
 882         }
 883 };
 884 MODULE_DEVICE_TABLE(of, hdmi_of_match);
 885
 886 static int sti_hdmi_probe(struct platform_device *pdev)
 887 {
 888         struct device *dev = &pdev->dev;
 889         struct sti_hdmi *hdmi;
 890         struct device_node *np = dev->of_node;
 891         struct resource *res;
 892         struct device_node *ddc;
 893         int ret;
 894
 895         DRM_INFO("%s\n", __func__);
 896
 897         hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
 898         if (!hdmi)
 899                 return -ENOMEM;
 900
 901         ddc = of_parse_phandle(pdev->dev.of_node, "ddc", 0);
 902         if (ddc) {
 903                 hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc);
 904                 of_node_put(ddc);
 905                 if (!hdmi->ddc_adapt)
 906                         return -EPROBE_DEFER;
 907         }
 908
 909         hdmi->dev = pdev->dev;
 910
 911         /* Get resources */
 912         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
 913         if (!res) {
 914                 DRM_ERROR("Invalid hdmi resource\n");
 915                 ret = -ENOMEM;
 916                 goto release_adapter;
 917         }
 918         hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
 919         if (!hdmi->regs) {
 920                 ret = -ENOMEM;
 921                 goto release_adapter;
 922         }
 923
 924         if (of_device_is_compatible(np, "st,stih416-hdmi")) {
 925                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 926                                                    "syscfg");
 927                 if (!res) {
 928                         DRM_ERROR("Invalid syscfg resource\n");
 929                         ret = -ENOMEM;
 930                         goto release_adapter;
 931                 }
 932                 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
 933                                                     resource_size(res));
 934                 if (!hdmi->syscfg) {
 935                         ret = -ENOMEM;
 936                         goto release_adapter;
 937                 }
 938         }
 939
 940         hdmi->phy_ops = (struct hdmi_phy_ops *)
 941                 of_match_node(hdmi_of_match, np)->data;
 942
 943         /* Get clock resources */
 944         hdmi->clk_pix = devm_clk_get(dev, "pix");
 945         if (IS_ERR(hdmi->clk_pix)) {
 946                 DRM_ERROR("Cannot get hdmi_pix clock\n");
 947                 ret = PTR_ERR(hdmi->clk_pix);
 948                 goto release_adapter;
 949         }
 950
 951         hdmi->clk_tmds = devm_clk_get(dev, "tmds");
 952         if (IS_ERR(hdmi->clk_tmds)) {
 953                 DRM_ERROR("Cannot get hdmi_tmds clock\n");
 954                 ret = PTR_ERR(hdmi->clk_tmds);
 955                 goto release_adapter;
 956         }
 957
 958         hdmi->clk_phy = devm_clk_get(dev, "phy");
 959         if (IS_ERR(hdmi->clk_phy)) {
 960                 DRM_ERROR("Cannot get hdmi_phy clock\n");
 961                 ret = PTR_ERR(hdmi->clk_phy);
 962                 goto release_adapter;
 963         }
 964
 965         hdmi->clk_audio = devm_clk_get(dev, "audio");
 966         if (IS_ERR(hdmi->clk_audio)) {
 967                 DRM_ERROR("Cannot get hdmi_audio clock\n");
 968                 ret = PTR_ERR(hdmi->clk_audio);
 969                 goto release_adapter;
 970         }
 971
 972         hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
 973
 974         init_waitqueue_head(&hdmi->wait_event);
 975
 976         hdmi->irq = platform_get_irq_byname(pdev, "irq");
 977
 978         ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
 979                         hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
 980         if (ret) {
 981                 DRM_ERROR("Failed to register HDMI interrupt\n");
 982                 goto release_adapter;
 983         }
 984
 985         hdmi->reset = devm_reset_control_get(dev, "hdmi");
 986         /* Take hdmi out of reset */
 987         if (!IS_ERR(hdmi->reset))
 988                 reset_control_deassert(hdmi->reset);
 989
 990         platform_set_drvdata(pdev, hdmi);
 991
 992         return component_add(&pdev->dev, &sti_hdmi_ops);
 993
 994  release_adapter:
 995         i2c_put_adapter(hdmi->ddc_adapt);
 996
 997         return ret;
 998 }
 999
1000 static int sti_hdmi_remove(struct platform_device *pdev)
1001 {
1002         struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
1003
1004         i2c_put_adapter(hdmi->ddc_adapt);
1005         component_del(&pdev->dev, &sti_hdmi_ops);
1006
1007         return 0;
1008 }
1009
1010 struct platform_driver sti_hdmi_driver = {
1011         .driver = {
1012                 .name = "sti-hdmi",
1013                 .owner = THIS_MODULE,
1014                 .of_match_table = hdmi_of_match,
1015         },
1016         .probe = sti_hdmi_probe,
1017         .remove = sti_hdmi_remove,
1018 };
1019
1020 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
1021 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
1022 MODULE_LICENSE("GPL");