1 // SPDX-License-Identifier: GPL-2.0-only
3 * DRM driver for Solomon SSD130x OLED displays
5 * Copyright 2022 Red Hat Inc.
6 * Author: Javier Martinez Canillas <javierm@redhat.com>
8 * Based on drivers/video/fbdev/ssd1307fb.c
9 * Copyright 2012 Free Electrons
12 #include <linux/backlight.h>
13 #include <linux/bitfield.h>
14 #include <linux/bits.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/property.h>
18 #include <linux/pwm.h>
19 #include <linux/regulator/consumer.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_damage_helper.h>
24 #include <drm/drm_edid.h>
25 #include <drm/drm_fb_helper.h>
26 #include <drm/drm_format_helper.h>
27 #include <drm/drm_framebuffer.h>
28 #include <drm/drm_gem_atomic_helper.h>
29 #include <drm/drm_gem_framebuffer_helper.h>
30 #include <drm/drm_gem_shmem_helper.h>
31 #include <drm/drm_managed.h>
32 #include <drm/drm_modes.h>
33 #include <drm/drm_rect.h>
34 #include <drm/drm_probe_helper.h>
38 #define DRIVER_NAME "ssd130x"
39 #define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays"
40 #define DRIVER_DATE "20220131"
41 #define DRIVER_MAJOR 1
42 #define DRIVER_MINOR 0
44 #define SSD130X_PAGE_COL_START_LOW 0x00
45 #define SSD130X_PAGE_COL_START_HIGH 0x10
46 #define SSD130X_SET_ADDRESS_MODE 0x20
47 #define SSD130X_SET_COL_RANGE 0x21
48 #define SSD130X_SET_PAGE_RANGE 0x22
49 #define SSD130X_CONTRAST 0x81
50 #define SSD130X_SET_LOOKUP_TABLE 0x91
51 #define SSD130X_CHARGE_PUMP 0x8d
52 #define SSD130X_SET_SEG_REMAP 0xa0
53 #define SSD130X_DISPLAY_OFF 0xae
54 #define SSD130X_SET_MULTIPLEX_RATIO 0xa8
55 #define SSD130X_DISPLAY_ON 0xaf
56 #define SSD130X_START_PAGE_ADDRESS 0xb0
57 #define SSD130X_SET_COM_SCAN_DIR 0xc0
58 #define SSD130X_SET_DISPLAY_OFFSET 0xd3
59 #define SSD130X_SET_CLOCK_FREQ 0xd5
60 #define SSD130X_SET_AREA_COLOR_MODE 0xd8
61 #define SSD130X_SET_PRECHARGE_PERIOD 0xd9
62 #define SSD130X_SET_COM_PINS_CONFIG 0xda
63 #define SSD130X_SET_VCOMH 0xdb
65 #define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0)
66 #define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)
67 #define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))
68 #define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0)
69 #define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))
70 #define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0)
71 #define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val))
72 #define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3)
73 #define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))
74 #define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0)
75 #define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val))
76 #define SSD130X_SET_CLOCK_FREQ_MASK GENMASK(7, 4)
77 #define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val))
78 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK GENMASK(3, 0)
79 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val))
80 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK GENMASK(7, 4)
81 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val))
82 #define SSD130X_SET_COM_PINS_CONFIG1_MASK GENMASK(4, 4)
83 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, !(val))
84 #define SSD130X_SET_COM_PINS_CONFIG2_MASK GENMASK(5, 5)
85 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val))
87 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL 0x00
88 #define SSD130X_SET_ADDRESS_MODE_VERTICAL 0x01
89 #define SSD130X_SET_ADDRESS_MODE_PAGE 0x02
91 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e
92 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05
94 #define MAX_CONTRAST 255
96 const struct ssd130x_deviceinfo ssd130x_variants[] = {
98 .default_vcomh = 0x40,
99 .default_dclk_div = 1,
100 .default_dclk_frq = 5,
104 .default_vcomh = 0x34,
105 .default_dclk_div = 1,
106 .default_dclk_frq = 7,
109 .default_vcomh = 0x20,
110 .default_dclk_div = 1,
111 .default_dclk_frq = 8,
112 .need_chargepump = 1,
115 .default_vcomh = 0x20,
116 .default_dclk_div = 2,
117 .default_dclk_frq = 12,
121 .default_vcomh = 0x34,
122 .default_dclk_div = 1,
123 .default_dclk_frq = 10,
126 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X);
128 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm)
130 return container_of(drm, struct ssd130x_device, drm);
134 * Helper to write data (SSD130X_DATA) to the device.
136 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count)
138 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count);
142 * Helper to write command (SSD130X_COMMAND). The fist variadic argument
143 * is the command to write and the following are the command options.
145 * Note that the ssd130x protocol requires each command and option to be
146 * written as a SSD130X_COMMAND device register value. That is why a call
147 * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument.
149 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
150 /* u8 cmd, u8 option, ... */...)
159 value = va_arg(ap, int);
160 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value);
171 /* Set address range for horizontal/vertical addressing modes */
172 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x,
173 u8 col_start, u8 cols)
175 u8 col_end = col_start + cols - 1;
178 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end)
181 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end);
185 ssd130x->col_start = col_start;
186 ssd130x->col_end = col_end;
190 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x,
191 u8 page_start, u8 pages)
193 u8 page_end = page_start + pages - 1;
196 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end)
199 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end);
203 ssd130x->page_start = page_start;
204 ssd130x->page_end = page_end;
208 /* Set page and column start address for page addressing mode */
209 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x,
210 u8 page_start, u8 col_start)
213 u32 page, col_low, col_high;
215 page = SSD130X_START_PAGE_ADDRESS |
216 SSD130X_START_PAGE_ADDRESS_SET(page_start);
217 col_low = SSD130X_PAGE_COL_START_LOW |
218 SSD130X_PAGE_COL_START_LOW_SET(col_start);
219 col_high = SSD130X_PAGE_COL_START_HIGH |
220 SSD130X_PAGE_COL_START_HIGH_SET(col_start);
221 ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high);
228 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x)
230 struct device *dev = ssd130x->dev;
231 struct pwm_state pwmstate;
233 ssd130x->pwm = pwm_get(dev, NULL);
234 if (IS_ERR(ssd130x->pwm)) {
235 dev_err(dev, "Could not get PWM from firmware description!\n");
236 return PTR_ERR(ssd130x->pwm);
239 pwm_init_state(ssd130x->pwm, &pwmstate);
240 pwm_set_relative_duty_cycle(&pwmstate, 50, 100);
241 pwm_apply_state(ssd130x->pwm, &pwmstate);
244 pwm_enable(ssd130x->pwm);
246 dev_dbg(dev, "Using PWM%d with a %lluns period.\n",
247 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm));
252 static void ssd130x_reset(struct ssd130x_device *ssd130x)
257 /* Reset the screen */
258 gpiod_set_value_cansleep(ssd130x->reset, 1);
260 gpiod_set_value_cansleep(ssd130x->reset, 0);
264 static int ssd130x_power_on(struct ssd130x_device *ssd130x)
266 struct device *dev = ssd130x->dev;
269 ssd130x_reset(ssd130x);
271 ret = regulator_enable(ssd130x->vcc_reg);
273 dev_err(dev, "Failed to enable VCC: %d\n", ret);
277 if (ssd130x->device_info->need_pwm) {
278 ret = ssd130x_pwm_enable(ssd130x);
280 dev_err(dev, "Failed to enable PWM: %d\n", ret);
281 regulator_disable(ssd130x->vcc_reg);
289 static void ssd130x_power_off(struct ssd130x_device *ssd130x)
291 pwm_disable(ssd130x->pwm);
292 pwm_put(ssd130x->pwm);
294 regulator_disable(ssd130x->vcc_reg);
297 static int ssd130x_init(struct ssd130x_device *ssd130x)
299 u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap;
302 /* Set initial contrast */
303 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast);
307 /* Set segment re-map */
308 seg_remap = (SSD130X_SET_SEG_REMAP |
309 SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap));
310 ret = ssd130x_write_cmd(ssd130x, 1, seg_remap);
314 /* Set COM direction */
315 com_invdir = (SSD130X_SET_COM_SCAN_DIR |
316 SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir));
317 ret = ssd130x_write_cmd(ssd130x, 1, com_invdir);
321 /* Set multiplex ratio value */
322 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
326 /* set display offset value */
327 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset);
331 /* Set clock frequency */
332 dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) |
333 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq));
334 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk);
338 /* Set Area Color Mode ON/OFF & Low Power Display Mode */
339 if (ssd130x->area_color_enable || ssd130x->low_power) {
342 if (ssd130x->area_color_enable)
343 mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE;
345 if (ssd130x->low_power)
346 mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER;
348 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode);
353 /* Set precharge period in number of ticks from the internal clock */
354 precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) |
355 SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2));
356 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge);
360 /* Set COM pins configuration */
362 compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(ssd130x->com_seq) |
363 SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap));
364 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins);
369 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh);
373 /* Turn on the DC-DC Charge Pump */
376 if (ssd130x->device_info->need_chargepump)
377 chargepump |= BIT(2);
379 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump);
383 /* Set lookup table */
384 if (ssd130x->lookup_table_set) {
387 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE);
391 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) {
392 u8 val = ssd130x->lookup_table[i];
394 if (val < 31 || val > 63)
395 dev_warn(ssd130x->dev,
396 "lookup table index %d value out of range 31 <= %d <= 63\n",
398 ret = ssd130x_write_cmd(ssd130x, 1, val);
404 /* Switch to page addressing mode */
405 if (ssd130x->page_address_mode)
406 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
407 SSD130X_SET_ADDRESS_MODE_PAGE);
409 /* Switch to horizontal addressing mode */
410 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
411 SSD130X_SET_ADDRESS_MODE_HORIZONTAL);
414 static int ssd130x_update_rect(struct ssd130x_device *ssd130x, u8 *buf,
415 struct drm_rect *rect)
417 unsigned int x = rect->x1;
418 unsigned int y = rect->y1;
419 unsigned int width = drm_rect_width(rect);
420 unsigned int height = drm_rect_height(rect);
421 unsigned int line_length = DIV_ROUND_UP(width, 8);
422 unsigned int pages = DIV_ROUND_UP(height, 8);
423 struct drm_device *drm = &ssd130x->drm;
426 u8 *data_array = NULL;
428 drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n");
430 data_array = kcalloc(width, pages, GFP_KERNEL);
435 * The screen is divided in pages, each having a height of 8
436 * pixels, and the width of the screen. When sending a byte of
437 * data to the controller, it gives the 8 bits for the current
438 * column. I.e, the first byte are the 8 bits of the first
439 * column, then the 8 bits for the second column, etc.
442 * Representation of the screen, assuming it is 5 bits
443 * wide. Each letter-number combination is a bit that controls
455 * If you want to update this screen, you need to send 5 bytes:
456 * (1) A0 B0 C0 D0 E0 F0 G0 H0
457 * (2) A1 B1 C1 D1 E1 F1 G1 H1
458 * (3) A2 B2 C2 D2 E2 F2 G2 H2
459 * (4) A3 B3 C3 D3 E3 F3 G3 H3
460 * (5) A4 B4 C4 D4 E4 F4 G4 H4
463 if (!ssd130x->page_address_mode) {
464 /* Set address range for horizontal addressing mode */
465 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
469 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages);
474 for (i = 0; i < pages; i++) {
477 /* Last page may be partial */
478 if (8 * (y / 8 + i + 1) > ssd130x->height)
479 m = ssd130x->height % 8;
480 for (j = 0; j < width; j++) {
483 for (k = 0; k < m; k++) {
484 u8 byte = buf[(8 * i + k) * line_length + j / 8];
485 u8 bit = (byte >> (j % 8)) & 1;
489 data_array[array_idx++] = data;
493 * In page addressing mode, the start address needs to be reset,
494 * and each page then needs to be written out separately.
496 if (ssd130x->page_address_mode) {
497 ret = ssd130x_set_page_pos(ssd130x,
498 ssd130x->page_offset + i,
499 ssd130x->col_offset + x);
503 ret = ssd130x_write_data(ssd130x, data_array, width);
511 /* Write out update in one go if we aren't using page addressing mode */
512 if (!ssd130x->page_address_mode)
513 ret = ssd130x_write_data(ssd130x, data_array, width * pages);
520 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x)
523 struct drm_rect fullscreen = {
525 .x2 = ssd130x->width,
527 .y2 = ssd130x->height,
530 buf = kcalloc(DIV_ROUND_UP(ssd130x->width, 8), ssd130x->height,
535 ssd130x_update_rect(ssd130x, buf, &fullscreen);
540 static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap,
541 struct drm_rect *rect)
543 struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
544 struct iosys_map dst;
545 unsigned int dst_pitch;
549 /* Align y to display page boundaries */
550 rect->y1 = round_down(rect->y1, 8);
551 rect->y2 = min_t(unsigned int, round_up(rect->y2, 8), ssd130x->height);
553 dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
554 buf = kcalloc(dst_pitch, drm_rect_height(rect), GFP_KERNEL);
558 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
562 iosys_map_set_vaddr(&dst, buf);
563 drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect);
565 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
567 ssd130x_update_rect(ssd130x, buf, rect);
575 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane,
576 struct drm_atomic_state *state)
578 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
579 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
580 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
581 struct drm_device *drm = plane->dev;
582 struct drm_rect src_clip, dst_clip;
585 if (!drm_atomic_helper_damage_merged(old_plane_state, plane_state, &src_clip))
588 dst_clip = plane_state->dst;
589 if (!drm_rect_intersect(&dst_clip, &src_clip))
592 if (!drm_dev_enter(drm, &idx))
595 ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &dst_clip);
600 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane,
601 struct drm_atomic_state *state)
603 struct drm_device *drm = plane->dev;
604 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
607 if (!drm_dev_enter(drm, &idx))
610 ssd130x_clear_screen(ssd130x);
615 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = {
616 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
617 .atomic_check = drm_plane_helper_atomic_check,
618 .atomic_update = ssd130x_primary_plane_helper_atomic_update,
619 .atomic_disable = ssd130x_primary_plane_helper_atomic_disable,
622 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = {
623 .update_plane = drm_atomic_helper_update_plane,
624 .disable_plane = drm_atomic_helper_disable_plane,
625 .destroy = drm_plane_cleanup,
626 DRM_GEM_SHADOW_PLANE_FUNCS,
629 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc,
630 const struct drm_display_mode *mode)
632 struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev);
634 if (mode->hdisplay != ssd130x->mode.hdisplay &&
635 mode->vdisplay != ssd130x->mode.vdisplay)
636 return MODE_ONE_SIZE;
637 else if (mode->hdisplay != ssd130x->mode.hdisplay)
638 return MODE_ONE_WIDTH;
639 else if (mode->vdisplay != ssd130x->mode.vdisplay)
640 return MODE_ONE_HEIGHT;
645 static int ssd130x_crtc_helper_atomic_check(struct drm_crtc *crtc,
646 struct drm_atomic_state *new_state)
648 struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);
651 ret = drm_atomic_helper_check_crtc_state(new_crtc_state, false);
655 return drm_atomic_add_affected_planes(new_state, crtc);
659 * The CRTC is always enabled. Screen updates are performed by
660 * the primary plane's atomic_update function. Disabling clears
661 * the screen in the primary plane's atomic_disable function.
663 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = {
664 .mode_valid = ssd130x_crtc_helper_mode_valid,
665 .atomic_check = ssd130x_crtc_helper_atomic_check,
668 static void ssd130x_crtc_reset(struct drm_crtc *crtc)
670 struct drm_device *drm = crtc->dev;
671 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
673 ssd130x_init(ssd130x);
675 drm_atomic_helper_crtc_reset(crtc);
678 static const struct drm_crtc_funcs ssd130x_crtc_funcs = {
679 .reset = ssd130x_crtc_reset,
680 .destroy = drm_crtc_cleanup,
681 .set_config = drm_atomic_helper_set_config,
682 .page_flip = drm_atomic_helper_page_flip,
683 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
684 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
687 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder,
688 struct drm_atomic_state *state)
690 struct drm_device *drm = encoder->dev;
691 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
694 ret = ssd130x_power_on(ssd130x);
698 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON);
700 backlight_enable(ssd130x->bl_dev);
703 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder,
704 struct drm_atomic_state *state)
706 struct drm_device *drm = encoder->dev;
707 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
709 backlight_disable(ssd130x->bl_dev);
711 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF);
713 ssd130x_power_off(ssd130x);
716 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = {
717 .atomic_enable = ssd130x_encoder_helper_atomic_enable,
718 .atomic_disable = ssd130x_encoder_helper_atomic_disable,
721 static const struct drm_encoder_funcs ssd130x_encoder_funcs = {
722 .destroy = drm_encoder_cleanup,
725 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector)
727 struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev);
728 struct drm_display_mode *mode;
729 struct device *dev = ssd130x->dev;
731 mode = drm_mode_duplicate(connector->dev, &ssd130x->mode);
733 dev_err(dev, "Failed to duplicated mode\n");
737 drm_mode_probed_add(connector, mode);
738 drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay);
740 /* There is only a single mode */
744 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = {
745 .get_modes = ssd130x_connector_helper_get_modes,
748 static const struct drm_connector_funcs ssd130x_connector_funcs = {
749 .reset = drm_atomic_helper_connector_reset,
750 .fill_modes = drm_helper_probe_single_connector_modes,
751 .destroy = drm_connector_cleanup,
752 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
753 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
756 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = {
757 .fb_create = drm_gem_fb_create_with_dirty,
758 .atomic_check = drm_atomic_helper_check,
759 .atomic_commit = drm_atomic_helper_commit,
762 static const uint32_t ssd130x_formats[] = {
766 DEFINE_DRM_GEM_FOPS(ssd130x_fops);
768 static const struct drm_driver ssd130x_drm_driver = {
769 DRM_GEM_SHMEM_DRIVER_OPS,
773 .major = DRIVER_MAJOR,
774 .minor = DRIVER_MINOR,
775 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
776 .fops = &ssd130x_fops,
779 static int ssd130x_update_bl(struct backlight_device *bdev)
781 struct ssd130x_device *ssd130x = bl_get_data(bdev);
782 int brightness = backlight_get_brightness(bdev);
785 ssd130x->contrast = brightness;
787 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST);
791 ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast);
798 static const struct backlight_ops ssd130xfb_bl_ops = {
799 .update_status = ssd130x_update_bl,
802 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x)
804 struct device *dev = ssd130x->dev;
806 if (device_property_read_u32(dev, "solomon,width", &ssd130x->width))
809 if (device_property_read_u32(dev, "solomon,height", &ssd130x->height))
810 ssd130x->height = 16;
812 if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset))
813 ssd130x->page_offset = 1;
815 if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset))
816 ssd130x->col_offset = 0;
818 if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset))
819 ssd130x->com_offset = 0;
821 if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1))
822 ssd130x->prechargep1 = 2;
824 if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2))
825 ssd130x->prechargep2 = 2;
827 if (!device_property_read_u8_array(dev, "solomon,lookup-table",
828 ssd130x->lookup_table,
829 ARRAY_SIZE(ssd130x->lookup_table)))
830 ssd130x->lookup_table_set = 1;
832 ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap");
833 ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq");
834 ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap");
835 ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir");
836 ssd130x->area_color_enable =
837 device_property_read_bool(dev, "solomon,area-color-enable");
838 ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power");
840 ssd130x->contrast = 127;
841 ssd130x->vcomh = ssd130x->device_info->default_vcomh;
843 /* Setup display timing */
844 if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div))
845 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div;
846 if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq))
847 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq;
850 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
852 struct drm_display_mode *mode = &ssd130x->mode;
853 struct device *dev = ssd130x->dev;
854 struct drm_device *drm = &ssd130x->drm;
855 unsigned long max_width, max_height;
856 struct drm_plane *primary_plane;
857 struct drm_crtc *crtc;
858 struct drm_encoder *encoder;
859 struct drm_connector *connector;
866 ret = drmm_mode_config_init(drm);
868 dev_err(dev, "DRM mode config init failed: %d\n", ret);
872 mode->type = DRM_MODE_TYPE_DRIVER;
874 mode->hdisplay = mode->htotal = ssd130x->width;
875 mode->hsync_start = mode->hsync_end = ssd130x->width;
876 mode->vdisplay = mode->vtotal = ssd130x->height;
877 mode->vsync_start = mode->vsync_end = ssd130x->height;
879 mode->height_mm = 27;
881 max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH);
882 max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT);
884 drm->mode_config.min_width = mode->hdisplay;
885 drm->mode_config.max_width = max_width;
886 drm->mode_config.min_height = mode->vdisplay;
887 drm->mode_config.max_height = max_height;
888 drm->mode_config.preferred_depth = 32;
889 drm->mode_config.funcs = &ssd130x_mode_config_funcs;
893 primary_plane = &ssd130x->primary_plane;
894 ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs,
895 ssd130x_formats, ARRAY_SIZE(ssd130x_formats),
896 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
898 dev_err(dev, "DRM primary plane init failed: %d\n", ret);
902 drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs);
904 drm_plane_enable_fb_damage_clips(primary_plane);
908 crtc = &ssd130x->crtc;
909 ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
910 &ssd130x_crtc_funcs, NULL);
912 dev_err(dev, "DRM crtc init failed: %d\n", ret);
916 drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs);
920 encoder = &ssd130x->encoder;
921 ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs,
922 DRM_MODE_ENCODER_NONE, NULL);
924 dev_err(dev, "DRM encoder init failed: %d\n", ret);
928 drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs);
930 encoder->possible_crtcs = drm_crtc_mask(crtc);
934 connector = &ssd130x->connector;
935 ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs,
936 DRM_MODE_CONNECTOR_Unknown);
938 dev_err(dev, "DRM connector init failed: %d\n", ret);
942 drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs);
944 ret = drm_connector_attach_encoder(connector, encoder);
946 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret);
950 drm_mode_config_reset(drm);
955 static int ssd130x_get_resources(struct ssd130x_device *ssd130x)
957 struct device *dev = ssd130x->dev;
959 ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
960 if (IS_ERR(ssd130x->reset))
961 return dev_err_probe(dev, PTR_ERR(ssd130x->reset),
962 "Failed to get reset gpio\n");
964 ssd130x->vcc_reg = devm_regulator_get(dev, "vcc");
965 if (IS_ERR(ssd130x->vcc_reg))
966 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg),
967 "Failed to get VCC regulator\n");
972 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap)
974 struct ssd130x_device *ssd130x;
975 struct backlight_device *bl;
976 struct drm_device *drm;
979 ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver,
980 struct ssd130x_device, drm);
982 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x),
983 "Failed to allocate DRM device\n"));
988 ssd130x->regmap = regmap;
989 ssd130x->device_info = device_get_match_data(dev);
991 if (ssd130x->device_info->page_mode_only)
992 ssd130x->page_address_mode = 1;
994 ssd130x_parse_properties(ssd130x);
996 ret = ssd130x_get_resources(ssd130x);
1000 bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x,
1001 &ssd130xfb_bl_ops, NULL);
1003 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl),
1004 "Unable to register backlight device\n"));
1006 bl->props.brightness = ssd130x->contrast;
1007 bl->props.max_brightness = MAX_CONTRAST;
1008 ssd130x->bl_dev = bl;
1010 ret = ssd130x_init_modeset(ssd130x);
1012 return ERR_PTR(ret);
1014 ret = drm_dev_register(drm, 0);
1016 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n"));
1018 drm_fbdev_generic_setup(drm, 0);
1022 EXPORT_SYMBOL_GPL(ssd130x_probe);
1024 void ssd130x_remove(struct ssd130x_device *ssd130x)
1026 drm_dev_unplug(&ssd130x->drm);
1028 EXPORT_SYMBOL_GPL(ssd130x_remove);
1030 void ssd130x_shutdown(struct ssd130x_device *ssd130x)
1032 drm_atomic_helper_shutdown(&ssd130x->drm);
1034 EXPORT_SYMBOL_GPL(ssd130x_shutdown);
1036 MODULE_DESCRIPTION(DRIVER_DESC);
1037 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>");
1038 MODULE_LICENSE("GPL v2");