drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <linux/dma-mapping.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/pci.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/slab.h>
  38 #include <linux/swap.h>
  39 #include <linux/swiotlb.h>
  40
  41 #include <drm/drm_device.h>
  42 #include <drm/drm_file.h>
  43 #include <drm/drm_prime.h>
  44 #include <drm/radeon_drm.h>
  45 #include <drm/ttm/ttm_bo_api.h>
  46 #include <drm/ttm/ttm_bo_driver.h>
  47 #include <drm/ttm/ttm_placement.h>
  48 #include <drm/ttm/ttm_range_manager.h>
  49
  50 #include "radeon_reg.h"
  51 #include "radeon.h"
  52 #include "radeon_ttm.h"
  53
  54 static void radeon_ttm_debugfs_init(struct radeon_device *rdev);
  55
  56 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
  57                               struct ttm_resource *bo_mem);
  58 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
  59
  60 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
  61 {
  62         struct radeon_mman *mman;
  63         struct radeon_device *rdev;
  64
  65         mman = container_of(bdev, struct radeon_mman, bdev);
  66         rdev = container_of(mman, struct radeon_device, mman);
  67         return rdev;
  68 }
  69
  70 static int radeon_ttm_init_vram(struct radeon_device *rdev)
  71 {
  72         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
  73                                   false, rdev->mc.real_vram_size >> PAGE_SHIFT);
  74 }
  75
  76 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
  77 {
  78         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
  79                                   true, rdev->mc.gtt_size >> PAGE_SHIFT);
  80 }
  81
  82 static void radeon_evict_flags(struct ttm_buffer_object *bo,
  83                                 struct ttm_placement *placement)
  84 {
  85         static const struct ttm_place placements = {
  86                 .fpfn = 0,
  87                 .lpfn = 0,
  88                 .mem_type = TTM_PL_SYSTEM,
  89                 .flags = 0
  90         };
  91
  92         struct radeon_bo *rbo;
  93
  94         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
  95                 placement->placement = &placements;
  96                 placement->busy_placement = &placements;
  97                 placement->num_placement = 1;
  98                 placement->num_busy_placement = 1;
  99                 return;
 100         }
 101         rbo = container_of(bo, struct radeon_bo, tbo);
 102         switch (bo->resource->mem_type) {
 103         case TTM_PL_VRAM:
 104                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
 105                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 106                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
 107                          bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
 108                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 109                         int i;
 110
 111                         /* Try evicting to the CPU inaccessible part of VRAM
 112                          * first, but only set GTT as busy placement, so this
 113                          * BO will be evicted to GTT rather than causing other
 114                          * BOs to be evicted from VRAM
 115                          */
 116                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
 117                                                          RADEON_GEM_DOMAIN_GTT);
 118                         rbo->placement.num_busy_placement = 0;
 119                         for (i = 0; i < rbo->placement.num_placement; i++) {
 120                                 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
 121                                         if (rbo->placements[i].fpfn < fpfn)
 122                                                 rbo->placements[i].fpfn = fpfn;
 123                                 } else {
 124                                         rbo->placement.busy_placement =
 125                                                 &rbo->placements[i];
 126                                         rbo->placement.num_busy_placement = 1;
 127                                 }
 128                         }
 129                 } else
 130                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 131                 break;
 132         case TTM_PL_TT:
 133         default:
 134                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 135         }
 136         *placement = rbo->placement;
 137 }
 138
 139 static int radeon_move_blit(struct ttm_buffer_object *bo,
 140                         bool evict,
 141                         struct ttm_resource *new_mem,
 142                         struct ttm_resource *old_mem)
 143 {
 144         struct radeon_device *rdev;
 145         uint64_t old_start, new_start;
 146         struct radeon_fence *fence;
 147         unsigned num_pages;
 148         int r, ridx;
 149
 150         rdev = radeon_get_rdev(bo->bdev);
 151         ridx = radeon_copy_ring_index(rdev);
 152         old_start = (u64)old_mem->start << PAGE_SHIFT;
 153         new_start = (u64)new_mem->start << PAGE_SHIFT;
 154
 155         switch (old_mem->mem_type) {
 156         case TTM_PL_VRAM:
 157                 old_start += rdev->mc.vram_start;
 158                 break;
 159         case TTM_PL_TT:
 160                 old_start += rdev->mc.gtt_start;
 161                 break;
 162         default:
 163                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 164                 return -EINVAL;
 165         }
 166         switch (new_mem->mem_type) {
 167         case TTM_PL_VRAM:
 168                 new_start += rdev->mc.vram_start;
 169                 break;
 170         case TTM_PL_TT:
 171                 new_start += rdev->mc.gtt_start;
 172                 break;
 173         default:
 174                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 175                 return -EINVAL;
 176         }
 177         if (!rdev->ring[ridx].ready) {
 178                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 179                 return -EINVAL;
 180         }
 181
 182         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 183
 184         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 185         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
 186         if (IS_ERR(fence))
 187                 return PTR_ERR(fence);
 188
 189         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
 190         radeon_fence_unref(&fence);
 191         return r;
 192 }
 193
 194 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
 195                           struct ttm_operation_ctx *ctx,
 196                           struct ttm_resource *new_mem,
 197                           struct ttm_place *hop)
 198 {
 199         struct ttm_resource *old_mem = bo->resource;
 200         struct radeon_device *rdev;
 201         struct radeon_bo *rbo;
 202         int r;
 203
 204         if (new_mem->mem_type == TTM_PL_TT) {
 205                 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
 206                 if (r)
 207                         return r;
 208         }
 209
 210         r = ttm_bo_wait_ctx(bo, ctx);
 211         if (r)
 212                 return r;
 213
 214         /* Can't move a pinned BO */
 215         rbo = container_of(bo, struct radeon_bo, tbo);
 216         if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
 217                 return -EINVAL;
 218
 219         rdev = radeon_get_rdev(bo->bdev);
 220         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 221                 ttm_bo_move_null(bo, new_mem);
 222                 goto out;
 223         }
 224         if (old_mem->mem_type == TTM_PL_SYSTEM &&
 225             new_mem->mem_type == TTM_PL_TT) {
 226                 ttm_bo_move_null(bo, new_mem);
 227                 goto out;
 228         }
 229
 230         if (old_mem->mem_type == TTM_PL_TT &&
 231             new_mem->mem_type == TTM_PL_SYSTEM) {
 232                 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
 233                 ttm_resource_free(bo, &bo->resource);
 234                 ttm_bo_assign_mem(bo, new_mem);
 235                 goto out;
 236         }
 237         if (rdev->ring[radeon_copy_ring_index(rdev)].ready &&
 238             rdev->asic->copy.copy != NULL) {
 239                 if ((old_mem->mem_type == TTM_PL_SYSTEM &&
 240                      new_mem->mem_type == TTM_PL_VRAM) ||
 241                     (old_mem->mem_type == TTM_PL_VRAM &&
 242                      new_mem->mem_type == TTM_PL_SYSTEM)) {
 243                         hop->fpfn = 0;
 244                         hop->lpfn = 0;
 245                         hop->mem_type = TTM_PL_TT;
 246                         hop->flags = 0;
 247                         return -EMULTIHOP;
 248                 }
 249
 250                 r = radeon_move_blit(bo, evict, new_mem, old_mem);
 251         } else {
 252                 r = -ENODEV;
 253         }
 254
 255         if (r) {
 256                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
 257                 if (r)
 258                         return r;
 259         }
 260
 261 out:
 262         /* update statistics */
 263         atomic64_add(bo->base.size, &rdev->num_bytes_moved);
 264         radeon_bo_move_notify(bo, evict, new_mem);
 265         return 0;
 266 }
 267
 268 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem)
 269 {
 270         struct radeon_device *rdev = radeon_get_rdev(bdev);
 271         size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
 272
 273         switch (mem->mem_type) {
 274         case TTM_PL_SYSTEM:
 275                 /* system memory */
 276                 return 0;
 277         case TTM_PL_TT:
 278 #if IS_ENABLED(CONFIG_AGP)
 279                 if (rdev->flags & RADEON_IS_AGP) {
 280                         /* RADEON_IS_AGP is set only if AGP is active */
 281                         mem->bus.offset = (mem->start << PAGE_SHIFT) +
 282                                 rdev->mc.agp_base;
 283                         mem->bus.is_iomem = !rdev->agp->cant_use_aperture;
 284                         mem->bus.caching = ttm_write_combined;
 285                 }
 286 #endif
 287                 break;
 288         case TTM_PL_VRAM:
 289                 mem->bus.offset = mem->start << PAGE_SHIFT;
 290                 /* check if it's visible */
 291                 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
 292                         return -EINVAL;
 293                 mem->bus.offset += rdev->mc.aper_base;
 294                 mem->bus.is_iomem = true;
 295                 mem->bus.caching = ttm_write_combined;
 296 #ifdef __alpha__
 297                 /*
 298                  * Alpha: use bus.addr to hold the ioremap() return,
 299                  * so we can modify bus.base below.
 300                  */
 301                 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
 302                 if (!mem->bus.addr)
 303                         return -ENOMEM;
 304
 305                 /*
 306                  * Alpha: Use just the bus offset plus
 307                  * the hose/domain memory base for bus.base.
 308                  * It then can be used to build PTEs for VRAM
 309                  * access, as done in ttm_bo_vm_fault().
 310                  */
 311                 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
 312                         rdev->hose->dense_mem_base;
 313 #endif
 314                 break;
 315         default:
 316                 return -EINVAL;
 317         }
 318         return 0;
 319 }
 320
 321 /*
 322  * TTM backend functions.
 323  */
 324 struct radeon_ttm_tt {
 325         struct ttm_tt           ttm;
 326         u64                             offset;
 327
 328         uint64_t                        userptr;
 329         struct mm_struct                *usermm;
 330         uint32_t                        userflags;
 331         bool bound;
 332 };
 333
 334 /* prepare the sg table with the user pages */
 335 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
 336 {
 337         struct radeon_device *rdev = radeon_get_rdev(bdev);
 338         struct radeon_ttm_tt *gtt = (void *)ttm;
 339         unsigned pinned = 0;
 340         int r;
 341
 342         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 343         enum dma_data_direction direction = write ?
 344                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 345
 346         if (current->mm != gtt->usermm)
 347                 return -EPERM;
 348
 349         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 350                 /* check that we only pin down anonymous memory
 351                    to prevent problems with writeback */
 352                 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE;
 353                 struct vm_area_struct *vma;
 354                 vma = find_vma(gtt->usermm, gtt->userptr);
 355                 if (!vma || vma->vm_file || vma->vm_end < end)
 356                         return -EPERM;
 357         }
 358
 359         do {
 360                 unsigned num_pages = ttm->num_pages - pinned;
 361                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 362                 struct page **pages = ttm->pages + pinned;
 363
 364                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
 365                                    pages, NULL);
 366                 if (r < 0)
 367                         goto release_pages;
 368
 369                 pinned += r;
 370
 371         } while (pinned < ttm->num_pages);
 372
 373         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 374                                       (u64)ttm->num_pages << PAGE_SHIFT,
 375                                       GFP_KERNEL);
 376         if (r)
 377                 goto release_sg;
 378
 379         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
 380         if (r)
 381                 goto release_sg;
 382
 383         drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
 384                                        ttm->num_pages);
 385
 386         return 0;
 387
 388 release_sg:
 389         kfree(ttm->sg);
 390
 391 release_pages:
 392         release_pages(ttm->pages, pinned);
 393         return r;
 394 }
 395
 396 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
 397 {
 398         struct radeon_device *rdev = radeon_get_rdev(bdev);
 399         struct radeon_ttm_tt *gtt = (void *)ttm;
 400         struct sg_page_iter sg_iter;
 401
 402         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 403         enum dma_data_direction direction = write ?
 404                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 405
 406         /* double check that we don't free the table twice */
 407         if (!ttm->sg || !ttm->sg->sgl)
 408                 return;
 409
 410         /* free the sg table and pages again */
 411         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
 412
 413         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
 414                 struct page *page = sg_page_iter_page(&sg_iter);
 415                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 416                         set_page_dirty(page);
 417
 418                 mark_page_accessed(page);
 419                 put_page(page);
 420         }
 421
 422         sg_free_table(ttm->sg);
 423 }
 424
 425 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
 426 {
 427         struct radeon_ttm_tt *gtt = (void*)ttm;
 428
 429         return (gtt->bound);
 430 }
 431
 432 static int radeon_ttm_backend_bind(struct ttm_device *bdev,
 433                                    struct ttm_tt *ttm,
 434                                    struct ttm_resource *bo_mem)
 435 {
 436         struct radeon_ttm_tt *gtt = (void*)ttm;
 437         struct radeon_device *rdev = radeon_get_rdev(bdev);
 438         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 439                 RADEON_GART_PAGE_WRITE;
 440         int r;
 441
 442         if (gtt->bound)
 443                 return 0;
 444
 445         if (gtt->userptr) {
 446                 radeon_ttm_tt_pin_userptr(bdev, ttm);
 447                 flags &= ~RADEON_GART_PAGE_WRITE;
 448         }
 449
 450         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 451         if (!ttm->num_pages) {
 452                 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
 453                      ttm->num_pages, bo_mem, ttm);
 454         }
 455         if (ttm->caching == ttm_cached)
 456                 flags |= RADEON_GART_PAGE_SNOOP;
 457         r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
 458                              ttm->pages, gtt->ttm.dma_address, flags);
 459         if (r) {
 460                 DRM_ERROR("failed to bind %u pages at 0x%08X\n",
 461                           ttm->num_pages, (unsigned)gtt->offset);
 462                 return r;
 463         }
 464         gtt->bound = true;
 465         return 0;
 466 }
 467
 468 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm)
 469 {
 470         struct radeon_ttm_tt *gtt = (void *)ttm;
 471         struct radeon_device *rdev = radeon_get_rdev(bdev);
 472
 473         if (gtt->userptr)
 474                 radeon_ttm_tt_unpin_userptr(bdev, ttm);
 475
 476         if (!gtt->bound)
 477                 return;
 478
 479         radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
 480
 481         gtt->bound = false;
 482 }
 483
 484 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm)
 485 {
 486         struct radeon_ttm_tt *gtt = (void *)ttm;
 487
 488         radeon_ttm_backend_unbind(bdev, ttm);
 489         ttm_tt_destroy_common(bdev, ttm);
 490
 491         ttm_tt_fini(&gtt->ttm);
 492         kfree(gtt);
 493 }
 494
 495 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
 496                                            uint32_t page_flags)
 497 {
 498         struct radeon_ttm_tt *gtt;
 499         enum ttm_caching caching;
 500         struct radeon_bo *rbo;
 501 #if IS_ENABLED(CONFIG_AGP)
 502         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
 503
 504         if (rdev->flags & RADEON_IS_AGP) {
 505                 return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags);
 506         }
 507 #endif
 508         rbo = container_of(bo, struct radeon_bo, tbo);
 509
 510         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 511         if (gtt == NULL) {
 512                 return NULL;
 513         }
 514
 515         if (rbo->flags & RADEON_GEM_GTT_UC)
 516                 caching = ttm_uncached;
 517         else if (rbo->flags & RADEON_GEM_GTT_WC)
 518                 caching = ttm_write_combined;
 519         else
 520                 caching = ttm_cached;
 521
 522         if (ttm_sg_tt_init(&gtt->ttm, bo, page_flags, caching)) {
 523                 kfree(gtt);
 524                 return NULL;
 525         }
 526         return &gtt->ttm;
 527 }
 528
 529 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
 530                                                   struct ttm_tt *ttm)
 531 {
 532 #if IS_ENABLED(CONFIG_AGP)
 533         if (rdev->flags & RADEON_IS_AGP)
 534                 return NULL;
 535 #endif
 536
 537         if (!ttm)
 538                 return NULL;
 539         return container_of(ttm, struct radeon_ttm_tt, ttm);
 540 }
 541
 542 static int radeon_ttm_tt_populate(struct ttm_device *bdev,
 543                                   struct ttm_tt *ttm,
 544                                   struct ttm_operation_ctx *ctx)
 545 {
 546         struct radeon_device *rdev = radeon_get_rdev(bdev);
 547         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 548         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 549
 550         if (gtt && gtt->userptr) {
 551                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
 552                 if (!ttm->sg)
 553                         return -ENOMEM;
 554
 555                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 556                 return 0;
 557         }
 558
 559         if (slave && ttm->sg) {
 560                 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
 561                                                ttm->num_pages);
 562                 return 0;
 563         }
 564
 565         return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx);
 566 }
 567
 568 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm)
 569 {
 570         struct radeon_device *rdev = radeon_get_rdev(bdev);
 571         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 572         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 573
 574         if (gtt && gtt->userptr) {
 575                 kfree(ttm->sg);
 576                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 577                 return;
 578         }
 579
 580         if (slave)
 581                 return;
 582
 583         return ttm_pool_free(&rdev->mman.bdev.pool, ttm);
 584 }
 585
 586 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
 587                               struct ttm_tt *ttm, uint64_t addr,
 588                               uint32_t flags)
 589 {
 590         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 591
 592         if (gtt == NULL)
 593                 return -EINVAL;
 594
 595         gtt->userptr = addr;
 596         gtt->usermm = current->mm;
 597         gtt->userflags = flags;
 598         return 0;
 599 }
 600
 601 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev,
 602                             struct ttm_tt *ttm)
 603 {
 604 #if IS_ENABLED(CONFIG_AGP)
 605         struct radeon_device *rdev = radeon_get_rdev(bdev);
 606         if (rdev->flags & RADEON_IS_AGP)
 607                 return ttm_agp_is_bound(ttm);
 608 #endif
 609         return radeon_ttm_backend_is_bound(ttm);
 610 }
 611
 612 static int radeon_ttm_tt_bind(struct ttm_device *bdev,
 613                               struct ttm_tt *ttm,
 614                               struct ttm_resource *bo_mem)
 615 {
 616 #if IS_ENABLED(CONFIG_AGP)
 617         struct radeon_device *rdev = radeon_get_rdev(bdev);
 618 #endif
 619
 620         if (!bo_mem)
 621                 return -EINVAL;
 622 #if IS_ENABLED(CONFIG_AGP)
 623         if (rdev->flags & RADEON_IS_AGP)
 624                 return ttm_agp_bind(ttm, bo_mem);
 625 #endif
 626
 627         return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
 628 }
 629
 630 static void radeon_ttm_tt_unbind(struct ttm_device *bdev,
 631                                  struct ttm_tt *ttm)
 632 {
 633 #if IS_ENABLED(CONFIG_AGP)
 634         struct radeon_device *rdev = radeon_get_rdev(bdev);
 635
 636         if (rdev->flags & RADEON_IS_AGP) {
 637                 ttm_agp_unbind(ttm);
 638                 return;
 639         }
 640 #endif
 641         radeon_ttm_backend_unbind(bdev, ttm);
 642 }
 643
 644 static void radeon_ttm_tt_destroy(struct ttm_device *bdev,
 645                                   struct ttm_tt *ttm)
 646 {
 647 #if IS_ENABLED(CONFIG_AGP)
 648         struct radeon_device *rdev = radeon_get_rdev(bdev);
 649
 650         if (rdev->flags & RADEON_IS_AGP) {
 651                 ttm_agp_unbind(ttm);
 652                 ttm_tt_destroy_common(bdev, ttm);
 653                 ttm_agp_destroy(ttm);
 654                 return;
 655         }
 656 #endif
 657         radeon_ttm_backend_destroy(bdev, ttm);
 658 }
 659
 660 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
 661                                struct ttm_tt *ttm)
 662 {
 663         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 664
 665         if (gtt == NULL)
 666                 return false;
 667
 668         return !!gtt->userptr;
 669 }
 670
 671 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
 672                                struct ttm_tt *ttm)
 673 {
 674         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 675
 676         if (gtt == NULL)
 677                 return false;
 678
 679         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 680 }
 681
 682 static void
 683 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo)
 684 {
 685         radeon_bo_move_notify(bo, false, NULL);
 686 }
 687
 688 static struct ttm_device_funcs radeon_bo_driver = {
 689         .ttm_tt_create = &radeon_ttm_tt_create,
 690         .ttm_tt_populate = &radeon_ttm_tt_populate,
 691         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 692         .ttm_tt_destroy = &radeon_ttm_tt_destroy,
 693         .eviction_valuable = ttm_bo_eviction_valuable,
 694         .evict_flags = &radeon_evict_flags,
 695         .move = &radeon_bo_move,
 696         .delete_mem_notify = &radeon_bo_delete_mem_notify,
 697         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 698 };
 699
 700 int radeon_ttm_init(struct radeon_device *rdev)
 701 {
 702         int r;
 703
 704         /* No others user of address space so set it to 0 */
 705         r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev,
 706                                rdev->ddev->anon_inode->i_mapping,
 707                                rdev->ddev->vma_offset_manager,
 708                                rdev->need_swiotlb,
 709                                dma_addressing_limited(&rdev->pdev->dev));
 710         if (r) {
 711                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 712                 return r;
 713         }
 714         rdev->mman.initialized = true;
 715
 716         r = radeon_ttm_init_vram(rdev);
 717         if (r) {
 718                 DRM_ERROR("Failed initializing VRAM heap.\n");
 719                 return r;
 720         }
 721         /* Change the size here instead of the init above so only lpfn is affected */
 722         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 723
 724         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 725                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
 726                              NULL, &rdev->stolen_vga_memory);
 727         if (r) {
 728                 return r;
 729         }
 730         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 731         if (r)
 732                 return r;
 733         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 734         radeon_bo_unreserve(rdev->stolen_vga_memory);
 735         if (r) {
 736                 radeon_bo_unref(&rdev->stolen_vga_memory);
 737                 return r;
 738         }
 739         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 740                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 741
 742         r = radeon_ttm_init_gtt(rdev);
 743         if (r) {
 744                 DRM_ERROR("Failed initializing GTT heap.\n");
 745                 return r;
 746         }
 747         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 748                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 749
 750         radeon_ttm_debugfs_init(rdev);
 751
 752         return 0;
 753 }
 754
 755 void radeon_ttm_fini(struct radeon_device *rdev)
 756 {
 757         int r;
 758
 759         if (!rdev->mman.initialized)
 760                 return;
 761
 762         if (rdev->stolen_vga_memory) {
 763                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 764                 if (r == 0) {
 765                         radeon_bo_unpin(rdev->stolen_vga_memory);
 766                         radeon_bo_unreserve(rdev->stolen_vga_memory);
 767                 }
 768                 radeon_bo_unref(&rdev->stolen_vga_memory);
 769         }
 770         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
 771         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
 772         ttm_device_fini(&rdev->mman.bdev);
 773         radeon_gart_fini(rdev);
 774         rdev->mman.initialized = false;
 775         DRM_INFO("radeon: ttm finalized\n");
 776 }
 777
 778 /* this should only be called at bootup or when userspace
 779  * isn't running */
 780 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 781 {
 782         struct ttm_resource_manager *man;
 783
 784         if (!rdev->mman.initialized)
 785                 return;
 786
 787         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
 788         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 789         man->size = size >> PAGE_SHIFT;
 790 }
 791
 792 #if defined(CONFIG_DEBUG_FS)
 793
 794 static int radeon_mm_vram_dump_table_show(struct seq_file *m, void *unused)
 795 {
 796         struct radeon_device *rdev = (struct radeon_device *)m->private;
 797         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev,
 798                                                             TTM_PL_VRAM);
 799         struct drm_printer p = drm_seq_file_printer(m);
 800
 801         man->func->debug(man, &p);
 802         return 0;
 803 }
 804
 805 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data)
 806 {
 807         struct radeon_device *rdev = (struct radeon_device *)m->private;
 808
 809         return ttm_pool_debugfs(&rdev->mman.bdev.pool, m);
 810 }
 811
 812 static int radeon_mm_gtt_dump_table_show(struct seq_file *m, void *unused)
 813 {
 814         struct radeon_device *rdev = (struct radeon_device *)m->private;
 815         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev,
 816                                                             TTM_PL_TT);
 817         struct drm_printer p = drm_seq_file_printer(m);
 818
 819         man->func->debug(man, &p);
 820         return 0;
 821 }
 822
 823 DEFINE_SHOW_ATTRIBUTE(radeon_mm_vram_dump_table);
 824 DEFINE_SHOW_ATTRIBUTE(radeon_mm_gtt_dump_table);
 825 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool);
 826
 827 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 828 {
 829         struct radeon_device *rdev = inode->i_private;
 830         i_size_write(inode, rdev->mc.mc_vram_size);
 831         filep->private_data = inode->i_private;
 832         return 0;
 833 }
 834
 835 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 836                                     size_t size, loff_t *pos)
 837 {
 838         struct radeon_device *rdev = f->private_data;
 839         ssize_t result = 0;
 840         int r;
 841
 842         if (size & 0x3 || *pos & 0x3)
 843                 return -EINVAL;
 844
 845         while (size) {
 846                 unsigned long flags;
 847                 uint32_t value;
 848
 849                 if (*pos >= rdev->mc.mc_vram_size)
 850                         return result;
 851
 852                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
 853                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
 854                 if (rdev->family >= CHIP_CEDAR)
 855                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
 856                 value = RREG32(RADEON_MM_DATA);
 857                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
 858
 859                 r = put_user(value, (uint32_t __user *)buf);
 860                 if (r)
 861                         return r;
 862
 863                 result += 4;
 864                 buf += 4;
 865                 *pos += 4;
 866                 size -= 4;
 867         }
 868
 869         return result;
 870 }
 871
 872 static const struct file_operations radeon_ttm_vram_fops = {
 873         .owner = THIS_MODULE,
 874         .open = radeon_ttm_vram_open,
 875         .read = radeon_ttm_vram_read,
 876         .llseek = default_llseek
 877 };
 878
 879 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
 880 {
 881         struct radeon_device *rdev = inode->i_private;
 882         i_size_write(inode, rdev->mc.gtt_size);
 883         filep->private_data = inode->i_private;
 884         return 0;
 885 }
 886
 887 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
 888                                    size_t size, loff_t *pos)
 889 {
 890         struct radeon_device *rdev = f->private_data;
 891         ssize_t result = 0;
 892         int r;
 893
 894         while (size) {
 895                 loff_t p = *pos / PAGE_SIZE;
 896                 unsigned off = *pos & ~PAGE_MASK;
 897                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
 898                 struct page *page;
 899                 void *ptr;
 900
 901                 if (p >= rdev->gart.num_cpu_pages)
 902                         return result;
 903
 904                 page = rdev->gart.pages[p];
 905                 if (page) {
 906                         ptr = kmap(page);
 907                         ptr += off;
 908
 909                         r = copy_to_user(buf, ptr, cur_size);
 910                         kunmap(rdev->gart.pages[p]);
 911                 } else
 912                         r = clear_user(buf, cur_size);
 913
 914                 if (r)
 915                         return -EFAULT;
 916
 917                 result += cur_size;
 918                 buf += cur_size;
 919                 *pos += cur_size;
 920                 size -= cur_size;
 921         }
 922
 923         return result;
 924 }
 925
 926 static const struct file_operations radeon_ttm_gtt_fops = {
 927         .owner = THIS_MODULE,
 928         .open = radeon_ttm_gtt_open,
 929         .read = radeon_ttm_gtt_read,
 930         .llseek = default_llseek
 931 };
 932
 933 #endif
 934
 935 static void radeon_ttm_debugfs_init(struct radeon_device *rdev)
 936 {
 937 #if defined(CONFIG_DEBUG_FS)
 938         struct drm_minor *minor = rdev->ddev->primary;
 939         struct dentry *root = minor->debugfs_root;
 940
 941         debugfs_create_file("radeon_vram", 0444, root, rdev,
 942                             &radeon_ttm_vram_fops);
 943
 944         debugfs_create_file("radeon_gtt", 0444, root, rdev,
 945                             &radeon_ttm_gtt_fops);
 946
 947         debugfs_create_file("radeon_vram_mm", 0444, root, rdev,
 948                             &radeon_mm_vram_dump_table_fops);
 949         debugfs_create_file("radeon_gtt_mm", 0444, root, rdev,
 950                             &radeon_mm_gtt_dump_table_fops);
 951         debugfs_create_file("ttm_page_pool", 0444, root, rdev,
 952                             &radeon_ttm_page_pool_fops);
 953 #endif
 954 }