2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_device.h>
43 #include <drm/drm_file.h>
44 #include <drm/drm_prime.h>
45 #include <drm/radeon_drm.h>
46 #include <drm/ttm/ttm_bo_api.h>
47 #include <drm/ttm/ttm_bo_driver.h>
48 #include <drm/ttm/ttm_placement.h>
50 #include "radeon_reg.h"
52 #include "radeon_ttm.h"
54 static void radeon_ttm_debugfs_init(struct radeon_device *rdev);
56 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
57 struct ttm_resource *bo_mem);
58 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
60 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
62 struct radeon_mman *mman;
63 struct radeon_device *rdev;
65 mman = container_of(bdev, struct radeon_mman, bdev);
66 rdev = container_of(mman, struct radeon_device, mman);
70 static int radeon_ttm_init_vram(struct radeon_device *rdev)
72 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
73 false, rdev->mc.real_vram_size >> PAGE_SHIFT);
76 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
78 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
79 true, rdev->mc.gtt_size >> PAGE_SHIFT);
82 static void radeon_evict_flags(struct ttm_buffer_object *bo,
83 struct ttm_placement *placement)
85 static const struct ttm_place placements = {
88 .mem_type = TTM_PL_SYSTEM,
92 struct radeon_bo *rbo;
94 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
95 placement->placement = &placements;
96 placement->busy_placement = &placements;
97 placement->num_placement = 1;
98 placement->num_busy_placement = 1;
101 rbo = container_of(bo, struct radeon_bo, tbo);
102 switch (bo->mem.mem_type) {
104 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
105 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
106 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
107 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
108 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
111 /* Try evicting to the CPU inaccessible part of VRAM
112 * first, but only set GTT as busy placement, so this
113 * BO will be evicted to GTT rather than causing other
114 * BOs to be evicted from VRAM
116 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
117 RADEON_GEM_DOMAIN_GTT);
118 rbo->placement.num_busy_placement = 0;
119 for (i = 0; i < rbo->placement.num_placement; i++) {
120 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
121 if (rbo->placements[i].fpfn < fpfn)
122 rbo->placements[i].fpfn = fpfn;
124 rbo->placement.busy_placement =
126 rbo->placement.num_busy_placement = 1;
130 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
134 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
136 *placement = rbo->placement;
139 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
141 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
142 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
144 if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
146 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
150 static int radeon_move_blit(struct ttm_buffer_object *bo,
152 struct ttm_resource *new_mem,
153 struct ttm_resource *old_mem)
155 struct radeon_device *rdev;
156 uint64_t old_start, new_start;
157 struct radeon_fence *fence;
161 rdev = radeon_get_rdev(bo->bdev);
162 ridx = radeon_copy_ring_index(rdev);
163 old_start = (u64)old_mem->start << PAGE_SHIFT;
164 new_start = (u64)new_mem->start << PAGE_SHIFT;
166 switch (old_mem->mem_type) {
168 old_start += rdev->mc.vram_start;
171 old_start += rdev->mc.gtt_start;
174 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
177 switch (new_mem->mem_type) {
179 new_start += rdev->mc.vram_start;
182 new_start += rdev->mc.gtt_start;
185 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
188 if (!rdev->ring[ridx].ready) {
189 DRM_ERROR("Trying to move memory with ring turned off.\n");
193 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
195 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
196 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
198 return PTR_ERR(fence);
200 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
201 radeon_fence_unref(&fence);
205 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
206 struct ttm_operation_ctx *ctx,
207 struct ttm_resource *new_mem,
208 struct ttm_place *hop)
210 struct radeon_device *rdev;
211 struct radeon_bo *rbo;
212 struct ttm_resource *old_mem = &bo->mem;
215 if (new_mem->mem_type == TTM_PL_TT) {
216 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
221 r = ttm_bo_wait_ctx(bo, ctx);
225 /* Can't move a pinned BO */
226 rbo = container_of(bo, struct radeon_bo, tbo);
227 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
230 rdev = radeon_get_rdev(bo->bdev);
231 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
232 ttm_bo_move_null(bo, new_mem);
235 if (old_mem->mem_type == TTM_PL_SYSTEM &&
236 new_mem->mem_type == TTM_PL_TT) {
237 ttm_bo_move_null(bo, new_mem);
241 if (old_mem->mem_type == TTM_PL_TT &&
242 new_mem->mem_type == TTM_PL_SYSTEM) {
243 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
244 ttm_resource_free(bo, &bo->mem);
245 ttm_bo_assign_mem(bo, new_mem);
248 if (rdev->ring[radeon_copy_ring_index(rdev)].ready &&
249 rdev->asic->copy.copy != NULL) {
250 if ((old_mem->mem_type == TTM_PL_SYSTEM &&
251 new_mem->mem_type == TTM_PL_VRAM) ||
252 (old_mem->mem_type == TTM_PL_VRAM &&
253 new_mem->mem_type == TTM_PL_SYSTEM)) {
256 hop->mem_type = TTM_PL_TT;
261 r = radeon_move_blit(bo, evict, new_mem, old_mem);
267 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
273 /* update statistics */
274 atomic64_add(bo->base.size, &rdev->num_bytes_moved);
275 radeon_bo_move_notify(bo, evict, new_mem);
279 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem)
281 struct radeon_device *rdev = radeon_get_rdev(bdev);
282 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
284 switch (mem->mem_type) {
289 #if IS_ENABLED(CONFIG_AGP)
290 if (rdev->flags & RADEON_IS_AGP) {
291 /* RADEON_IS_AGP is set only if AGP is active */
292 mem->bus.offset = (mem->start << PAGE_SHIFT) +
294 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
295 mem->bus.caching = ttm_write_combined;
300 mem->bus.offset = mem->start << PAGE_SHIFT;
301 /* check if it's visible */
302 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
304 mem->bus.offset += rdev->mc.aper_base;
305 mem->bus.is_iomem = true;
306 mem->bus.caching = ttm_write_combined;
309 * Alpha: use bus.addr to hold the ioremap() return,
310 * so we can modify bus.base below.
312 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
317 * Alpha: Use just the bus offset plus
318 * the hose/domain memory base for bus.base.
319 * It then can be used to build PTEs for VRAM
320 * access, as done in ttm_bo_vm_fault().
322 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
323 rdev->hose->dense_mem_base;
333 * TTM backend functions.
335 struct radeon_ttm_tt {
340 struct mm_struct *usermm;
345 /* prepare the sg table with the user pages */
346 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
348 struct radeon_device *rdev = radeon_get_rdev(bdev);
349 struct radeon_ttm_tt *gtt = (void *)ttm;
353 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
354 enum dma_data_direction direction = write ?
355 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
357 if (current->mm != gtt->usermm)
360 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
361 /* check that we only pin down anonymous memory
362 to prevent problems with writeback */
363 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE;
364 struct vm_area_struct *vma;
365 vma = find_vma(gtt->usermm, gtt->userptr);
366 if (!vma || vma->vm_file || vma->vm_end < end)
371 unsigned num_pages = ttm->num_pages - pinned;
372 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
373 struct page **pages = ttm->pages + pinned;
375 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
382 } while (pinned < ttm->num_pages);
384 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
385 (u64)ttm->num_pages << PAGE_SHIFT,
390 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
394 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
403 release_pages(ttm->pages, pinned);
407 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
409 struct radeon_device *rdev = radeon_get_rdev(bdev);
410 struct radeon_ttm_tt *gtt = (void *)ttm;
411 struct sg_page_iter sg_iter;
413 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
414 enum dma_data_direction direction = write ?
415 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
417 /* double check that we don't free the table twice */
418 if (!ttm->sg || !ttm->sg->sgl)
421 /* free the sg table and pages again */
422 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
424 for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
425 struct page *page = sg_page_iter_page(&sg_iter);
426 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
427 set_page_dirty(page);
429 mark_page_accessed(page);
433 sg_free_table(ttm->sg);
436 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
438 struct radeon_ttm_tt *gtt = (void*)ttm;
443 static int radeon_ttm_backend_bind(struct ttm_device *bdev,
445 struct ttm_resource *bo_mem)
447 struct radeon_ttm_tt *gtt = (void*)ttm;
448 struct radeon_device *rdev = radeon_get_rdev(bdev);
449 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
450 RADEON_GART_PAGE_WRITE;
457 radeon_ttm_tt_pin_userptr(bdev, ttm);
458 flags &= ~RADEON_GART_PAGE_WRITE;
461 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
462 if (!ttm->num_pages) {
463 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
464 ttm->num_pages, bo_mem, ttm);
466 if (ttm->caching == ttm_cached)
467 flags |= RADEON_GART_PAGE_SNOOP;
468 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
469 ttm->pages, gtt->ttm.dma_address, flags);
471 DRM_ERROR("failed to bind %u pages at 0x%08X\n",
472 ttm->num_pages, (unsigned)gtt->offset);
479 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm)
481 struct radeon_ttm_tt *gtt = (void *)ttm;
482 struct radeon_device *rdev = radeon_get_rdev(bdev);
485 radeon_ttm_tt_unpin_userptr(bdev, ttm);
490 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
495 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm)
497 struct radeon_ttm_tt *gtt = (void *)ttm;
499 radeon_ttm_backend_unbind(bdev, ttm);
500 ttm_tt_destroy_common(bdev, ttm);
502 ttm_tt_fini(>t->ttm);
506 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
509 struct radeon_ttm_tt *gtt;
510 enum ttm_caching caching;
511 struct radeon_bo *rbo;
512 #if IS_ENABLED(CONFIG_AGP)
513 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
515 if (rdev->flags & RADEON_IS_AGP) {
516 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
520 rbo = container_of(bo, struct radeon_bo, tbo);
522 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
527 if (rbo->flags & RADEON_GEM_GTT_UC)
528 caching = ttm_uncached;
529 else if (rbo->flags & RADEON_GEM_GTT_WC)
530 caching = ttm_write_combined;
532 caching = ttm_cached;
534 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) {
541 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
544 #if IS_ENABLED(CONFIG_AGP)
545 if (rdev->flags & RADEON_IS_AGP)
551 return container_of(ttm, struct radeon_ttm_tt, ttm);
554 static int radeon_ttm_tt_populate(struct ttm_device *bdev,
556 struct ttm_operation_ctx *ctx)
558 struct radeon_device *rdev = radeon_get_rdev(bdev);
559 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
560 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
562 if (gtt && gtt->userptr) {
563 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
567 ttm->page_flags |= TTM_PAGE_FLAG_SG;
571 if (slave && ttm->sg) {
572 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
577 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx);
580 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm)
582 struct radeon_device *rdev = radeon_get_rdev(bdev);
583 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
584 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
586 if (gtt && gtt->userptr) {
588 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
595 return ttm_pool_free(&rdev->mman.bdev.pool, ttm);
598 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
599 struct ttm_tt *ttm, uint64_t addr,
602 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
608 gtt->usermm = current->mm;
609 gtt->userflags = flags;
613 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev,
616 #if IS_ENABLED(CONFIG_AGP)
617 struct radeon_device *rdev = radeon_get_rdev(bdev);
618 if (rdev->flags & RADEON_IS_AGP)
619 return ttm_agp_is_bound(ttm);
621 return radeon_ttm_backend_is_bound(ttm);
624 static int radeon_ttm_tt_bind(struct ttm_device *bdev,
626 struct ttm_resource *bo_mem)
628 #if IS_ENABLED(CONFIG_AGP)
629 struct radeon_device *rdev = radeon_get_rdev(bdev);
634 #if IS_ENABLED(CONFIG_AGP)
635 if (rdev->flags & RADEON_IS_AGP)
636 return ttm_agp_bind(ttm, bo_mem);
639 return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
642 static void radeon_ttm_tt_unbind(struct ttm_device *bdev,
645 #if IS_ENABLED(CONFIG_AGP)
646 struct radeon_device *rdev = radeon_get_rdev(bdev);
648 if (rdev->flags & RADEON_IS_AGP) {
653 radeon_ttm_backend_unbind(bdev, ttm);
656 static void radeon_ttm_tt_destroy(struct ttm_device *bdev,
659 #if IS_ENABLED(CONFIG_AGP)
660 struct radeon_device *rdev = radeon_get_rdev(bdev);
662 if (rdev->flags & RADEON_IS_AGP) {
664 ttm_tt_destroy_common(bdev, ttm);
665 ttm_agp_destroy(ttm);
669 radeon_ttm_backend_destroy(bdev, ttm);
672 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
675 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
680 return !!gtt->userptr;
683 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
686 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
691 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
695 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo)
697 radeon_bo_move_notify(bo, false, NULL);
700 static struct ttm_device_funcs radeon_bo_driver = {
701 .ttm_tt_create = &radeon_ttm_tt_create,
702 .ttm_tt_populate = &radeon_ttm_tt_populate,
703 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
704 .ttm_tt_destroy = &radeon_ttm_tt_destroy,
705 .eviction_valuable = ttm_bo_eviction_valuable,
706 .evict_flags = &radeon_evict_flags,
707 .move = &radeon_bo_move,
708 .verify_access = &radeon_verify_access,
709 .delete_mem_notify = &radeon_bo_delete_mem_notify,
710 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
713 int radeon_ttm_init(struct radeon_device *rdev)
717 /* No others user of address space so set it to 0 */
718 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev,
719 rdev->ddev->anon_inode->i_mapping,
720 rdev->ddev->vma_offset_manager,
722 dma_addressing_limited(&rdev->pdev->dev));
724 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
727 rdev->mman.initialized = true;
729 r = radeon_ttm_init_vram(rdev);
731 DRM_ERROR("Failed initializing VRAM heap.\n");
734 /* Change the size here instead of the init above so only lpfn is affected */
735 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
737 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
738 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
739 NULL, &rdev->stolen_vga_memory);
743 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
746 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
747 radeon_bo_unreserve(rdev->stolen_vga_memory);
749 radeon_bo_unref(&rdev->stolen_vga_memory);
752 DRM_INFO("radeon: %uM of VRAM memory ready\n",
753 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
755 r = radeon_ttm_init_gtt(rdev);
757 DRM_ERROR("Failed initializing GTT heap.\n");
760 DRM_INFO("radeon: %uM of GTT memory ready.\n",
761 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
763 radeon_ttm_debugfs_init(rdev);
768 void radeon_ttm_fini(struct radeon_device *rdev)
772 if (!rdev->mman.initialized)
775 if (rdev->stolen_vga_memory) {
776 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
778 radeon_bo_unpin(rdev->stolen_vga_memory);
779 radeon_bo_unreserve(rdev->stolen_vga_memory);
781 radeon_bo_unref(&rdev->stolen_vga_memory);
783 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
784 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
785 ttm_device_fini(&rdev->mman.bdev);
786 radeon_gart_fini(rdev);
787 rdev->mman.initialized = false;
788 DRM_INFO("radeon: ttm finalized\n");
791 /* this should only be called at bootup or when userspace
793 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
795 struct ttm_resource_manager *man;
797 if (!rdev->mman.initialized)
800 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
801 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
802 man->size = size >> PAGE_SHIFT;
805 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
807 struct ttm_buffer_object *bo = vmf->vma->vm_private_data;
808 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
811 down_read(&rdev->pm.mclk_lock);
813 ret = ttm_bo_vm_reserve(bo, vmf);
817 ret = radeon_bo_fault_reserve_notify(bo);
821 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
822 TTM_BO_VM_NUM_PREFAULT, 1);
823 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
827 dma_resv_unlock(bo->base.resv);
830 up_read(&rdev->pm.mclk_lock);
834 static const struct vm_operations_struct radeon_ttm_vm_ops = {
835 .fault = radeon_ttm_fault,
836 .open = ttm_bo_vm_open,
837 .close = ttm_bo_vm_close,
838 .access = ttm_bo_vm_access
841 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
844 struct drm_file *file_priv = filp->private_data;
845 struct radeon_device *rdev = file_priv->minor->dev->dev_private;
850 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
851 if (unlikely(r != 0))
854 vma->vm_ops = &radeon_ttm_vm_ops;
858 #if defined(CONFIG_DEBUG_FS)
860 static int radeon_mm_vram_dump_table_show(struct seq_file *m, void *unused)
862 struct radeon_device *rdev = (struct radeon_device *)m->private;
863 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev,
865 struct drm_printer p = drm_seq_file_printer(m);
867 man->func->debug(man, &p);
871 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data)
873 struct radeon_device *rdev = (struct radeon_device *)m->private;
875 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m);
878 static int radeon_mm_gtt_dump_table_show(struct seq_file *m, void *unused)
880 struct radeon_device *rdev = (struct radeon_device *)m->private;
881 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev,
883 struct drm_printer p = drm_seq_file_printer(m);
885 man->func->debug(man, &p);
889 DEFINE_SHOW_ATTRIBUTE(radeon_mm_vram_dump_table);
890 DEFINE_SHOW_ATTRIBUTE(radeon_mm_gtt_dump_table);
891 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool);
893 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
895 struct radeon_device *rdev = inode->i_private;
896 i_size_write(inode, rdev->mc.mc_vram_size);
897 filep->private_data = inode->i_private;
901 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
902 size_t size, loff_t *pos)
904 struct radeon_device *rdev = f->private_data;
908 if (size & 0x3 || *pos & 0x3)
915 if (*pos >= rdev->mc.mc_vram_size)
918 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
919 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
920 if (rdev->family >= CHIP_CEDAR)
921 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
922 value = RREG32(RADEON_MM_DATA);
923 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
925 r = put_user(value, (uint32_t __user *)buf);
938 static const struct file_operations radeon_ttm_vram_fops = {
939 .owner = THIS_MODULE,
940 .open = radeon_ttm_vram_open,
941 .read = radeon_ttm_vram_read,
942 .llseek = default_llseek
945 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
947 struct radeon_device *rdev = inode->i_private;
948 i_size_write(inode, rdev->mc.gtt_size);
949 filep->private_data = inode->i_private;
953 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
954 size_t size, loff_t *pos)
956 struct radeon_device *rdev = f->private_data;
961 loff_t p = *pos / PAGE_SIZE;
962 unsigned off = *pos & ~PAGE_MASK;
963 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
967 if (p >= rdev->gart.num_cpu_pages)
970 page = rdev->gart.pages[p];
975 r = copy_to_user(buf, ptr, cur_size);
976 kunmap(rdev->gart.pages[p]);
978 r = clear_user(buf, cur_size);
992 static const struct file_operations radeon_ttm_gtt_fops = {
993 .owner = THIS_MODULE,
994 .open = radeon_ttm_gtt_open,
995 .read = radeon_ttm_gtt_read,
996 .llseek = default_llseek
1001 static void radeon_ttm_debugfs_init(struct radeon_device *rdev)
1003 #if defined(CONFIG_DEBUG_FS)
1004 struct drm_minor *minor = rdev->ddev->primary;
1005 struct dentry *root = minor->debugfs_root;
1007 debugfs_create_file("radeon_vram", 0444, root, rdev,
1008 &radeon_ttm_vram_fops);
1010 debugfs_create_file("radeon_gtt", 0444, root, rdev,
1011 &radeon_ttm_gtt_fops);
1013 debugfs_create_file("radeon_vram_mm", 0444, root, rdev,
1014 &radeon_mm_vram_dump_table_fops);
1015 debugfs_create_file("radeon_gtt_mm", 0444, root, rdev,
1016 &radeon_mm_gtt_dump_table_fops);
1017 debugfs_create_file("ttm_page_pool", 0444, root, rdev,
1018 &radeon_ttm_page_pool_fops);