2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
40 #include <drm/drm_device.h>
41 #include <drm/drm_file.h>
42 #include <drm/drm_prime.h>
43 #include <drm/radeon_drm.h>
44 #include <drm/ttm/ttm_bo.h>
45 #include <drm/ttm/ttm_placement.h>
46 #include <drm/ttm/ttm_range_manager.h>
47 #include <drm/ttm/ttm_tt.h>
49 #include "radeon_reg.h"
51 #include "radeon_ttm.h"
53 static void radeon_ttm_debugfs_init(struct radeon_device *rdev);
55 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
56 struct ttm_resource *bo_mem);
57 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
59 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
61 struct radeon_mman *mman;
62 struct radeon_device *rdev;
64 mman = container_of(bdev, struct radeon_mman, bdev);
65 rdev = container_of(mman, struct radeon_device, mman);
69 static int radeon_ttm_init_vram(struct radeon_device *rdev)
71 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
72 false, rdev->mc.real_vram_size >> PAGE_SHIFT);
75 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
77 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
78 true, rdev->mc.gtt_size >> PAGE_SHIFT);
81 static void radeon_evict_flags(struct ttm_buffer_object *bo,
82 struct ttm_placement *placement)
84 static const struct ttm_place placements = {
87 .mem_type = TTM_PL_SYSTEM,
91 struct radeon_bo *rbo;
93 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
94 placement->placement = &placements;
95 placement->busy_placement = &placements;
96 placement->num_placement = 1;
97 placement->num_busy_placement = 1;
100 rbo = container_of(bo, struct radeon_bo, tbo);
101 switch (bo->resource->mem_type) {
103 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
104 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
105 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
106 bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
107 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
110 /* Try evicting to the CPU inaccessible part of VRAM
111 * first, but only set GTT as busy placement, so this
112 * BO will be evicted to GTT rather than causing other
113 * BOs to be evicted from VRAM
115 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
116 RADEON_GEM_DOMAIN_GTT);
117 rbo->placement.num_busy_placement = 0;
118 for (i = 0; i < rbo->placement.num_placement; i++) {
119 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
120 if (rbo->placements[i].fpfn < fpfn)
121 rbo->placements[i].fpfn = fpfn;
123 rbo->placement.busy_placement =
125 rbo->placement.num_busy_placement = 1;
129 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
133 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
135 *placement = rbo->placement;
138 static int radeon_move_blit(struct ttm_buffer_object *bo,
140 struct ttm_resource *new_mem,
141 struct ttm_resource *old_mem)
143 struct radeon_device *rdev;
144 uint64_t old_start, new_start;
145 struct radeon_fence *fence;
149 rdev = radeon_get_rdev(bo->bdev);
150 ridx = radeon_copy_ring_index(rdev);
151 old_start = (u64)old_mem->start << PAGE_SHIFT;
152 new_start = (u64)new_mem->start << PAGE_SHIFT;
154 switch (old_mem->mem_type) {
156 old_start += rdev->mc.vram_start;
159 old_start += rdev->mc.gtt_start;
162 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
165 switch (new_mem->mem_type) {
167 new_start += rdev->mc.vram_start;
170 new_start += rdev->mc.gtt_start;
173 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
176 if (!rdev->ring[ridx].ready) {
177 DRM_ERROR("Trying to move memory with ring turned off.\n");
181 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
183 num_pages = PFN_UP(new_mem->size) * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
184 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
186 return PTR_ERR(fence);
188 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
189 radeon_fence_unref(&fence);
193 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
194 struct ttm_operation_ctx *ctx,
195 struct ttm_resource *new_mem,
196 struct ttm_place *hop)
198 struct ttm_resource *old_mem = bo->resource;
199 struct radeon_device *rdev;
202 if (new_mem->mem_type == TTM_PL_TT) {
203 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
208 r = ttm_bo_wait_ctx(bo, ctx);
212 rdev = radeon_get_rdev(bo->bdev);
213 if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM &&
215 ttm_bo_move_null(bo, new_mem);
218 if (old_mem->mem_type == TTM_PL_SYSTEM &&
219 new_mem->mem_type == TTM_PL_TT) {
220 ttm_bo_move_null(bo, new_mem);
224 if (old_mem->mem_type == TTM_PL_TT &&
225 new_mem->mem_type == TTM_PL_SYSTEM) {
226 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
227 ttm_resource_free(bo, &bo->resource);
228 ttm_bo_assign_mem(bo, new_mem);
231 if (rdev->ring[radeon_copy_ring_index(rdev)].ready &&
232 rdev->asic->copy.copy != NULL) {
233 if ((old_mem->mem_type == TTM_PL_SYSTEM &&
234 new_mem->mem_type == TTM_PL_VRAM) ||
235 (old_mem->mem_type == TTM_PL_VRAM &&
236 new_mem->mem_type == TTM_PL_SYSTEM)) {
239 hop->mem_type = TTM_PL_TT;
244 r = radeon_move_blit(bo, evict, new_mem, old_mem);
250 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
256 /* update statistics */
257 atomic64_add(bo->base.size, &rdev->num_bytes_moved);
258 radeon_bo_move_notify(bo);
262 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem)
264 struct radeon_device *rdev = radeon_get_rdev(bdev);
265 size_t bus_size = (size_t)mem->size;
267 switch (mem->mem_type) {
272 #if IS_ENABLED(CONFIG_AGP)
273 if (rdev->flags & RADEON_IS_AGP) {
274 /* RADEON_IS_AGP is set only if AGP is active */
275 mem->bus.offset = (mem->start << PAGE_SHIFT) +
277 mem->bus.is_iomem = !rdev->agp->cant_use_aperture;
278 mem->bus.caching = ttm_write_combined;
283 mem->bus.offset = mem->start << PAGE_SHIFT;
284 /* check if it's visible */
285 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
287 mem->bus.offset += rdev->mc.aper_base;
288 mem->bus.is_iomem = true;
289 mem->bus.caching = ttm_write_combined;
292 * Alpha: use bus.addr to hold the ioremap() return,
293 * so we can modify bus.base below.
295 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
300 * Alpha: Use just the bus offset plus
301 * the hose/domain memory base for bus.base.
302 * It then can be used to build PTEs for VRAM
303 * access, as done in ttm_bo_vm_fault().
305 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
306 rdev->hose->dense_mem_base;
316 * TTM backend functions.
318 struct radeon_ttm_tt {
323 struct mm_struct *usermm;
328 /* prepare the sg table with the user pages */
329 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
331 struct radeon_device *rdev = radeon_get_rdev(bdev);
332 struct radeon_ttm_tt *gtt = (void *)ttm;
336 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
337 enum dma_data_direction direction = write ?
338 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
340 if (current->mm != gtt->usermm)
343 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
344 /* check that we only pin down anonymous memory
345 to prevent problems with writeback */
346 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE;
347 struct vm_area_struct *vma;
348 vma = find_vma(gtt->usermm, gtt->userptr);
349 if (!vma || vma->vm_file || vma->vm_end < end)
354 unsigned num_pages = ttm->num_pages - pinned;
355 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
356 struct page **pages = ttm->pages + pinned;
358 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
365 } while (pinned < ttm->num_pages);
367 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
368 (u64)ttm->num_pages << PAGE_SHIFT,
373 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
377 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
386 release_pages(ttm->pages, pinned);
390 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
392 struct radeon_device *rdev = radeon_get_rdev(bdev);
393 struct radeon_ttm_tt *gtt = (void *)ttm;
394 struct sg_page_iter sg_iter;
396 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
397 enum dma_data_direction direction = write ?
398 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
400 /* double check that we don't free the table twice */
401 if (!ttm->sg || !ttm->sg->sgl)
404 /* free the sg table and pages again */
405 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
407 for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
408 struct page *page = sg_page_iter_page(&sg_iter);
409 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
410 set_page_dirty(page);
412 mark_page_accessed(page);
416 sg_free_table(ttm->sg);
419 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
421 struct radeon_ttm_tt *gtt = (void*)ttm;
426 static int radeon_ttm_backend_bind(struct ttm_device *bdev,
428 struct ttm_resource *bo_mem)
430 struct radeon_ttm_tt *gtt = (void*)ttm;
431 struct radeon_device *rdev = radeon_get_rdev(bdev);
432 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
433 RADEON_GART_PAGE_WRITE;
440 radeon_ttm_tt_pin_userptr(bdev, ttm);
441 flags &= ~RADEON_GART_PAGE_WRITE;
444 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
445 if (!ttm->num_pages) {
446 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
447 ttm->num_pages, bo_mem, ttm);
449 if (ttm->caching == ttm_cached)
450 flags |= RADEON_GART_PAGE_SNOOP;
451 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
452 ttm->pages, gtt->ttm.dma_address, flags);
454 DRM_ERROR("failed to bind %u pages at 0x%08X\n",
455 ttm->num_pages, (unsigned)gtt->offset);
462 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm)
464 struct radeon_ttm_tt *gtt = (void *)ttm;
465 struct radeon_device *rdev = radeon_get_rdev(bdev);
468 radeon_ttm_tt_unpin_userptr(bdev, ttm);
473 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
478 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm)
480 struct radeon_ttm_tt *gtt = (void *)ttm;
482 ttm_tt_fini(>t->ttm);
486 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
489 struct radeon_ttm_tt *gtt;
490 enum ttm_caching caching;
491 struct radeon_bo *rbo;
492 #if IS_ENABLED(CONFIG_AGP)
493 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
495 if (rdev->flags & RADEON_IS_AGP) {
496 return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags);
499 rbo = container_of(bo, struct radeon_bo, tbo);
501 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
506 if (rbo->flags & RADEON_GEM_GTT_UC)
507 caching = ttm_uncached;
508 else if (rbo->flags & RADEON_GEM_GTT_WC)
509 caching = ttm_write_combined;
511 caching = ttm_cached;
513 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) {
520 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
523 #if IS_ENABLED(CONFIG_AGP)
524 if (rdev->flags & RADEON_IS_AGP)
530 return container_of(ttm, struct radeon_ttm_tt, ttm);
533 static int radeon_ttm_tt_populate(struct ttm_device *bdev,
535 struct ttm_operation_ctx *ctx)
537 struct radeon_device *rdev = radeon_get_rdev(bdev);
538 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
539 bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL);
541 if (gtt && gtt->userptr) {
542 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
546 ttm->page_flags |= TTM_TT_FLAG_EXTERNAL;
550 if (slave && ttm->sg) {
551 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
556 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx);
559 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm)
561 struct radeon_device *rdev = radeon_get_rdev(bdev);
562 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
563 bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL);
565 radeon_ttm_tt_unbind(bdev, ttm);
567 if (gtt && gtt->userptr) {
569 ttm->page_flags &= ~TTM_TT_FLAG_EXTERNAL;
576 return ttm_pool_free(&rdev->mman.bdev.pool, ttm);
579 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
580 struct ttm_tt *ttm, uint64_t addr,
583 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
589 gtt->usermm = current->mm;
590 gtt->userflags = flags;
594 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev,
597 #if IS_ENABLED(CONFIG_AGP)
598 struct radeon_device *rdev = radeon_get_rdev(bdev);
599 if (rdev->flags & RADEON_IS_AGP)
600 return ttm_agp_is_bound(ttm);
602 return radeon_ttm_backend_is_bound(ttm);
605 static int radeon_ttm_tt_bind(struct ttm_device *bdev,
607 struct ttm_resource *bo_mem)
609 #if IS_ENABLED(CONFIG_AGP)
610 struct radeon_device *rdev = radeon_get_rdev(bdev);
615 #if IS_ENABLED(CONFIG_AGP)
616 if (rdev->flags & RADEON_IS_AGP)
617 return ttm_agp_bind(ttm, bo_mem);
620 return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
623 static void radeon_ttm_tt_unbind(struct ttm_device *bdev,
626 #if IS_ENABLED(CONFIG_AGP)
627 struct radeon_device *rdev = radeon_get_rdev(bdev);
629 if (rdev->flags & RADEON_IS_AGP) {
634 radeon_ttm_backend_unbind(bdev, ttm);
637 static void radeon_ttm_tt_destroy(struct ttm_device *bdev,
640 #if IS_ENABLED(CONFIG_AGP)
641 struct radeon_device *rdev = radeon_get_rdev(bdev);
643 if (rdev->flags & RADEON_IS_AGP) {
644 ttm_agp_destroy(ttm);
648 radeon_ttm_backend_destroy(bdev, ttm);
651 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
654 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
659 return !!gtt->userptr;
662 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
665 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
670 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
673 static struct ttm_device_funcs radeon_bo_driver = {
674 .ttm_tt_create = &radeon_ttm_tt_create,
675 .ttm_tt_populate = &radeon_ttm_tt_populate,
676 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
677 .ttm_tt_destroy = &radeon_ttm_tt_destroy,
678 .eviction_valuable = ttm_bo_eviction_valuable,
679 .evict_flags = &radeon_evict_flags,
680 .move = &radeon_bo_move,
681 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
684 int radeon_ttm_init(struct radeon_device *rdev)
688 /* No others user of address space so set it to 0 */
689 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev,
690 rdev->ddev->anon_inode->i_mapping,
691 rdev->ddev->vma_offset_manager,
693 dma_addressing_limited(&rdev->pdev->dev));
695 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
698 rdev->mman.initialized = true;
700 r = radeon_ttm_init_vram(rdev);
702 DRM_ERROR("Failed initializing VRAM heap.\n");
705 /* Change the size here instead of the init above so only lpfn is affected */
706 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
708 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
709 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
710 NULL, &rdev->stolen_vga_memory);
714 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
717 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
718 radeon_bo_unreserve(rdev->stolen_vga_memory);
720 radeon_bo_unref(&rdev->stolen_vga_memory);
723 DRM_INFO("radeon: %uM of VRAM memory ready\n",
724 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
726 r = radeon_ttm_init_gtt(rdev);
728 DRM_ERROR("Failed initializing GTT heap.\n");
731 DRM_INFO("radeon: %uM of GTT memory ready.\n",
732 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
734 radeon_ttm_debugfs_init(rdev);
739 void radeon_ttm_fini(struct radeon_device *rdev)
743 if (!rdev->mman.initialized)
746 if (rdev->stolen_vga_memory) {
747 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
749 radeon_bo_unpin(rdev->stolen_vga_memory);
750 radeon_bo_unreserve(rdev->stolen_vga_memory);
752 radeon_bo_unref(&rdev->stolen_vga_memory);
754 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
755 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
756 ttm_device_fini(&rdev->mman.bdev);
757 radeon_gart_fini(rdev);
758 rdev->mman.initialized = false;
759 DRM_INFO("radeon: ttm finalized\n");
762 /* this should only be called at bootup or when userspace
764 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
766 struct ttm_resource_manager *man;
768 if (!rdev->mman.initialized)
771 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
772 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
773 man->size = size >> PAGE_SHIFT;
776 #if defined(CONFIG_DEBUG_FS)
778 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data)
780 struct radeon_device *rdev = m->private;
782 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m);
785 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool);
787 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
789 struct radeon_device *rdev = inode->i_private;
790 i_size_write(inode, rdev->mc.mc_vram_size);
791 filep->private_data = inode->i_private;
795 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
796 size_t size, loff_t *pos)
798 struct radeon_device *rdev = f->private_data;
802 if (size & 0x3 || *pos & 0x3)
809 if (*pos >= rdev->mc.mc_vram_size)
812 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
813 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
814 if (rdev->family >= CHIP_CEDAR)
815 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
816 value = RREG32(RADEON_MM_DATA);
817 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
819 r = put_user(value, (uint32_t __user *)buf);
832 static const struct file_operations radeon_ttm_vram_fops = {
833 .owner = THIS_MODULE,
834 .open = radeon_ttm_vram_open,
835 .read = radeon_ttm_vram_read,
836 .llseek = default_llseek
839 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
841 struct radeon_device *rdev = inode->i_private;
842 i_size_write(inode, rdev->mc.gtt_size);
843 filep->private_data = inode->i_private;
847 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
848 size_t size, loff_t *pos)
850 struct radeon_device *rdev = f->private_data;
855 loff_t p = *pos / PAGE_SIZE;
856 unsigned off = *pos & ~PAGE_MASK;
857 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
861 if (p >= rdev->gart.num_cpu_pages)
864 page = rdev->gart.pages[p];
866 ptr = kmap_local_page(page);
869 r = copy_to_user(buf, ptr, cur_size);
872 r = clear_user(buf, cur_size);
886 static const struct file_operations radeon_ttm_gtt_fops = {
887 .owner = THIS_MODULE,
888 .open = radeon_ttm_gtt_open,
889 .read = radeon_ttm_gtt_read,
890 .llseek = default_llseek
895 static void radeon_ttm_debugfs_init(struct radeon_device *rdev)
897 #if defined(CONFIG_DEBUG_FS)
898 struct drm_minor *minor = rdev->ddev->primary;
899 struct dentry *root = minor->debugfs_root;
901 debugfs_create_file("radeon_vram", 0444, root, rdev,
902 &radeon_ttm_vram_fops);
903 debugfs_create_file("radeon_gtt", 0444, root, rdev,
904 &radeon_ttm_gtt_fops);
905 debugfs_create_file("ttm_page_pool", 0444, root, rdev,
906 &radeon_ttm_page_pool_fops);
907 ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev,
909 root, "radeon_vram_mm");
910 ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev,
912 root, "radeon_gtt_mm");