2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_debugfs.h>
43 #include <drm/drm_device.h>
44 #include <drm/drm_file.h>
45 #include <drm/drm_prime.h>
46 #include <drm/radeon_drm.h>
47 #include <drm/ttm/ttm_bo_api.h>
48 #include <drm/ttm/ttm_bo_driver.h>
49 #include <drm/ttm/ttm_module.h>
50 #include <drm/ttm/ttm_page_alloc.h>
51 #include <drm/ttm/ttm_placement.h>
53 #include "radeon_reg.h"
56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
59 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
61 struct ttm_resource *bo_mem);
63 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
65 struct radeon_mman *mman;
66 struct radeon_device *rdev;
68 mman = container_of(bdev, struct radeon_mman, bdev);
69 rdev = container_of(mman, struct radeon_device, mman);
73 static int radeon_ttm_init_vram(struct radeon_device *rdev)
75 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
76 false, rdev->mc.real_vram_size >> PAGE_SHIFT);
79 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
81 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
82 true, rdev->mc.gtt_size >> PAGE_SHIFT);
85 static void radeon_evict_flags(struct ttm_buffer_object *bo,
86 struct ttm_placement *placement)
88 static const struct ttm_place placements = {
91 .mem_type = TTM_PL_SYSTEM,
92 .flags = TTM_PL_MASK_CACHING
95 struct radeon_bo *rbo;
97 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
98 placement->placement = &placements;
99 placement->busy_placement = &placements;
100 placement->num_placement = 1;
101 placement->num_busy_placement = 1;
104 rbo = container_of(bo, struct radeon_bo, tbo);
105 switch (bo->mem.mem_type) {
107 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
108 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
109 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
110 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
111 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
114 /* Try evicting to the CPU inaccessible part of VRAM
115 * first, but only set GTT as busy placement, so this
116 * BO will be evicted to GTT rather than causing other
117 * BOs to be evicted from VRAM
119 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
120 RADEON_GEM_DOMAIN_GTT);
121 rbo->placement.num_busy_placement = 0;
122 for (i = 0; i < rbo->placement.num_placement; i++) {
123 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
124 if (rbo->placements[i].fpfn < fpfn)
125 rbo->placements[i].fpfn = fpfn;
127 rbo->placement.busy_placement =
129 rbo->placement.num_busy_placement = 1;
133 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
137 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
139 *placement = rbo->placement;
142 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
144 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
145 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
147 if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
149 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
153 static int radeon_move_blit(struct ttm_buffer_object *bo,
154 bool evict, bool no_wait_gpu,
155 struct ttm_resource *new_mem,
156 struct ttm_resource *old_mem)
158 struct radeon_device *rdev;
159 uint64_t old_start, new_start;
160 struct radeon_fence *fence;
164 rdev = radeon_get_rdev(bo->bdev);
165 ridx = radeon_copy_ring_index(rdev);
166 old_start = (u64)old_mem->start << PAGE_SHIFT;
167 new_start = (u64)new_mem->start << PAGE_SHIFT;
169 switch (old_mem->mem_type) {
171 old_start += rdev->mc.vram_start;
174 old_start += rdev->mc.gtt_start;
177 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
180 switch (new_mem->mem_type) {
182 new_start += rdev->mc.vram_start;
185 new_start += rdev->mc.gtt_start;
188 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
191 if (!rdev->ring[ridx].ready) {
192 DRM_ERROR("Trying to move memory with ring turned off.\n");
196 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
198 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
199 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
201 return PTR_ERR(fence);
203 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
204 radeon_fence_unref(&fence);
208 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
209 bool evict, bool interruptible,
211 struct ttm_resource *new_mem)
213 struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
214 struct ttm_resource *old_mem = &bo->mem;
215 struct ttm_resource tmp_mem;
216 struct ttm_place placements;
217 struct ttm_placement placement;
221 tmp_mem.mm_node = NULL;
222 placement.num_placement = 1;
223 placement.placement = &placements;
224 placement.num_busy_placement = 1;
225 placement.busy_placement = &placements;
228 placements.mem_type = TTM_PL_TT;
229 placements.flags = TTM_PL_MASK_CACHING;
230 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
235 r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
240 r = ttm_tt_populate(bo->bdev, bo->ttm, &ctx);
245 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem);
249 r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
253 r = ttm_bo_move_ttm(bo, &ctx, new_mem);
255 ttm_resource_free(bo, &tmp_mem);
259 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
260 bool evict, bool interruptible,
262 struct ttm_resource *new_mem)
264 struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
265 struct ttm_resource *old_mem = &bo->mem;
266 struct ttm_resource tmp_mem;
267 struct ttm_placement placement;
268 struct ttm_place placements;
272 tmp_mem.mm_node = NULL;
273 placement.num_placement = 1;
274 placement.placement = &placements;
275 placement.num_busy_placement = 1;
276 placement.busy_placement = &placements;
279 placements.mem_type = TTM_PL_TT;
280 placements.flags = TTM_PL_MASK_CACHING;
281 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
285 r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
289 r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
294 ttm_resource_free(bo, &tmp_mem);
298 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
299 struct ttm_operation_ctx *ctx,
300 struct ttm_resource *new_mem)
302 struct radeon_device *rdev;
303 struct radeon_bo *rbo;
304 struct ttm_resource *old_mem = &bo->mem;
307 r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
311 /* Can't move a pinned BO */
312 rbo = container_of(bo, struct radeon_bo, tbo);
313 if (WARN_ON_ONCE(rbo->pin_count > 0))
316 rdev = radeon_get_rdev(bo->bdev);
317 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
318 ttm_bo_move_null(bo, new_mem);
321 if ((old_mem->mem_type == TTM_PL_TT &&
322 new_mem->mem_type == TTM_PL_SYSTEM) ||
323 (old_mem->mem_type == TTM_PL_SYSTEM &&
324 new_mem->mem_type == TTM_PL_TT)) {
326 ttm_bo_move_null(bo, new_mem);
329 if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
330 rdev->asic->copy.copy == NULL) {
335 if (old_mem->mem_type == TTM_PL_VRAM &&
336 new_mem->mem_type == TTM_PL_SYSTEM) {
337 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
338 ctx->no_wait_gpu, new_mem);
339 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
340 new_mem->mem_type == TTM_PL_VRAM) {
341 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
342 ctx->no_wait_gpu, new_mem);
344 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
350 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
356 /* update statistics */
357 atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
361 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
363 struct radeon_device *rdev = radeon_get_rdev(bdev);
364 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
366 switch (mem->mem_type) {
371 #if IS_ENABLED(CONFIG_AGP)
372 if (rdev->flags & RADEON_IS_AGP) {
373 /* RADEON_IS_AGP is set only if AGP is active */
374 mem->bus.offset = (mem->start << PAGE_SHIFT) +
376 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
381 mem->bus.offset = mem->start << PAGE_SHIFT;
382 /* check if it's visible */
383 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
385 mem->bus.offset += rdev->mc.aper_base;
386 mem->bus.is_iomem = true;
389 * Alpha: use bus.addr to hold the ioremap() return,
390 * so we can modify bus.base below.
392 if (mem->placement & TTM_PL_FLAG_WC)
394 ioremap_wc(mem->bus.offset, bus_size);
397 ioremap(mem->bus.offset, bus_size);
402 * Alpha: Use just the bus offset plus
403 * the hose/domain memory base for bus.base.
404 * It then can be used to build PTEs for VRAM
405 * access, as done in ttm_bo_vm_fault().
407 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
408 rdev->ddev->hose->dense_mem_base;
418 * TTM backend functions.
420 struct radeon_ttm_tt {
421 struct ttm_dma_tt ttm;
425 struct mm_struct *usermm;
430 /* prepare the sg table with the user pages */
431 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
433 struct radeon_device *rdev = radeon_get_rdev(bdev);
434 struct radeon_ttm_tt *gtt = (void *)ttm;
438 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
439 enum dma_data_direction direction = write ?
440 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
442 if (current->mm != gtt->usermm)
445 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
446 /* check that we only pin down anonymous memory
447 to prevent problems with writeback */
448 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
449 struct vm_area_struct *vma;
450 vma = find_vma(gtt->usermm, gtt->userptr);
451 if (!vma || vma->vm_file || vma->vm_end < end)
456 unsigned num_pages = ttm->num_pages - pinned;
457 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
458 struct page **pages = ttm->pages + pinned;
460 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
467 } while (pinned < ttm->num_pages);
469 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
470 ttm->num_pages << PAGE_SHIFT,
475 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
479 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
480 gtt->ttm.dma_address, ttm->num_pages);
488 release_pages(ttm->pages, pinned);
492 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
494 struct radeon_device *rdev = radeon_get_rdev(bdev);
495 struct radeon_ttm_tt *gtt = (void *)ttm;
496 struct sg_page_iter sg_iter;
498 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
499 enum dma_data_direction direction = write ?
500 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
502 /* double check that we don't free the table twice */
506 /* free the sg table and pages again */
507 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
509 for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
510 struct page *page = sg_page_iter_page(&sg_iter);
511 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
512 set_page_dirty(page);
514 mark_page_accessed(page);
518 sg_free_table(ttm->sg);
521 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
523 struct radeon_ttm_tt *gtt = (void*)ttm;
528 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
530 struct ttm_resource *bo_mem)
532 struct radeon_ttm_tt *gtt = (void*)ttm;
533 struct radeon_device *rdev = radeon_get_rdev(bdev);
534 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
535 RADEON_GART_PAGE_WRITE;
542 radeon_ttm_tt_pin_userptr(bdev, ttm);
543 flags &= ~RADEON_GART_PAGE_WRITE;
546 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
547 if (!ttm->num_pages) {
548 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
549 ttm->num_pages, bo_mem, ttm);
551 if (ttm->caching_state == tt_cached)
552 flags |= RADEON_GART_PAGE_SNOOP;
553 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
554 ttm->pages, gtt->ttm.dma_address, flags);
556 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
557 ttm->num_pages, (unsigned)gtt->offset);
564 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
566 struct radeon_ttm_tt *gtt = (void *)ttm;
567 struct radeon_device *rdev = radeon_get_rdev(bdev);
572 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
575 radeon_ttm_tt_unpin_userptr(bdev, ttm);
579 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
581 struct radeon_ttm_tt *gtt = (void *)ttm;
583 radeon_ttm_backend_unbind(bdev, ttm);
584 ttm_tt_destroy_common(bdev, ttm);
586 ttm_dma_tt_fini(>t->ttm);
590 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
593 struct radeon_device *rdev;
594 struct radeon_ttm_tt *gtt;
596 rdev = radeon_get_rdev(bo->bdev);
597 #if IS_ENABLED(CONFIG_AGP)
598 if (rdev->flags & RADEON_IS_AGP) {
599 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
604 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
608 if (ttm_dma_tt_init(>t->ttm, bo, page_flags)) {
612 return >t->ttm.ttm;
615 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
618 #if IS_ENABLED(CONFIG_AGP)
619 if (rdev->flags & RADEON_IS_AGP)
625 return container_of(ttm, struct radeon_ttm_tt, ttm.ttm);
628 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
630 struct ttm_operation_ctx *ctx)
632 struct radeon_device *rdev = radeon_get_rdev(bdev);
633 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
634 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
636 if (gtt && gtt->userptr) {
637 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
641 ttm->page_flags |= TTM_PAGE_FLAG_SG;
642 ttm_tt_set_populated(ttm);
646 if (slave && ttm->sg) {
647 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
648 gtt->ttm.dma_address, ttm->num_pages);
649 ttm_tt_set_populated(ttm);
653 #if IS_ENABLED(CONFIG_AGP)
654 if (rdev->flags & RADEON_IS_AGP) {
655 return ttm_pool_populate(ttm, ctx);
659 #ifdef CONFIG_SWIOTLB
660 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
661 return ttm_dma_populate(>t->ttm, rdev->dev, ctx);
665 return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx);
668 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
670 struct radeon_device *rdev = radeon_get_rdev(bdev);
671 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
672 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
674 if (gtt && gtt->userptr) {
676 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
683 #if IS_ENABLED(CONFIG_AGP)
684 if (rdev->flags & RADEON_IS_AGP) {
685 ttm_pool_unpopulate(ttm);
690 #ifdef CONFIG_SWIOTLB
691 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
692 ttm_dma_unpopulate(>t->ttm, rdev->dev);
697 ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm);
700 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
701 struct ttm_tt *ttm, uint64_t addr,
704 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
710 gtt->usermm = current->mm;
711 gtt->userflags = flags;
715 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev,
718 #if IS_ENABLED(CONFIG_AGP)
719 struct radeon_device *rdev = radeon_get_rdev(bdev);
720 if (rdev->flags & RADEON_IS_AGP)
721 return ttm_agp_is_bound(ttm);
723 return radeon_ttm_backend_is_bound(ttm);
726 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
728 struct ttm_resource *bo_mem)
730 #if IS_ENABLED(CONFIG_AGP)
731 struct radeon_device *rdev = radeon_get_rdev(bdev);
736 #if IS_ENABLED(CONFIG_AGP)
737 if (rdev->flags & RADEON_IS_AGP)
738 return ttm_agp_bind(ttm, bo_mem);
741 return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
744 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
747 #if IS_ENABLED(CONFIG_AGP)
748 struct radeon_device *rdev = radeon_get_rdev(bdev);
750 if (rdev->flags & RADEON_IS_AGP) {
755 radeon_ttm_backend_unbind(bdev, ttm);
758 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
761 #if IS_ENABLED(CONFIG_AGP)
762 struct radeon_device *rdev = radeon_get_rdev(bdev);
764 if (rdev->flags & RADEON_IS_AGP) {
766 ttm_tt_destroy_common(bdev, ttm);
767 ttm_agp_destroy(ttm);
771 radeon_ttm_backend_destroy(bdev, ttm);
774 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
777 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
782 return !!gtt->userptr;
785 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
788 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
793 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
796 static struct ttm_bo_driver radeon_bo_driver = {
797 .ttm_tt_create = &radeon_ttm_tt_create,
798 .ttm_tt_populate = &radeon_ttm_tt_populate,
799 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
800 .ttm_tt_bind = &radeon_ttm_tt_bind,
801 .ttm_tt_unbind = &radeon_ttm_tt_unbind,
802 .ttm_tt_destroy = &radeon_ttm_tt_destroy,
803 .eviction_valuable = ttm_bo_eviction_valuable,
804 .evict_flags = &radeon_evict_flags,
805 .move = &radeon_bo_move,
806 .verify_access = &radeon_verify_access,
807 .move_notify = &radeon_bo_move_notify,
808 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
809 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
812 int radeon_ttm_init(struct radeon_device *rdev)
816 /* No others user of address space so set it to 0 */
817 r = ttm_bo_device_init(&rdev->mman.bdev,
819 rdev->ddev->anon_inode->i_mapping,
820 rdev->ddev->vma_offset_manager,
821 dma_addressing_limited(&rdev->pdev->dev));
823 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
826 rdev->mman.initialized = true;
828 r = radeon_ttm_init_vram(rdev);
830 DRM_ERROR("Failed initializing VRAM heap.\n");
833 /* Change the size here instead of the init above so only lpfn is affected */
834 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
836 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
837 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
838 NULL, &rdev->stolen_vga_memory);
842 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
845 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
846 radeon_bo_unreserve(rdev->stolen_vga_memory);
848 radeon_bo_unref(&rdev->stolen_vga_memory);
851 DRM_INFO("radeon: %uM of VRAM memory ready\n",
852 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
854 r = radeon_ttm_init_gtt(rdev);
856 DRM_ERROR("Failed initializing GTT heap.\n");
859 DRM_INFO("radeon: %uM of GTT memory ready.\n",
860 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
862 r = radeon_ttm_debugfs_init(rdev);
864 DRM_ERROR("Failed to init debugfs\n");
870 void radeon_ttm_fini(struct radeon_device *rdev)
874 if (!rdev->mman.initialized)
876 radeon_ttm_debugfs_fini(rdev);
877 if (rdev->stolen_vga_memory) {
878 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
880 radeon_bo_unpin(rdev->stolen_vga_memory);
881 radeon_bo_unreserve(rdev->stolen_vga_memory);
883 radeon_bo_unref(&rdev->stolen_vga_memory);
885 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
886 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
887 ttm_bo_device_release(&rdev->mman.bdev);
888 radeon_gart_fini(rdev);
889 rdev->mman.initialized = false;
890 DRM_INFO("radeon: ttm finalized\n");
893 /* this should only be called at bootup or when userspace
895 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
897 struct ttm_resource_manager *man;
899 if (!rdev->mman.initialized)
902 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
903 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
904 man->size = size >> PAGE_SHIFT;
907 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
909 struct ttm_buffer_object *bo;
910 struct radeon_device *rdev;
913 bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
915 return VM_FAULT_NOPAGE;
917 rdev = radeon_get_rdev(bo->bdev);
918 down_read(&rdev->pm.mclk_lock);
919 ret = ttm_bo_vm_fault(vmf);
920 up_read(&rdev->pm.mclk_lock);
924 static struct vm_operations_struct radeon_ttm_vm_ops = {
925 .fault = radeon_ttm_fault,
926 .open = ttm_bo_vm_open,
927 .close = ttm_bo_vm_close,
928 .access = ttm_bo_vm_access
931 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
934 struct drm_file *file_priv = filp->private_data;
935 struct radeon_device *rdev = file_priv->minor->dev->dev_private;
940 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
941 if (unlikely(r != 0))
944 vma->vm_ops = &radeon_ttm_vm_ops;
948 #if defined(CONFIG_DEBUG_FS)
950 static int radeon_mm_dump_table(struct seq_file *m, void *data)
952 struct drm_info_node *node = (struct drm_info_node *)m->private;
953 unsigned ttm_pl = *(int*)node->info_ent->data;
954 struct drm_device *dev = node->minor->dev;
955 struct radeon_device *rdev = dev->dev_private;
956 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
957 struct drm_printer p = drm_seq_file_printer(m);
959 man->func->debug(man, &p);
964 static int ttm_pl_vram = TTM_PL_VRAM;
965 static int ttm_pl_tt = TTM_PL_TT;
967 static struct drm_info_list radeon_ttm_debugfs_list[] = {
968 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
969 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
970 {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
971 #ifdef CONFIG_SWIOTLB
972 {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
976 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
978 struct radeon_device *rdev = inode->i_private;
979 i_size_write(inode, rdev->mc.mc_vram_size);
980 filep->private_data = inode->i_private;
984 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
985 size_t size, loff_t *pos)
987 struct radeon_device *rdev = f->private_data;
991 if (size & 0x3 || *pos & 0x3)
998 if (*pos >= rdev->mc.mc_vram_size)
1001 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
1002 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
1003 if (rdev->family >= CHIP_CEDAR)
1004 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
1005 value = RREG32(RADEON_MM_DATA);
1006 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
1008 r = put_user(value, (uint32_t *)buf);
1021 static const struct file_operations radeon_ttm_vram_fops = {
1022 .owner = THIS_MODULE,
1023 .open = radeon_ttm_vram_open,
1024 .read = radeon_ttm_vram_read,
1025 .llseek = default_llseek
1028 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
1030 struct radeon_device *rdev = inode->i_private;
1031 i_size_write(inode, rdev->mc.gtt_size);
1032 filep->private_data = inode->i_private;
1036 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1037 size_t size, loff_t *pos)
1039 struct radeon_device *rdev = f->private_data;
1044 loff_t p = *pos / PAGE_SIZE;
1045 unsigned off = *pos & ~PAGE_MASK;
1046 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1050 if (p >= rdev->gart.num_cpu_pages)
1053 page = rdev->gart.pages[p];
1058 r = copy_to_user(buf, ptr, cur_size);
1059 kunmap(rdev->gart.pages[p]);
1061 r = clear_user(buf, cur_size);
1075 static const struct file_operations radeon_ttm_gtt_fops = {
1076 .owner = THIS_MODULE,
1077 .open = radeon_ttm_gtt_open,
1078 .read = radeon_ttm_gtt_read,
1079 .llseek = default_llseek
1084 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1086 #if defined(CONFIG_DEBUG_FS)
1089 struct drm_minor *minor = rdev->ddev->primary;
1090 struct dentry *root = minor->debugfs_root;
1092 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1094 &radeon_ttm_vram_fops);
1096 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1097 root, rdev, &radeon_ttm_gtt_fops);
1099 count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1101 #ifdef CONFIG_SWIOTLB
1102 if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1106 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1113 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1115 #if defined(CONFIG_DEBUG_FS)
1117 debugfs_remove(rdev->mman.vram);
1118 rdev->mman.vram = NULL;
1120 debugfs_remove(rdev->mman.gtt);
1121 rdev->mman.gtt = NULL;