drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <linux/dma-mapping.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/pci.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/slab.h>
  38 #include <linux/swap.h>
  39 #include <linux/swiotlb.h>
  40
  41 #include <drm/drm_agpsupport.h>
  42 #include <drm/drm_debugfs.h>
  43 #include <drm/drm_device.h>
  44 #include <drm/drm_file.h>
  45 #include <drm/drm_prime.h>
  46 #include <drm/radeon_drm.h>
  47 #include <drm/ttm/ttm_bo_api.h>
  48 #include <drm/ttm/ttm_bo_driver.h>
  49 #include <drm/ttm/ttm_module.h>
  50 #include <drm/ttm/ttm_page_alloc.h>
  51 #include <drm/ttm/ttm_placement.h>
  52
  53 #include "radeon_reg.h"
  54 #include "radeon.h"
  55
  56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  58
  59 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  60 {
  61         struct radeon_mman *mman;
  62         struct radeon_device *rdev;
  63
  64         mman = container_of(bdev, struct radeon_mman, bdev);
  65         rdev = container_of(mman, struct radeon_device, mman);
  66         return rdev;
  67 }
  68
  69 static int radeon_ttm_init_vram(struct radeon_device *rdev)
  70 {
  71         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
  72                                   TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
  73                                   TTM_PL_FLAG_WC, false,
  74                                   rdev->mc.real_vram_size >> PAGE_SHIFT);
  75 }
  76
  77 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
  78 {
  79         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
  80                                   TTM_PL_MASK_CACHING,
  81                                   TTM_PL_FLAG_CACHED, true,
  82                                   rdev->mc.gtt_size >> PAGE_SHIFT);
  83 }
  84
  85 static void radeon_evict_flags(struct ttm_buffer_object *bo,
  86                                 struct ttm_placement *placement)
  87 {
  88         static const struct ttm_place placements = {
  89                 .fpfn = 0,
  90                 .lpfn = 0,
  91                 .mem_type = TTM_PL_SYSTEM,
  92                 .flags = TTM_PL_MASK_CACHING
  93         };
  94
  95         struct radeon_bo *rbo;
  96
  97         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
  98                 placement->placement = &placements;
  99                 placement->busy_placement = &placements;
 100                 placement->num_placement = 1;
 101                 placement->num_busy_placement = 1;
 102                 return;
 103         }
 104         rbo = container_of(bo, struct radeon_bo, tbo);
 105         switch (bo->mem.mem_type) {
 106         case TTM_PL_VRAM:
 107                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
 108                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 109                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
 110                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
 111                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 112                         int i;
 113
 114                         /* Try evicting to the CPU inaccessible part of VRAM
 115                          * first, but only set GTT as busy placement, so this
 116                          * BO will be evicted to GTT rather than causing other
 117                          * BOs to be evicted from VRAM
 118                          */
 119                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
 120                                                          RADEON_GEM_DOMAIN_GTT);
 121                         rbo->placement.num_busy_placement = 0;
 122                         for (i = 0; i < rbo->placement.num_placement; i++) {
 123                                 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
 124                                         if (rbo->placements[i].fpfn < fpfn)
 125                                                 rbo->placements[i].fpfn = fpfn;
 126                                 } else {
 127                                         rbo->placement.busy_placement =
 128                                                 &rbo->placements[i];
 129                                         rbo->placement.num_busy_placement = 1;
 130                                 }
 131                         }
 132                 } else
 133                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 134                 break;
 135         case TTM_PL_TT:
 136         default:
 137                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 138         }
 139         *placement = rbo->placement;
 140 }
 141
 142 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 143 {
 144         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 145         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
 146
 147         if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
 148                 return -EPERM;
 149         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
 150                                           filp->private_data);
 151 }
 152
 153 static int radeon_move_blit(struct ttm_buffer_object *bo,
 154                         bool evict, bool no_wait_gpu,
 155                         struct ttm_resource *new_mem,
 156                         struct ttm_resource *old_mem)
 157 {
 158         struct radeon_device *rdev;
 159         uint64_t old_start, new_start;
 160         struct radeon_fence *fence;
 161         unsigned num_pages;
 162         int r, ridx;
 163
 164         rdev = radeon_get_rdev(bo->bdev);
 165         ridx = radeon_copy_ring_index(rdev);
 166         old_start = (u64)old_mem->start << PAGE_SHIFT;
 167         new_start = (u64)new_mem->start << PAGE_SHIFT;
 168
 169         switch (old_mem->mem_type) {
 170         case TTM_PL_VRAM:
 171                 old_start += rdev->mc.vram_start;
 172                 break;
 173         case TTM_PL_TT:
 174                 old_start += rdev->mc.gtt_start;
 175                 break;
 176         default:
 177                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 178                 return -EINVAL;
 179         }
 180         switch (new_mem->mem_type) {
 181         case TTM_PL_VRAM:
 182                 new_start += rdev->mc.vram_start;
 183                 break;
 184         case TTM_PL_TT:
 185                 new_start += rdev->mc.gtt_start;
 186                 break;
 187         default:
 188                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 189                 return -EINVAL;
 190         }
 191         if (!rdev->ring[ridx].ready) {
 192                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 193                 return -EINVAL;
 194         }
 195
 196         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 197
 198         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 199         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
 200         if (IS_ERR(fence))
 201                 return PTR_ERR(fence);
 202
 203         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
 204         radeon_fence_unref(&fence);
 205         return r;
 206 }
 207
 208 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 209                                 bool evict, bool interruptible,
 210                                 bool no_wait_gpu,
 211                                 struct ttm_resource *new_mem)
 212 {
 213         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 214         struct ttm_resource *old_mem = &bo->mem;
 215         struct ttm_resource tmp_mem;
 216         struct ttm_place placements;
 217         struct ttm_placement placement;
 218         int r;
 219
 220         tmp_mem = *new_mem;
 221         tmp_mem.mm_node = NULL;
 222         placement.num_placement = 1;
 223         placement.placement = &placements;
 224         placement.num_busy_placement = 1;
 225         placement.busy_placement = &placements;
 226         placements.fpfn = 0;
 227         placements.lpfn = 0;
 228         placements.mem_type = TTM_PL_TT;
 229         placements.flags = TTM_PL_MASK_CACHING;
 230         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 231         if (unlikely(r)) {
 232                 return r;
 233         }
 234
 235         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 236         if (unlikely(r)) {
 237                 goto out_cleanup;
 238         }
 239
 240         r = ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem, &ctx);
 241         if (unlikely(r)) {
 242                 goto out_cleanup;
 243         }
 244         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 245         if (unlikely(r)) {
 246                 goto out_cleanup;
 247         }
 248         r = ttm_bo_move_ttm(bo, &ctx, new_mem);
 249 out_cleanup:
 250         ttm_resource_free(bo, &tmp_mem);
 251         return r;
 252 }
 253
 254 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 255                                 bool evict, bool interruptible,
 256                                 bool no_wait_gpu,
 257                                 struct ttm_resource *new_mem)
 258 {
 259         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 260         struct ttm_resource *old_mem = &bo->mem;
 261         struct ttm_resource tmp_mem;
 262         struct ttm_placement placement;
 263         struct ttm_place placements;
 264         int r;
 265
 266         tmp_mem = *new_mem;
 267         tmp_mem.mm_node = NULL;
 268         placement.num_placement = 1;
 269         placement.placement = &placements;
 270         placement.num_busy_placement = 1;
 271         placement.busy_placement = &placements;
 272         placements.fpfn = 0;
 273         placements.lpfn = 0;
 274         placements.mem_type = TTM_PL_TT;
 275         placements.flags = TTM_PL_MASK_CACHING;
 276         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 277         if (unlikely(r)) {
 278                 return r;
 279         }
 280         r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
 281         if (unlikely(r)) {
 282                 goto out_cleanup;
 283         }
 284         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 285         if (unlikely(r)) {
 286                 goto out_cleanup;
 287         }
 288 out_cleanup:
 289         ttm_resource_free(bo, &tmp_mem);
 290         return r;
 291 }
 292
 293 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
 294                           struct ttm_operation_ctx *ctx,
 295                           struct ttm_resource *new_mem)
 296 {
 297         struct radeon_device *rdev;
 298         struct radeon_bo *rbo;
 299         struct ttm_resource *old_mem = &bo->mem;
 300         int r;
 301
 302         r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
 303         if (r)
 304                 return r;
 305
 306         /* Can't move a pinned BO */
 307         rbo = container_of(bo, struct radeon_bo, tbo);
 308         if (WARN_ON_ONCE(rbo->pin_count > 0))
 309                 return -EINVAL;
 310
 311         rdev = radeon_get_rdev(bo->bdev);
 312         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 313                 ttm_bo_move_null(bo, new_mem);
 314                 return 0;
 315         }
 316         if ((old_mem->mem_type == TTM_PL_TT &&
 317              new_mem->mem_type == TTM_PL_SYSTEM) ||
 318             (old_mem->mem_type == TTM_PL_SYSTEM &&
 319              new_mem->mem_type == TTM_PL_TT)) {
 320                 /* bind is enough */
 321                 ttm_bo_move_null(bo, new_mem);
 322                 return 0;
 323         }
 324         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 325             rdev->asic->copy.copy == NULL) {
 326                 /* use memcpy */
 327                 goto memcpy;
 328         }
 329
 330         if (old_mem->mem_type == TTM_PL_VRAM &&
 331             new_mem->mem_type == TTM_PL_SYSTEM) {
 332                 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
 333                                         ctx->no_wait_gpu, new_mem);
 334         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 335                    new_mem->mem_type == TTM_PL_VRAM) {
 336                 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
 337                                             ctx->no_wait_gpu, new_mem);
 338         } else {
 339                 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
 340                                      new_mem, old_mem);
 341         }
 342
 343         if (r) {
 344 memcpy:
 345                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
 346                 if (r) {
 347                         return r;
 348                 }
 349         }
 350
 351         /* update statistics */
 352         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
 353         return 0;
 354 }
 355
 356 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
 357 {
 358         struct radeon_device *rdev = radeon_get_rdev(bdev);
 359         size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
 360
 361         switch (mem->mem_type) {
 362         case TTM_PL_SYSTEM:
 363                 /* system memory */
 364                 return 0;
 365         case TTM_PL_TT:
 366 #if IS_ENABLED(CONFIG_AGP)
 367                 if (rdev->flags & RADEON_IS_AGP) {
 368                         /* RADEON_IS_AGP is set only if AGP is active */
 369                         mem->bus.offset = (mem->start << PAGE_SHIFT) +
 370                                 rdev->mc.agp_base;
 371                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 372                 }
 373 #endif
 374                 break;
 375         case TTM_PL_VRAM:
 376                 mem->bus.offset = mem->start << PAGE_SHIFT;
 377                 /* check if it's visible */
 378                 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
 379                         return -EINVAL;
 380                 mem->bus.offset += rdev->mc.aper_base;
 381                 mem->bus.is_iomem = true;
 382 #ifdef __alpha__
 383                 /*
 384                  * Alpha: use bus.addr to hold the ioremap() return,
 385                  * so we can modify bus.base below.
 386                  */
 387                 if (mem->placement & TTM_PL_FLAG_WC)
 388                         mem->bus.addr =
 389                                 ioremap_wc(mem->bus.offset, bus_size);
 390                 else
 391                         mem->bus.addr =
 392                                 ioremap(mem->bus.offset, bus_size);
 393                 if (!mem->bus.addr)
 394                         return -ENOMEM;
 395
 396                 /*
 397                  * Alpha: Use just the bus offset plus
 398                  * the hose/domain memory base for bus.base.
 399                  * It then can be used to build PTEs for VRAM
 400                  * access, as done in ttm_bo_vm_fault().
 401                  */
 402                 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
 403                         rdev->ddev->hose->dense_mem_base;
 404 #endif
 405                 break;
 406         default:
 407                 return -EINVAL;
 408         }
 409         return 0;
 410 }
 411
 412 /*
 413  * TTM backend functions.
 414  */
 415 struct radeon_ttm_tt {
 416         struct ttm_dma_tt               ttm;
 417         u64                             offset;
 418
 419         uint64_t                        userptr;
 420         struct mm_struct                *usermm;
 421         uint32_t                        userflags;
 422 };
 423
 424 /* prepare the sg table with the user pages */
 425 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 426 {
 427         struct radeon_device *rdev = radeon_get_rdev(bdev);
 428         struct radeon_ttm_tt *gtt = (void *)ttm;
 429         unsigned pinned = 0;
 430         int r;
 431
 432         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 433         enum dma_data_direction direction = write ?
 434                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 435
 436         if (current->mm != gtt->usermm)
 437                 return -EPERM;
 438
 439         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 440                 /* check that we only pin down anonymous memory
 441                    to prevent problems with writeback */
 442                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
 443                 struct vm_area_struct *vma;
 444                 vma = find_vma(gtt->usermm, gtt->userptr);
 445                 if (!vma || vma->vm_file || vma->vm_end < end)
 446                         return -EPERM;
 447         }
 448
 449         do {
 450                 unsigned num_pages = ttm->num_pages - pinned;
 451                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 452                 struct page **pages = ttm->pages + pinned;
 453
 454                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
 455                                    pages, NULL);
 456                 if (r < 0)
 457                         goto release_pages;
 458
 459                 pinned += r;
 460
 461         } while (pinned < ttm->num_pages);
 462
 463         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 464                                       ttm->num_pages << PAGE_SHIFT,
 465                                       GFP_KERNEL);
 466         if (r)
 467                 goto release_sg;
 468
 469         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
 470         if (r)
 471                 goto release_sg;
 472
 473         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 474                                          gtt->ttm.dma_address, ttm->num_pages);
 475
 476         return 0;
 477
 478 release_sg:
 479         kfree(ttm->sg);
 480
 481 release_pages:
 482         release_pages(ttm->pages, pinned);
 483         return r;
 484 }
 485
 486 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 487 {
 488         struct radeon_device *rdev = radeon_get_rdev(bdev);
 489         struct radeon_ttm_tt *gtt = (void *)ttm;
 490         struct sg_page_iter sg_iter;
 491
 492         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 493         enum dma_data_direction direction = write ?
 494                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 495
 496         /* double check that we don't free the table twice */
 497         if (!ttm->sg->sgl)
 498                 return;
 499
 500         /* free the sg table and pages again */
 501         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
 502
 503         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
 504                 struct page *page = sg_page_iter_page(&sg_iter);
 505                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 506                         set_page_dirty(page);
 507
 508                 mark_page_accessed(page);
 509                 put_page(page);
 510         }
 511
 512         sg_free_table(ttm->sg);
 513 }
 514
 515 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
 516                                    struct ttm_tt *ttm,
 517                                    struct ttm_resource *bo_mem)
 518 {
 519         struct radeon_ttm_tt *gtt = (void*)ttm;
 520         struct radeon_device *rdev = radeon_get_rdev(bdev);
 521         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 522                 RADEON_GART_PAGE_WRITE;
 523         int r;
 524
 525         if (gtt->userptr) {
 526                 radeon_ttm_tt_pin_userptr(bdev, ttm);
 527                 flags &= ~RADEON_GART_PAGE_WRITE;
 528         }
 529
 530         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 531         if (!ttm->num_pages) {
 532                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 533                      ttm->num_pages, bo_mem, ttm);
 534         }
 535         if (ttm->caching_state == tt_cached)
 536                 flags |= RADEON_GART_PAGE_SNOOP;
 537         r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
 538                              ttm->pages, gtt->ttm.dma_address, flags);
 539         if (r) {
 540                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 541                           ttm->num_pages, (unsigned)gtt->offset);
 542                 return r;
 543         }
 544         return 0;
 545 }
 546
 547 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 548 {
 549         struct radeon_ttm_tt *gtt = (void *)ttm;
 550         struct radeon_device *rdev = radeon_get_rdev(bdev);
 551
 552         radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
 553
 554         if (gtt->userptr)
 555                 radeon_ttm_tt_unpin_userptr(bdev, ttm);
 556 }
 557
 558 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 559 {
 560         struct radeon_ttm_tt *gtt = (void *)ttm;
 561
 562         ttm_dma_tt_fini(&gtt->ttm);
 563         kfree(gtt);
 564 }
 565
 566 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
 567                                            uint32_t page_flags)
 568 {
 569         struct radeon_device *rdev;
 570         struct radeon_ttm_tt *gtt;
 571
 572         rdev = radeon_get_rdev(bo->bdev);
 573 #if IS_ENABLED(CONFIG_AGP)
 574         if (rdev->flags & RADEON_IS_AGP) {
 575                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
 576                                          page_flags);
 577         }
 578 #endif
 579
 580         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 581         if (gtt == NULL) {
 582                 return NULL;
 583         }
 584         if (ttm_dma_tt_init(&gtt->ttm, bo, page_flags)) {
 585                 kfree(gtt);
 586                 return NULL;
 587         }
 588         return &gtt->ttm.ttm;
 589 }
 590
 591 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
 592                                                   struct ttm_tt *ttm)
 593 {
 594 #if IS_ENABLED(CONFIG_AGP)
 595         if (rdev->flags & RADEON_IS_AGP)
 596                 return NULL;
 597 #endif
 598
 599         if (!ttm)
 600                 return NULL;
 601         return container_of(ttm, struct radeon_ttm_tt, ttm.ttm);
 602 }
 603
 604 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
 605                                   struct ttm_tt *ttm,
 606                                   struct ttm_operation_ctx *ctx)
 607 {
 608         struct radeon_device *rdev = radeon_get_rdev(bdev);
 609         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 610         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 611
 612         if (gtt && gtt->userptr) {
 613                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
 614                 if (!ttm->sg)
 615                         return -ENOMEM;
 616
 617                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 618                 ttm->state = tt_unbound;
 619                 return 0;
 620         }
 621
 622         if (slave && ttm->sg) {
 623                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 624                                                  gtt->ttm.dma_address, ttm->num_pages);
 625                 ttm->state = tt_unbound;
 626                 return 0;
 627         }
 628
 629 #if IS_ENABLED(CONFIG_AGP)
 630         if (rdev->flags & RADEON_IS_AGP) {
 631                 return ttm_pool_populate(ttm, ctx);
 632         }
 633 #endif
 634
 635 #ifdef CONFIG_SWIOTLB
 636         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 637                 return ttm_dma_populate(&gtt->ttm, rdev->dev, ctx);
 638         }
 639 #endif
 640
 641         return ttm_populate_and_map_pages(rdev->dev, &gtt->ttm, ctx);
 642 }
 643
 644 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 645 {
 646         struct radeon_device *rdev = radeon_get_rdev(bdev);
 647         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 648         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 649
 650         if (gtt && gtt->userptr) {
 651                 kfree(ttm->sg);
 652                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 653                 return;
 654         }
 655
 656         if (slave)
 657                 return;
 658
 659 #if IS_ENABLED(CONFIG_AGP)
 660         if (rdev->flags & RADEON_IS_AGP) {
 661                 ttm_pool_unpopulate(ttm);
 662                 return;
 663         }
 664 #endif
 665
 666 #ifdef CONFIG_SWIOTLB
 667         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 668                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 669                 return;
 670         }
 671 #endif
 672
 673         ttm_unmap_and_unpopulate_pages(rdev->dev, &gtt->ttm);
 674 }
 675
 676 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
 677                               struct ttm_tt *ttm, uint64_t addr,
 678                               uint32_t flags)
 679 {
 680         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 681
 682         if (gtt == NULL)
 683                 return -EINVAL;
 684
 685         gtt->userptr = addr;
 686         gtt->usermm = current->mm;
 687         gtt->userflags = flags;
 688         return 0;
 689 }
 690
 691 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
 692                               struct ttm_tt *ttm,
 693                               struct ttm_resource *bo_mem)
 694 {
 695         struct radeon_device *rdev = radeon_get_rdev(bdev);
 696
 697 #if IS_ENABLED(CONFIG_AGP)
 698         if (rdev->flags & RADEON_IS_AGP)
 699                 return ttm_agp_bind(ttm, bo_mem);
 700 #endif
 701
 702         return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
 703 }
 704
 705 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
 706                                  struct ttm_tt *ttm)
 707 {
 708 #if IS_ENABLED(CONFIG_AGP)
 709         struct radeon_device *rdev = radeon_get_rdev(bdev);
 710
 711         if (rdev->flags & RADEON_IS_AGP) {
 712                 ttm_agp_unbind(ttm);
 713                 return;
 714         }
 715 #endif
 716         radeon_ttm_backend_unbind(bdev, ttm);
 717 }
 718
 719 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
 720                                   struct ttm_tt *ttm)
 721 {
 722 #if IS_ENABLED(CONFIG_AGP)
 723         struct radeon_device *rdev = radeon_get_rdev(bdev);
 724
 725         if (rdev->flags & RADEON_IS_AGP) {
 726                 ttm_agp_destroy(ttm);
 727                 return;
 728         }
 729 #endif
 730         radeon_ttm_backend_destroy(bdev, ttm);
 731 }
 732
 733 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
 734                                struct ttm_tt *ttm)
 735 {
 736         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 737
 738         if (gtt == NULL)
 739                 return false;
 740
 741         return !!gtt->userptr;
 742 }
 743
 744 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
 745                                struct ttm_tt *ttm)
 746 {
 747         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 748
 749         if (gtt == NULL)
 750                 return false;
 751
 752         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 753 }
 754
 755 static struct ttm_bo_driver radeon_bo_driver = {
 756         .ttm_tt_create = &radeon_ttm_tt_create,
 757         .ttm_tt_populate = &radeon_ttm_tt_populate,
 758         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 759         .ttm_tt_bind = &radeon_ttm_tt_bind,
 760         .ttm_tt_unbind = &radeon_ttm_tt_unbind,
 761         .ttm_tt_destroy = &radeon_ttm_tt_destroy,
 762         .eviction_valuable = ttm_bo_eviction_valuable,
 763         .evict_flags = &radeon_evict_flags,
 764         .move = &radeon_bo_move,
 765         .verify_access = &radeon_verify_access,
 766         .move_notify = &radeon_bo_move_notify,
 767         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 768         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 769 };
 770
 771 int radeon_ttm_init(struct radeon_device *rdev)
 772 {
 773         int r;
 774
 775         /* No others user of address space so set it to 0 */
 776         r = ttm_bo_device_init(&rdev->mman.bdev,
 777                                &radeon_bo_driver,
 778                                rdev->ddev->anon_inode->i_mapping,
 779                                rdev->ddev->vma_offset_manager,
 780                                dma_addressing_limited(&rdev->pdev->dev));
 781         if (r) {
 782                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 783                 return r;
 784         }
 785         rdev->mman.initialized = true;
 786
 787         r = radeon_ttm_init_vram(rdev);
 788         if (r) {
 789                 DRM_ERROR("Failed initializing VRAM heap.\n");
 790                 return r;
 791         }
 792         /* Change the size here instead of the init above so only lpfn is affected */
 793         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 794
 795         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 796                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
 797                              NULL, &rdev->stolen_vga_memory);
 798         if (r) {
 799                 return r;
 800         }
 801         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 802         if (r)
 803                 return r;
 804         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 805         radeon_bo_unreserve(rdev->stolen_vga_memory);
 806         if (r) {
 807                 radeon_bo_unref(&rdev->stolen_vga_memory);
 808                 return r;
 809         }
 810         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 811                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 812
 813         r = radeon_ttm_init_gtt(rdev);
 814         if (r) {
 815                 DRM_ERROR("Failed initializing GTT heap.\n");
 816                 return r;
 817         }
 818         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 819                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 820
 821         r = radeon_ttm_debugfs_init(rdev);
 822         if (r) {
 823                 DRM_ERROR("Failed to init debugfs\n");
 824                 return r;
 825         }
 826         return 0;
 827 }
 828
 829 void radeon_ttm_fini(struct radeon_device *rdev)
 830 {
 831         int r;
 832
 833         if (!rdev->mman.initialized)
 834                 return;
 835         radeon_ttm_debugfs_fini(rdev);
 836         if (rdev->stolen_vga_memory) {
 837                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 838                 if (r == 0) {
 839                         radeon_bo_unpin(rdev->stolen_vga_memory);
 840                         radeon_bo_unreserve(rdev->stolen_vga_memory);
 841                 }
 842                 radeon_bo_unref(&rdev->stolen_vga_memory);
 843         }
 844         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
 845         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
 846         ttm_bo_device_release(&rdev->mman.bdev);
 847         radeon_gart_fini(rdev);
 848         rdev->mman.initialized = false;
 849         DRM_INFO("radeon: ttm finalized\n");
 850 }
 851
 852 /* this should only be called at bootup or when userspace
 853  * isn't running */
 854 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 855 {
 856         struct ttm_resource_manager *man;
 857
 858         if (!rdev->mman.initialized)
 859                 return;
 860
 861         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
 862         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 863         man->size = size >> PAGE_SHIFT;
 864 }
 865
 866 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
 867 {
 868         struct ttm_buffer_object *bo;
 869         struct radeon_device *rdev;
 870         vm_fault_t ret;
 871
 872         bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
 873         if (bo == NULL)
 874                 return VM_FAULT_NOPAGE;
 875
 876         rdev = radeon_get_rdev(bo->bdev);
 877         down_read(&rdev->pm.mclk_lock);
 878         ret = ttm_bo_vm_fault(vmf);
 879         up_read(&rdev->pm.mclk_lock);
 880         return ret;
 881 }
 882
 883 static struct vm_operations_struct radeon_ttm_vm_ops = {
 884         .fault = radeon_ttm_fault,
 885         .open = ttm_bo_vm_open,
 886         .close = ttm_bo_vm_close,
 887         .access = ttm_bo_vm_access
 888 };
 889
 890 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 891 {
 892         int r;
 893         struct drm_file *file_priv = filp->private_data;
 894         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
 895
 896         if (rdev == NULL)
 897                 return -EINVAL;
 898
 899         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 900         if (unlikely(r != 0))
 901                 return r;
 902
 903         vma->vm_ops = &radeon_ttm_vm_ops;
 904         return 0;
 905 }
 906
 907 #if defined(CONFIG_DEBUG_FS)
 908
 909 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 910 {
 911         struct drm_info_node *node = (struct drm_info_node *)m->private;
 912         unsigned ttm_pl = *(int*)node->info_ent->data;
 913         struct drm_device *dev = node->minor->dev;
 914         struct radeon_device *rdev = dev->dev_private;
 915         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
 916         struct drm_printer p = drm_seq_file_printer(m);
 917
 918         man->func->debug(man, &p);
 919         return 0;
 920 }
 921
 922
 923 static int ttm_pl_vram = TTM_PL_VRAM;
 924 static int ttm_pl_tt = TTM_PL_TT;
 925
 926 static struct drm_info_list radeon_ttm_debugfs_list[] = {
 927         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
 928         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
 929         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
 930 #ifdef CONFIG_SWIOTLB
 931         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
 932 #endif
 933 };
 934
 935 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 936 {
 937         struct radeon_device *rdev = inode->i_private;
 938         i_size_write(inode, rdev->mc.mc_vram_size);
 939         filep->private_data = inode->i_private;
 940         return 0;
 941 }
 942
 943 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 944                                     size_t size, loff_t *pos)
 945 {
 946         struct radeon_device *rdev = f->private_data;
 947         ssize_t result = 0;
 948         int r;
 949
 950         if (size & 0x3 || *pos & 0x3)
 951                 return -EINVAL;
 952
 953         while (size) {
 954                 unsigned long flags;
 955                 uint32_t value;
 956
 957                 if (*pos >= rdev->mc.mc_vram_size)
 958                         return result;
 959
 960                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
 961                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
 962                 if (rdev->family >= CHIP_CEDAR)
 963                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
 964                 value = RREG32(RADEON_MM_DATA);
 965                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
 966
 967                 r = put_user(value, (uint32_t *)buf);
 968                 if (r)
 969                         return r;
 970
 971                 result += 4;
 972                 buf += 4;
 973                 *pos += 4;
 974                 size -= 4;
 975         }
 976
 977         return result;
 978 }
 979
 980 static const struct file_operations radeon_ttm_vram_fops = {
 981         .owner = THIS_MODULE,
 982         .open = radeon_ttm_vram_open,
 983         .read = radeon_ttm_vram_read,
 984         .llseek = default_llseek
 985 };
 986
 987 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
 988 {
 989         struct radeon_device *rdev = inode->i_private;
 990         i_size_write(inode, rdev->mc.gtt_size);
 991         filep->private_data = inode->i_private;
 992         return 0;
 993 }
 994
 995 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
 996                                    size_t size, loff_t *pos)
 997 {
 998         struct radeon_device *rdev = f->private_data;
 999         ssize_t result = 0;
1000         int r;
1001
1002         while (size) {
1003                 loff_t p = *pos / PAGE_SIZE;
1004                 unsigned off = *pos & ~PAGE_MASK;
1005                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1006                 struct page *page;
1007                 void *ptr;
1008
1009                 if (p >= rdev->gart.num_cpu_pages)
1010                         return result;
1011
1012                 page = rdev->gart.pages[p];
1013                 if (page) {
1014                         ptr = kmap(page);
1015                         ptr += off;
1016
1017                         r = copy_to_user(buf, ptr, cur_size);
1018                         kunmap(rdev->gart.pages[p]);
1019                 } else
1020                         r = clear_user(buf, cur_size);
1021
1022                 if (r)
1023                         return -EFAULT;
1024
1025                 result += cur_size;
1026                 buf += cur_size;
1027                 *pos += cur_size;
1028                 size -= cur_size;
1029         }
1030
1031         return result;
1032 }
1033
1034 static const struct file_operations radeon_ttm_gtt_fops = {
1035         .owner = THIS_MODULE,
1036         .open = radeon_ttm_gtt_open,
1037         .read = radeon_ttm_gtt_read,
1038         .llseek = default_llseek
1039 };
1040
1041 #endif
1042
1043 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1044 {
1045 #if defined(CONFIG_DEBUG_FS)
1046         unsigned count;
1047
1048         struct drm_minor *minor = rdev->ddev->primary;
1049         struct dentry *root = minor->debugfs_root;
1050
1051         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1052                                               root, rdev,
1053                                               &radeon_ttm_vram_fops);
1054
1055         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1056                                              root, rdev, &radeon_ttm_gtt_fops);
1057
1058         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1059
1060 #ifdef CONFIG_SWIOTLB
1061         if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1062                 --count;
1063 #endif
1064
1065         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1066 #else
1067
1068         return 0;
1069 #endif
1070 }
1071
1072 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1073 {
1074 #if defined(CONFIG_DEBUG_FS)
1075
1076         debugfs_remove(rdev->mman.vram);
1077         rdev->mman.vram = NULL;
1078
1079         debugfs_remove(rdev->mman.gtt);
1080         rdev->mman.gtt = NULL;
1081 #endif
1082 }