2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_debugfs.h>
43 #include <drm/drm_device.h>
44 #include <drm/drm_file.h>
45 #include <drm/drm_prime.h>
46 #include <drm/radeon_drm.h>
47 #include <drm/ttm/ttm_bo_api.h>
48 #include <drm/ttm/ttm_bo_driver.h>
49 #include <drm/ttm/ttm_module.h>
50 #include <drm/ttm/ttm_page_alloc.h>
51 #include <drm/ttm/ttm_placement.h>
53 #include "radeon_reg.h"
56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
59 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
61 struct radeon_mman *mman;
62 struct radeon_device *rdev;
64 mman = container_of(bdev, struct radeon_mman, bdev);
65 rdev = container_of(mman, struct radeon_device, mman);
69 static int radeon_ttm_init_vram(struct radeon_device *rdev)
71 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
72 TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
73 TTM_PL_FLAG_WC, false,
74 rdev->mc.real_vram_size >> PAGE_SHIFT);
77 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
79 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
81 TTM_PL_FLAG_CACHED, true,
82 rdev->mc.gtt_size >> PAGE_SHIFT);
85 static void radeon_evict_flags(struct ttm_buffer_object *bo,
86 struct ttm_placement *placement)
88 static const struct ttm_place placements = {
91 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
94 struct radeon_bo *rbo;
96 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
97 placement->placement = &placements;
98 placement->busy_placement = &placements;
99 placement->num_placement = 1;
100 placement->num_busy_placement = 1;
103 rbo = container_of(bo, struct radeon_bo, tbo);
104 switch (bo->mem.mem_type) {
106 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
107 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
108 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
109 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
110 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
113 /* Try evicting to the CPU inaccessible part of VRAM
114 * first, but only set GTT as busy placement, so this
115 * BO will be evicted to GTT rather than causing other
116 * BOs to be evicted from VRAM
118 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
119 RADEON_GEM_DOMAIN_GTT);
120 rbo->placement.num_busy_placement = 0;
121 for (i = 0; i < rbo->placement.num_placement; i++) {
122 if (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) {
123 if (rbo->placements[i].fpfn < fpfn)
124 rbo->placements[i].fpfn = fpfn;
126 rbo->placement.busy_placement =
128 rbo->placement.num_busy_placement = 1;
132 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
136 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
138 *placement = rbo->placement;
141 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
143 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
145 if (radeon_ttm_tt_has_userptr(bo->ttm))
147 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
151 static int radeon_move_blit(struct ttm_buffer_object *bo,
152 bool evict, bool no_wait_gpu,
153 struct ttm_resource *new_mem,
154 struct ttm_resource *old_mem)
156 struct radeon_device *rdev;
157 uint64_t old_start, new_start;
158 struct radeon_fence *fence;
162 rdev = radeon_get_rdev(bo->bdev);
163 ridx = radeon_copy_ring_index(rdev);
164 old_start = (u64)old_mem->start << PAGE_SHIFT;
165 new_start = (u64)new_mem->start << PAGE_SHIFT;
167 switch (old_mem->mem_type) {
169 old_start += rdev->mc.vram_start;
172 old_start += rdev->mc.gtt_start;
175 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
178 switch (new_mem->mem_type) {
180 new_start += rdev->mc.vram_start;
183 new_start += rdev->mc.gtt_start;
186 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
189 if (!rdev->ring[ridx].ready) {
190 DRM_ERROR("Trying to move memory with ring turned off.\n");
194 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
196 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
197 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
199 return PTR_ERR(fence);
201 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
202 radeon_fence_unref(&fence);
206 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
207 bool evict, bool interruptible,
209 struct ttm_resource *new_mem)
211 struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
212 struct ttm_resource *old_mem = &bo->mem;
213 struct ttm_resource tmp_mem;
214 struct ttm_place placements;
215 struct ttm_placement placement;
219 tmp_mem.mm_node = NULL;
220 placement.num_placement = 1;
221 placement.placement = &placements;
222 placement.num_busy_placement = 1;
223 placement.busy_placement = &placements;
226 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
227 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
232 r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
237 r = ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem, &ctx);
241 r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
245 r = ttm_bo_move_ttm(bo, &ctx, new_mem);
247 ttm_resource_free(bo, &tmp_mem);
251 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
252 bool evict, bool interruptible,
254 struct ttm_resource *new_mem)
256 struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
257 struct ttm_resource *old_mem = &bo->mem;
258 struct ttm_resource tmp_mem;
259 struct ttm_placement placement;
260 struct ttm_place placements;
264 tmp_mem.mm_node = NULL;
265 placement.num_placement = 1;
266 placement.placement = &placements;
267 placement.num_busy_placement = 1;
268 placement.busy_placement = &placements;
271 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
272 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
276 r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
280 r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
285 ttm_resource_free(bo, &tmp_mem);
289 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
290 struct ttm_operation_ctx *ctx,
291 struct ttm_resource *new_mem)
293 struct radeon_device *rdev;
294 struct radeon_bo *rbo;
295 struct ttm_resource *old_mem = &bo->mem;
298 r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
302 /* Can't move a pinned BO */
303 rbo = container_of(bo, struct radeon_bo, tbo);
304 if (WARN_ON_ONCE(rbo->pin_count > 0))
307 rdev = radeon_get_rdev(bo->bdev);
308 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
309 ttm_bo_move_null(bo, new_mem);
312 if ((old_mem->mem_type == TTM_PL_TT &&
313 new_mem->mem_type == TTM_PL_SYSTEM) ||
314 (old_mem->mem_type == TTM_PL_SYSTEM &&
315 new_mem->mem_type == TTM_PL_TT)) {
317 ttm_bo_move_null(bo, new_mem);
320 if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
321 rdev->asic->copy.copy == NULL) {
326 if (old_mem->mem_type == TTM_PL_VRAM &&
327 new_mem->mem_type == TTM_PL_SYSTEM) {
328 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
329 ctx->no_wait_gpu, new_mem);
330 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
331 new_mem->mem_type == TTM_PL_VRAM) {
332 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
333 ctx->no_wait_gpu, new_mem);
335 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
341 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
347 /* update statistics */
348 atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
352 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
354 struct radeon_device *rdev = radeon_get_rdev(bdev);
355 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
357 switch (mem->mem_type) {
362 #if IS_ENABLED(CONFIG_AGP)
363 if (rdev->flags & RADEON_IS_AGP) {
364 /* RADEON_IS_AGP is set only if AGP is active */
365 mem->bus.offset = (mem->start << PAGE_SHIFT) +
367 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
372 mem->bus.offset = mem->start << PAGE_SHIFT;
373 /* check if it's visible */
374 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
376 mem->bus.offset += rdev->mc.aper_base;
377 mem->bus.is_iomem = true;
380 * Alpha: use bus.addr to hold the ioremap() return,
381 * so we can modify bus.base below.
383 if (mem->placement & TTM_PL_FLAG_WC)
385 ioremap_wc(mem->bus.offset, bus_size);
388 ioremap(mem->bus.offset, bus_size);
393 * Alpha: Use just the bus offset plus
394 * the hose/domain memory base for bus.base.
395 * It then can be used to build PTEs for VRAM
396 * access, as done in ttm_bo_vm_fault().
398 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
399 rdev->ddev->hose->dense_mem_base;
409 * TTM backend functions.
411 struct radeon_ttm_tt {
412 struct ttm_dma_tt ttm;
416 struct mm_struct *usermm;
420 /* prepare the sg table with the user pages */
421 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
423 struct radeon_device *rdev = radeon_get_rdev(bdev);
424 struct radeon_ttm_tt *gtt = (void *)ttm;
428 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
429 enum dma_data_direction direction = write ?
430 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
432 if (current->mm != gtt->usermm)
435 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
436 /* check that we only pin down anonymous memory
437 to prevent problems with writeback */
438 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
439 struct vm_area_struct *vma;
440 vma = find_vma(gtt->usermm, gtt->userptr);
441 if (!vma || vma->vm_file || vma->vm_end < end)
446 unsigned num_pages = ttm->num_pages - pinned;
447 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
448 struct page **pages = ttm->pages + pinned;
450 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
457 } while (pinned < ttm->num_pages);
459 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
460 ttm->num_pages << PAGE_SHIFT,
465 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
469 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
470 gtt->ttm.dma_address, ttm->num_pages);
478 release_pages(ttm->pages, pinned);
482 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
484 struct radeon_device *rdev = radeon_get_rdev(bdev);
485 struct radeon_ttm_tt *gtt = (void *)ttm;
486 struct sg_page_iter sg_iter;
488 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
489 enum dma_data_direction direction = write ?
490 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
492 /* double check that we don't free the table twice */
496 /* free the sg table and pages again */
497 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
499 for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
500 struct page *page = sg_page_iter_page(&sg_iter);
501 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
502 set_page_dirty(page);
504 mark_page_accessed(page);
508 sg_free_table(ttm->sg);
511 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
513 struct ttm_resource *bo_mem)
515 struct radeon_ttm_tt *gtt = (void*)ttm;
516 struct radeon_device *rdev = radeon_get_rdev(bdev);
517 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
518 RADEON_GART_PAGE_WRITE;
522 radeon_ttm_tt_pin_userptr(bdev, ttm);
523 flags &= ~RADEON_GART_PAGE_WRITE;
526 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
527 if (!ttm->num_pages) {
528 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
529 ttm->num_pages, bo_mem, ttm);
531 if (ttm->caching_state == tt_cached)
532 flags |= RADEON_GART_PAGE_SNOOP;
533 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
534 ttm->pages, gtt->ttm.dma_address, flags);
536 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
537 ttm->num_pages, (unsigned)gtt->offset);
543 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
545 struct radeon_ttm_tt *gtt = (void *)ttm;
546 struct radeon_device *rdev = radeon_get_rdev(bdev);
548 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
551 radeon_ttm_tt_unpin_userptr(bdev, ttm);
554 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
556 struct radeon_ttm_tt *gtt = (void *)ttm;
558 ttm_dma_tt_fini(>t->ttm);
562 static struct ttm_backend_func radeon_backend_func = {
563 .bind = &radeon_ttm_backend_bind,
564 .unbind = &radeon_ttm_backend_unbind,
565 .destroy = &radeon_ttm_backend_destroy,
568 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
571 struct radeon_device *rdev;
572 struct radeon_ttm_tt *gtt;
574 rdev = radeon_get_rdev(bo->bdev);
575 #if IS_ENABLED(CONFIG_AGP)
576 if (rdev->flags & RADEON_IS_AGP) {
577 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
582 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
586 gtt->ttm.ttm.func = &radeon_backend_func;
587 if (ttm_dma_tt_init(>t->ttm, bo, page_flags)) {
591 return >t->ttm.ttm;
594 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct ttm_tt *ttm)
596 if (!ttm || ttm->func != &radeon_backend_func)
598 return (struct radeon_ttm_tt *)ttm;
601 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
603 struct ttm_operation_ctx *ctx)
605 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
606 struct radeon_device *rdev;
607 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
609 if (gtt && gtt->userptr) {
610 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
614 ttm->page_flags |= TTM_PAGE_FLAG_SG;
615 ttm->state = tt_unbound;
619 if (slave && ttm->sg) {
620 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
621 gtt->ttm.dma_address, ttm->num_pages);
622 ttm->state = tt_unbound;
626 rdev = radeon_get_rdev(bdev);
627 #if IS_ENABLED(CONFIG_AGP)
628 if (rdev->flags & RADEON_IS_AGP) {
629 return ttm_agp_tt_populate(bdev, ttm, ctx);
633 #ifdef CONFIG_SWIOTLB
634 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
635 return ttm_dma_populate(>t->ttm, rdev->dev, ctx);
639 return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx);
642 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
644 struct radeon_device *rdev;
645 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
646 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
648 if (gtt && gtt->userptr) {
650 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
657 rdev = radeon_get_rdev(bdev);
658 #if IS_ENABLED(CONFIG_AGP)
659 if (rdev->flags & RADEON_IS_AGP) {
660 ttm_agp_tt_unpopulate(bdev, ttm);
665 #ifdef CONFIG_SWIOTLB
666 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
667 ttm_dma_unpopulate(>t->ttm, rdev->dev);
672 ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm);
675 int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
678 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
684 gtt->usermm = current->mm;
685 gtt->userflags = flags;
689 bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm)
691 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
696 return !!gtt->userptr;
699 bool radeon_ttm_tt_is_readonly(struct ttm_tt *ttm)
701 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
706 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
709 static struct ttm_bo_driver radeon_bo_driver = {
710 .ttm_tt_create = &radeon_ttm_tt_create,
711 .ttm_tt_populate = &radeon_ttm_tt_populate,
712 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
713 .eviction_valuable = ttm_bo_eviction_valuable,
714 .evict_flags = &radeon_evict_flags,
715 .move = &radeon_bo_move,
716 .verify_access = &radeon_verify_access,
717 .move_notify = &radeon_bo_move_notify,
718 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
719 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
722 int radeon_ttm_init(struct radeon_device *rdev)
726 /* No others user of address space so set it to 0 */
727 r = ttm_bo_device_init(&rdev->mman.bdev,
729 rdev->ddev->anon_inode->i_mapping,
730 rdev->ddev->vma_offset_manager,
731 dma_addressing_limited(&rdev->pdev->dev));
733 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
736 rdev->mman.initialized = true;
738 r = radeon_ttm_init_vram(rdev);
740 DRM_ERROR("Failed initializing VRAM heap.\n");
743 /* Change the size here instead of the init above so only lpfn is affected */
744 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
746 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
747 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
748 NULL, &rdev->stolen_vga_memory);
752 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
755 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
756 radeon_bo_unreserve(rdev->stolen_vga_memory);
758 radeon_bo_unref(&rdev->stolen_vga_memory);
761 DRM_INFO("radeon: %uM of VRAM memory ready\n",
762 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
764 r = radeon_ttm_init_gtt(rdev);
766 DRM_ERROR("Failed initializing GTT heap.\n");
769 DRM_INFO("radeon: %uM of GTT memory ready.\n",
770 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
772 r = radeon_ttm_debugfs_init(rdev);
774 DRM_ERROR("Failed to init debugfs\n");
780 void radeon_ttm_fini(struct radeon_device *rdev)
784 if (!rdev->mman.initialized)
786 radeon_ttm_debugfs_fini(rdev);
787 if (rdev->stolen_vga_memory) {
788 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
790 radeon_bo_unpin(rdev->stolen_vga_memory);
791 radeon_bo_unreserve(rdev->stolen_vga_memory);
793 radeon_bo_unref(&rdev->stolen_vga_memory);
795 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
796 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
797 ttm_bo_device_release(&rdev->mman.bdev);
798 radeon_gart_fini(rdev);
799 rdev->mman.initialized = false;
800 DRM_INFO("radeon: ttm finalized\n");
803 /* this should only be called at bootup or when userspace
805 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
807 struct ttm_resource_manager *man;
809 if (!rdev->mman.initialized)
812 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
813 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
814 man->size = size >> PAGE_SHIFT;
817 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
819 struct ttm_buffer_object *bo;
820 struct radeon_device *rdev;
823 bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
825 return VM_FAULT_NOPAGE;
827 rdev = radeon_get_rdev(bo->bdev);
828 down_read(&rdev->pm.mclk_lock);
829 ret = ttm_bo_vm_fault(vmf);
830 up_read(&rdev->pm.mclk_lock);
834 static struct vm_operations_struct radeon_ttm_vm_ops = {
835 .fault = radeon_ttm_fault,
836 .open = ttm_bo_vm_open,
837 .close = ttm_bo_vm_close,
838 .access = ttm_bo_vm_access
841 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
844 struct drm_file *file_priv = filp->private_data;
845 struct radeon_device *rdev = file_priv->minor->dev->dev_private;
850 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
851 if (unlikely(r != 0))
854 vma->vm_ops = &radeon_ttm_vm_ops;
858 #if defined(CONFIG_DEBUG_FS)
860 static int radeon_mm_dump_table(struct seq_file *m, void *data)
862 struct drm_info_node *node = (struct drm_info_node *)m->private;
863 unsigned ttm_pl = *(int*)node->info_ent->data;
864 struct drm_device *dev = node->minor->dev;
865 struct radeon_device *rdev = dev->dev_private;
866 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
867 struct drm_printer p = drm_seq_file_printer(m);
869 man->func->debug(man, &p);
874 static int ttm_pl_vram = TTM_PL_VRAM;
875 static int ttm_pl_tt = TTM_PL_TT;
877 static struct drm_info_list radeon_ttm_debugfs_list[] = {
878 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
879 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
880 {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
881 #ifdef CONFIG_SWIOTLB
882 {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
886 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
888 struct radeon_device *rdev = inode->i_private;
889 i_size_write(inode, rdev->mc.mc_vram_size);
890 filep->private_data = inode->i_private;
894 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
895 size_t size, loff_t *pos)
897 struct radeon_device *rdev = f->private_data;
901 if (size & 0x3 || *pos & 0x3)
908 if (*pos >= rdev->mc.mc_vram_size)
911 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
912 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
913 if (rdev->family >= CHIP_CEDAR)
914 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
915 value = RREG32(RADEON_MM_DATA);
916 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
918 r = put_user(value, (uint32_t *)buf);
931 static const struct file_operations radeon_ttm_vram_fops = {
932 .owner = THIS_MODULE,
933 .open = radeon_ttm_vram_open,
934 .read = radeon_ttm_vram_read,
935 .llseek = default_llseek
938 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
940 struct radeon_device *rdev = inode->i_private;
941 i_size_write(inode, rdev->mc.gtt_size);
942 filep->private_data = inode->i_private;
946 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
947 size_t size, loff_t *pos)
949 struct radeon_device *rdev = f->private_data;
954 loff_t p = *pos / PAGE_SIZE;
955 unsigned off = *pos & ~PAGE_MASK;
956 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
960 if (p >= rdev->gart.num_cpu_pages)
963 page = rdev->gart.pages[p];
968 r = copy_to_user(buf, ptr, cur_size);
969 kunmap(rdev->gart.pages[p]);
971 r = clear_user(buf, cur_size);
985 static const struct file_operations radeon_ttm_gtt_fops = {
986 .owner = THIS_MODULE,
987 .open = radeon_ttm_gtt_open,
988 .read = radeon_ttm_gtt_read,
989 .llseek = default_llseek
994 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
996 #if defined(CONFIG_DEBUG_FS)
999 struct drm_minor *minor = rdev->ddev->primary;
1000 struct dentry *root = minor->debugfs_root;
1002 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1004 &radeon_ttm_vram_fops);
1006 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1007 root, rdev, &radeon_ttm_gtt_fops);
1009 count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1011 #ifdef CONFIG_SWIOTLB
1012 if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1016 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1023 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1025 #if defined(CONFIG_DEBUG_FS)
1027 debugfs_remove(rdev->mman.vram);
1028 rdev->mman.vram = NULL;
1030 debugfs_remove(rdev->mman.gtt);
1031 rdev->mman.gtt = NULL;