2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <drm/radeon_drm.h>
31 #include "radeon_reg.h"
32 #include "radeon_trace.h"
36 * The GART (Graphics Aperture Remapping Table) is an aperture
37 * in the GPU's address space. System pages can be mapped into
38 * the aperture and look like contiguous pages from the GPU's
39 * perspective. A page table maps the pages in the aperture
40 * to the actual backing pages in system memory.
42 * Radeon GPUs support both an internal GART, as described above,
43 * and AGP. AGP works similarly, but the GART table is configured
44 * and maintained by the northbridge rather than the driver.
45 * Radeon hw has a separate AGP aperture that is programmed to
46 * point to the AGP aperture provided by the northbridge and the
47 * requests are passed through to the northbridge aperture.
48 * Both AGP and internal GART can be used at the same time, however
49 * that is not currently supported by the driver.
51 * This file handles the common internal GART management.
55 * Common GART table functions.
58 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
60 * @rdev: radeon_device pointer
62 * Allocate system memory for GART page table
63 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
64 * gart table to be in system memory.
65 * Returns 0 for success, -ENOMEM for failure.
67 int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
71 ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
72 &rdev->gart.table_addr);
77 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
78 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
79 set_memory_uc((unsigned long)ptr,
80 rdev->gart.table_size >> PAGE_SHIFT);
84 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size);
89 * radeon_gart_table_ram_free - free system ram for gart page table
91 * @rdev: radeon_device pointer
93 * Free system memory for GART page table
94 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
95 * gart table to be in system memory.
97 void radeon_gart_table_ram_free(struct radeon_device *rdev)
99 if (rdev->gart.ptr == NULL) {
103 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
104 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
105 set_memory_wb((unsigned long)rdev->gart.ptr,
106 rdev->gart.table_size >> PAGE_SHIFT);
109 pci_free_consistent(rdev->pdev, rdev->gart.table_size,
110 (void *)rdev->gart.ptr,
111 rdev->gart.table_addr);
112 rdev->gart.ptr = NULL;
113 rdev->gart.table_addr = 0;
117 * radeon_gart_table_vram_alloc - allocate vram for gart page table
119 * @rdev: radeon_device pointer
121 * Allocate video memory for GART page table
122 * (pcie r4xx, r5xx+). These asics require the
123 * gart table to be in video memory.
124 * Returns 0 for success, error for failure.
126 int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
130 if (rdev->gart.robj == NULL) {
131 r = radeon_bo_create(rdev, rdev->gart.table_size,
132 PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
133 NULL, &rdev->gart.robj);
142 * radeon_gart_table_vram_pin - pin gart page table in vram
144 * @rdev: radeon_device pointer
146 * Pin the GART page table in vram so it will not be moved
147 * by the memory manager (pcie r4xx, r5xx+). These asics require the
148 * gart table to be in video memory.
149 * Returns 0 for success, error for failure.
151 int radeon_gart_table_vram_pin(struct radeon_device *rdev)
156 r = radeon_bo_reserve(rdev->gart.robj, false);
157 if (unlikely(r != 0))
159 r = radeon_bo_pin(rdev->gart.robj,
160 RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
162 radeon_bo_unreserve(rdev->gart.robj);
165 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
167 radeon_bo_unpin(rdev->gart.robj);
168 radeon_bo_unreserve(rdev->gart.robj);
169 rdev->gart.table_addr = gpu_addr;
174 * radeon_gart_table_vram_unpin - unpin gart page table in vram
176 * @rdev: radeon_device pointer
178 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
179 * These asics require the gart table to be in video memory.
181 void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
185 if (rdev->gart.robj == NULL) {
188 r = radeon_bo_reserve(rdev->gart.robj, false);
189 if (likely(r == 0)) {
190 radeon_bo_kunmap(rdev->gart.robj);
191 radeon_bo_unpin(rdev->gart.robj);
192 radeon_bo_unreserve(rdev->gart.robj);
193 rdev->gart.ptr = NULL;
198 * radeon_gart_table_vram_free - free gart page table vram
200 * @rdev: radeon_device pointer
202 * Free the video memory used for the GART page table
203 * (pcie r4xx, r5xx+). These asics require the gart table to
204 * be in video memory.
206 void radeon_gart_table_vram_free(struct radeon_device *rdev)
208 if (rdev->gart.robj == NULL) {
211 radeon_bo_unref(&rdev->gart.robj);
215 * Common gart functions.
218 * radeon_gart_unbind - unbind pages from the gart page table
220 * @rdev: radeon_device pointer
221 * @offset: offset into the GPU's gart aperture
222 * @pages: number of pages to unbind
224 * Unbinds the requested pages from the gart page table and
225 * replaces them with the dummy page (all asics).
227 void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
235 if (!rdev->gart.ready) {
236 WARN(1, "trying to unbind memory from uninitialized GART !\n");
239 t = offset / RADEON_GPU_PAGE_SIZE;
240 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
241 for (i = 0; i < pages; i++, p++) {
242 if (rdev->gart.pages[p]) {
243 rdev->gart.pages[p] = NULL;
244 rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
245 page_base = rdev->gart.pages_addr[p];
246 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
247 if (rdev->gart.ptr) {
248 radeon_gart_set_page(rdev, t, page_base);
250 page_base += RADEON_GPU_PAGE_SIZE;
255 radeon_gart_tlb_flush(rdev);
259 * radeon_gart_bind - bind pages into the gart page table
261 * @rdev: radeon_device pointer
262 * @offset: offset into the GPU's gart aperture
263 * @pages: number of pages to bind
264 * @pagelist: pages to bind
265 * @dma_addr: DMA addresses of pages
267 * Binds the requested pages to the gart page table
269 * Returns 0 for success, -EINVAL for failure.
271 int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
272 int pages, struct page **pagelist, dma_addr_t *dma_addr)
279 if (!rdev->gart.ready) {
280 WARN(1, "trying to bind memory to uninitialized GART !\n");
283 t = offset / RADEON_GPU_PAGE_SIZE;
284 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
286 for (i = 0; i < pages; i++, p++) {
287 rdev->gart.pages_addr[p] = dma_addr[i];
288 rdev->gart.pages[p] = pagelist[i];
289 if (rdev->gart.ptr) {
290 page_base = rdev->gart.pages_addr[p];
291 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
292 radeon_gart_set_page(rdev, t, page_base);
293 page_base += RADEON_GPU_PAGE_SIZE;
298 radeon_gart_tlb_flush(rdev);
303 * radeon_gart_restore - bind all pages in the gart page table
305 * @rdev: radeon_device pointer
307 * Binds all pages in the gart page table (all asics).
308 * Used to rebuild the gart table on device startup or resume.
310 void radeon_gart_restore(struct radeon_device *rdev)
315 if (!rdev->gart.ptr) {
318 for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
319 page_base = rdev->gart.pages_addr[i];
320 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
321 radeon_gart_set_page(rdev, t, page_base);
322 page_base += RADEON_GPU_PAGE_SIZE;
326 radeon_gart_tlb_flush(rdev);
330 * radeon_gart_init - init the driver info for managing the gart
332 * @rdev: radeon_device pointer
334 * Allocate the dummy page and init the gart driver info (all asics).
335 * Returns 0 for success, error for failure.
337 int radeon_gart_init(struct radeon_device *rdev)
341 if (rdev->gart.pages) {
344 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
345 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
346 DRM_ERROR("Page size is smaller than GPU page size!\n");
349 r = radeon_dummy_page_init(rdev);
352 /* Compute table size */
353 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
354 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
355 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
356 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
357 /* Allocate pages table */
358 rdev->gart.pages = vzalloc(sizeof(void *) * rdev->gart.num_cpu_pages);
359 if (rdev->gart.pages == NULL) {
360 radeon_gart_fini(rdev);
363 rdev->gart.pages_addr = vzalloc(sizeof(dma_addr_t) *
364 rdev->gart.num_cpu_pages);
365 if (rdev->gart.pages_addr == NULL) {
366 radeon_gart_fini(rdev);
369 /* set GART entry to point to the dummy page by default */
370 for (i = 0; i < rdev->gart.num_cpu_pages; i++) {
371 rdev->gart.pages_addr[i] = rdev->dummy_page.addr;
377 * radeon_gart_fini - tear down the driver info for managing the gart
379 * @rdev: radeon_device pointer
381 * Tear down the gart driver info and free the dummy page (all asics).
383 void radeon_gart_fini(struct radeon_device *rdev)
385 if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
387 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
389 rdev->gart.ready = false;
390 vfree(rdev->gart.pages);
391 vfree(rdev->gart.pages_addr);
392 rdev->gart.pages = NULL;
393 rdev->gart.pages_addr = NULL;
395 radeon_dummy_page_fini(rdev);
400 * GPUVM is similar to the legacy gart on older asics, however
401 * rather than there being a single global gart table
402 * for the entire GPU, there are multiple VM page tables active
403 * at any given time. The VM page tables can contain a mix
404 * vram pages and system memory pages and system memory pages
405 * can be mapped as snooped (cached system pages) or unsnooped
406 * (uncached system pages).
407 * Each VM has an ID associated with it and there is a page table
408 * associated with each VMID. When execting a command buffer,
409 * the kernel tells the the ring what VMID to use for that command
410 * buffer. VMIDs are allocated dynamically as commands are submitted.
411 * The userspace drivers maintain their own address space and the kernel
412 * sets up their pages tables accordingly when they submit their
413 * command buffers and a VMID is assigned.
414 * Cayman/Trinity support up to 8 active VMs at any given time;
421 * TODO bind a default page at vm initialization for default address
425 * radeon_vm_num_pde - return the number of page directory entries
427 * @rdev: radeon_device pointer
429 * Calculate the number of page directory entries (cayman+).
431 static unsigned radeon_vm_num_pdes(struct radeon_device *rdev)
433 return rdev->vm_manager.max_pfn >> RADEON_VM_BLOCK_SIZE;
437 * radeon_vm_directory_size - returns the size of the page directory in bytes
439 * @rdev: radeon_device pointer
441 * Calculate the size of the page directory in bytes (cayman+).
443 static unsigned radeon_vm_directory_size(struct radeon_device *rdev)
445 return RADEON_GPU_PAGE_ALIGN(radeon_vm_num_pdes(rdev) * 8);
449 * radeon_vm_manager_init - init the vm manager
451 * @rdev: radeon_device pointer
453 * Init the vm manager (cayman+).
454 * Returns 0 for success, error for failure.
456 int radeon_vm_manager_init(struct radeon_device *rdev)
458 struct radeon_vm *vm;
459 struct radeon_bo_va *bo_va;
463 if (!rdev->vm_manager.enabled) {
464 /* allocate enough for 2 full VM pts */
465 size = radeon_vm_directory_size(rdev);
466 size += rdev->vm_manager.max_pfn * 8;
468 r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
469 RADEON_GPU_PAGE_ALIGN(size),
470 RADEON_VM_PTB_ALIGN_SIZE,
471 RADEON_GEM_DOMAIN_VRAM);
473 dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
474 (rdev->vm_manager.max_pfn * 8) >> 10);
478 r = radeon_asic_vm_init(rdev);
482 rdev->vm_manager.enabled = true;
484 r = radeon_sa_bo_manager_start(rdev, &rdev->vm_manager.sa_manager);
489 /* restore page table */
490 list_for_each_entry(vm, &rdev->vm_manager.lru_vm, list) {
491 if (vm->page_directory == NULL)
494 list_for_each_entry(bo_va, &vm->va, vm_list) {
495 bo_va->valid = false;
502 * radeon_vm_free_pt - free the page table for a specific vm
504 * @rdev: radeon_device pointer
507 * Free the page table of a specific vm (cayman+).
509 * Global and local mutex must be lock!
511 static void radeon_vm_free_pt(struct radeon_device *rdev,
512 struct radeon_vm *vm)
514 struct radeon_bo_va *bo_va;
517 if (!vm->page_directory)
520 list_del_init(&vm->list);
521 radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
523 list_for_each_entry(bo_va, &vm->va, vm_list) {
524 bo_va->valid = false;
527 if (vm->page_tables == NULL)
530 for (i = 0; i < radeon_vm_num_pdes(rdev); i++)
531 radeon_sa_bo_free(rdev, &vm->page_tables[i], vm->fence);
533 kfree(vm->page_tables);
537 * radeon_vm_manager_fini - tear down the vm manager
539 * @rdev: radeon_device pointer
541 * Tear down the VM manager (cayman+).
543 void radeon_vm_manager_fini(struct radeon_device *rdev)
545 struct radeon_vm *vm, *tmp;
548 if (!rdev->vm_manager.enabled)
551 mutex_lock(&rdev->vm_manager.lock);
552 /* free all allocated page tables */
553 list_for_each_entry_safe(vm, tmp, &rdev->vm_manager.lru_vm, list) {
554 mutex_lock(&vm->mutex);
555 radeon_vm_free_pt(rdev, vm);
556 mutex_unlock(&vm->mutex);
558 for (i = 0; i < RADEON_NUM_VM; ++i) {
559 radeon_fence_unref(&rdev->vm_manager.active[i]);
561 radeon_asic_vm_fini(rdev);
562 mutex_unlock(&rdev->vm_manager.lock);
564 radeon_sa_bo_manager_suspend(rdev, &rdev->vm_manager.sa_manager);
565 radeon_sa_bo_manager_fini(rdev, &rdev->vm_manager.sa_manager);
566 rdev->vm_manager.enabled = false;
570 * radeon_vm_evict - evict page table to make room for new one
572 * @rdev: radeon_device pointer
573 * @vm: VM we want to allocate something for
575 * Evict a VM from the lru, making sure that it isn't @vm. (cayman+).
576 * Returns 0 for success, -ENOMEM for failure.
578 * Global and local mutex must be locked!
580 static int radeon_vm_evict(struct radeon_device *rdev, struct radeon_vm *vm)
582 struct radeon_vm *vm_evict;
584 if (list_empty(&rdev->vm_manager.lru_vm))
587 vm_evict = list_first_entry(&rdev->vm_manager.lru_vm,
588 struct radeon_vm, list);
592 mutex_lock(&vm_evict->mutex);
593 radeon_vm_free_pt(rdev, vm_evict);
594 mutex_unlock(&vm_evict->mutex);
599 * radeon_vm_alloc_pt - allocates a page table for a VM
601 * @rdev: radeon_device pointer
604 * Allocate a page table for the requested vm (cayman+).
605 * Returns 0 for success, error for failure.
607 * Global and local mutex must be locked!
609 int radeon_vm_alloc_pt(struct radeon_device *rdev, struct radeon_vm *vm)
611 unsigned pd_size, pd_entries, pts_size;
619 if (vm->page_directory != NULL) {
623 pd_size = radeon_vm_directory_size(rdev);
624 pd_entries = radeon_vm_num_pdes(rdev);
627 r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
628 &vm->page_directory, pd_size,
629 RADEON_VM_PTB_ALIGN_SIZE, false);
631 r = radeon_vm_evict(rdev, vm);
640 vm->pd_gpu_addr = radeon_sa_bo_gpu_addr(vm->page_directory);
642 /* Initially clear the page directory */
643 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib,
644 NULL, pd_entries * 2 + 64);
646 radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
652 radeon_asic_vm_set_page(rdev, &ib, vm->pd_gpu_addr,
653 0, pd_entries, 0, 0);
655 radeon_semaphore_sync_to(ib.semaphore, vm->fence);
656 r = radeon_ib_schedule(rdev, &ib, NULL);
658 radeon_ib_free(rdev, &ib);
659 radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
662 radeon_fence_unref(&vm->fence);
663 vm->fence = radeon_fence_ref(ib.fence);
664 radeon_ib_free(rdev, &ib);
665 radeon_fence_unref(&vm->last_flush);
667 /* allocate page table array */
668 pts_size = radeon_vm_num_pdes(rdev) * sizeof(struct radeon_sa_bo *);
669 vm->page_tables = kzalloc(pts_size, GFP_KERNEL);
671 if (vm->page_tables == NULL) {
672 DRM_ERROR("Cannot allocate memory for page table array\n");
673 radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
681 * radeon_vm_add_to_lru - add VMs page table to LRU list
683 * @rdev: radeon_device pointer
684 * @vm: vm to add to LRU
686 * Add the allocated page table to the LRU list (cayman+).
688 * Global mutex must be locked!
690 void radeon_vm_add_to_lru(struct radeon_device *rdev, struct radeon_vm *vm)
692 list_del_init(&vm->list);
693 list_add_tail(&vm->list, &rdev->vm_manager.lru_vm);
697 * radeon_vm_grab_id - allocate the next free VMID
699 * @rdev: radeon_device pointer
700 * @vm: vm to allocate id for
701 * @ring: ring we want to submit job to
703 * Allocate an id for the vm (cayman+).
704 * Returns the fence we need to sync to (if any).
706 * Global and local mutex must be locked!
708 struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
709 struct radeon_vm *vm, int ring)
711 struct radeon_fence *best[RADEON_NUM_RINGS] = {};
712 unsigned choices[2] = {};
715 /* check if the id is still valid */
716 if (vm->fence && vm->fence == rdev->vm_manager.active[vm->id])
719 /* we definately need to flush */
720 radeon_fence_unref(&vm->last_flush);
722 /* skip over VMID 0, since it is the system VM */
723 for (i = 1; i < rdev->vm_manager.nvm; ++i) {
724 struct radeon_fence *fence = rdev->vm_manager.active[i];
727 /* found a free one */
732 if (radeon_fence_is_earlier(fence, best[fence->ring])) {
733 best[fence->ring] = fence;
734 choices[fence->ring == ring ? 0 : 1] = i;
738 for (i = 0; i < 2; ++i) {
741 trace_radeon_vm_grab_id(vm->id, ring);
742 return rdev->vm_manager.active[choices[i]];
746 /* should never happen */
752 * radeon_vm_fence - remember fence for vm
754 * @rdev: radeon_device pointer
755 * @vm: vm we want to fence
756 * @fence: fence to remember
758 * Fence the vm (cayman+).
759 * Set the fence used to protect page table and id.
761 * Global and local mutex must be locked!
763 void radeon_vm_fence(struct radeon_device *rdev,
764 struct radeon_vm *vm,
765 struct radeon_fence *fence)
767 radeon_fence_unref(&rdev->vm_manager.active[vm->id]);
768 rdev->vm_manager.active[vm->id] = radeon_fence_ref(fence);
770 radeon_fence_unref(&vm->fence);
771 vm->fence = radeon_fence_ref(fence);
775 * radeon_vm_bo_find - find the bo_va for a specific vm & bo
778 * @bo: requested buffer object
780 * Find @bo inside the requested vm (cayman+).
781 * Search inside the @bos vm list for the requested vm
782 * Returns the found bo_va or NULL if none is found
784 * Object has to be reserved!
786 struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm,
787 struct radeon_bo *bo)
789 struct radeon_bo_va *bo_va;
791 list_for_each_entry(bo_va, &bo->va, bo_list) {
792 if (bo_va->vm == vm) {
800 * radeon_vm_bo_add - add a bo to a specific vm
802 * @rdev: radeon_device pointer
804 * @bo: radeon buffer object
806 * Add @bo into the requested vm (cayman+).
807 * Add @bo to the list of bos associated with the vm
808 * Returns newly added bo_va or NULL for failure
810 * Object has to be reserved!
812 struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev,
813 struct radeon_vm *vm,
814 struct radeon_bo *bo)
816 struct radeon_bo_va *bo_va;
818 bo_va = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
827 bo_va->valid = false;
828 bo_va->ref_count = 1;
829 INIT_LIST_HEAD(&bo_va->bo_list);
830 INIT_LIST_HEAD(&bo_va->vm_list);
832 mutex_lock(&vm->mutex);
833 list_add(&bo_va->vm_list, &vm->va);
834 list_add_tail(&bo_va->bo_list, &bo->va);
835 mutex_unlock(&vm->mutex);
841 * radeon_vm_bo_set_addr - set bos virtual address inside a vm
843 * @rdev: radeon_device pointer
844 * @bo_va: bo_va to store the address
845 * @soffset: requested offset of the buffer in the VM address space
846 * @flags: attributes of pages (read/write/valid/etc.)
848 * Set offset of @bo_va (cayman+).
849 * Validate and set the offset requested within the vm address space.
850 * Returns 0 for success, error for failure.
852 * Object has to be reserved!
854 int radeon_vm_bo_set_addr(struct radeon_device *rdev,
855 struct radeon_bo_va *bo_va,
859 uint64_t size = radeon_bo_size(bo_va->bo);
860 uint64_t eoffset, last_offset = 0;
861 struct radeon_vm *vm = bo_va->vm;
862 struct radeon_bo_va *tmp;
863 struct list_head *head;
867 /* make sure object fit at this offset */
868 eoffset = soffset + size;
869 if (soffset >= eoffset) {
873 last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
874 if (last_pfn > rdev->vm_manager.max_pfn) {
875 dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
876 last_pfn, rdev->vm_manager.max_pfn);
881 eoffset = last_pfn = 0;
884 mutex_lock(&vm->mutex);
887 list_for_each_entry(tmp, &vm->va, vm_list) {
889 /* skip over currently modified bo */
893 if (soffset >= last_offset && eoffset <= tmp->soffset) {
894 /* bo can be added before this one */
897 if (eoffset > tmp->soffset && soffset < tmp->eoffset) {
898 /* bo and tmp overlap, invalid offset */
899 dev_err(rdev->dev, "bo %p va 0x%08X conflict with (bo %p 0x%08X 0x%08X)\n",
900 bo_va->bo, (unsigned)bo_va->soffset, tmp->bo,
901 (unsigned)tmp->soffset, (unsigned)tmp->eoffset);
902 mutex_unlock(&vm->mutex);
905 last_offset = tmp->eoffset;
906 head = &tmp->vm_list;
909 bo_va->soffset = soffset;
910 bo_va->eoffset = eoffset;
911 bo_va->flags = flags;
912 bo_va->valid = false;
913 list_move(&bo_va->vm_list, head);
915 mutex_unlock(&vm->mutex);
920 * radeon_vm_map_gart - get the physical address of a gart page
922 * @rdev: radeon_device pointer
923 * @addr: the unmapped addr
925 * Look up the physical address of the page that the pte resolves
927 * Returns the physical address of the page.
929 uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr)
933 /* page table offset */
934 result = rdev->gart.pages_addr[addr >> PAGE_SHIFT];
936 /* in case cpu page size != gpu page size*/
937 result |= addr & (~PAGE_MASK);
943 * radeon_vm_page_flags - translate page flags to what the hw uses
945 * @flags: flags comming from userspace
947 * Translate the flags the userspace ABI uses to hw flags.
949 static uint32_t radeon_vm_page_flags(uint32_t flags)
951 uint32_t hw_flags = 0;
952 hw_flags |= (flags & RADEON_VM_PAGE_VALID) ? R600_PTE_VALID : 0;
953 hw_flags |= (flags & RADEON_VM_PAGE_READABLE) ? R600_PTE_READABLE : 0;
954 hw_flags |= (flags & RADEON_VM_PAGE_WRITEABLE) ? R600_PTE_WRITEABLE : 0;
955 if (flags & RADEON_VM_PAGE_SYSTEM) {
956 hw_flags |= R600_PTE_SYSTEM;
957 hw_flags |= (flags & RADEON_VM_PAGE_SNOOPED) ? R600_PTE_SNOOPED : 0;
963 * radeon_vm_update_pdes - make sure that page directory is valid
965 * @rdev: radeon_device pointer
967 * @start: start of GPU address range
968 * @end: end of GPU address range
970 * Allocates new page tables if necessary
971 * and updates the page directory (cayman+).
972 * Returns 0 for success, error for failure.
974 * Global and local mutex must be locked!
976 static int radeon_vm_update_pdes(struct radeon_device *rdev,
977 struct radeon_vm *vm,
978 struct radeon_ib *ib,
979 uint64_t start, uint64_t end)
981 static const uint32_t incr = RADEON_VM_PTE_COUNT * 8;
983 uint64_t last_pde = ~0, last_pt = ~0;
988 start = (start / RADEON_GPU_PAGE_SIZE) >> RADEON_VM_BLOCK_SIZE;
989 end = (end / RADEON_GPU_PAGE_SIZE) >> RADEON_VM_BLOCK_SIZE;
991 /* walk over the address space and update the page directory */
992 for (pt_idx = start; pt_idx <= end; ++pt_idx) {
995 if (vm->page_tables[pt_idx])
999 r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
1000 &vm->page_tables[pt_idx],
1001 RADEON_VM_PTE_COUNT * 8,
1002 RADEON_GPU_PAGE_SIZE, false);
1005 r = radeon_vm_evict(rdev, vm);
1013 pde = vm->pd_gpu_addr + pt_idx * 8;
1015 pt = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
1017 if (((last_pde + 8 * count) != pde) ||
1018 ((last_pt + incr * count) != pt)) {
1021 radeon_asic_vm_set_page(rdev, ib, last_pde,
1022 last_pt, count, incr,
1025 count *= RADEON_VM_PTE_COUNT;
1026 radeon_asic_vm_set_page(rdev, ib, last_pt, 0,
1039 radeon_asic_vm_set_page(rdev, ib, last_pde, last_pt, count,
1040 incr, R600_PTE_VALID);
1042 count *= RADEON_VM_PTE_COUNT;
1043 radeon_asic_vm_set_page(rdev, ib, last_pt, 0,
1051 * radeon_vm_update_ptes - make sure that page tables are valid
1053 * @rdev: radeon_device pointer
1055 * @start: start of GPU address range
1056 * @end: end of GPU address range
1057 * @dst: destination address to map to
1058 * @flags: mapping flags
1060 * Update the page tables in the range @start - @end (cayman+).
1062 * Global and local mutex must be locked!
1064 static void radeon_vm_update_ptes(struct radeon_device *rdev,
1065 struct radeon_vm *vm,
1066 struct radeon_ib *ib,
1067 uint64_t start, uint64_t end,
1068 uint64_t dst, uint32_t flags)
1070 static const uint64_t mask = RADEON_VM_PTE_COUNT - 1;
1072 uint64_t last_pte = ~0, last_dst = ~0;
1076 start = start / RADEON_GPU_PAGE_SIZE;
1077 end = end / RADEON_GPU_PAGE_SIZE;
1079 /* walk over the address space and update the page tables */
1080 for (addr = start; addr < end; ) {
1081 uint64_t pt_idx = addr >> RADEON_VM_BLOCK_SIZE;
1085 if ((addr & ~mask) == (end & ~mask))
1088 nptes = RADEON_VM_PTE_COUNT - (addr & mask);
1090 pte = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
1091 pte += (addr & mask) * 8;
1093 if ((last_pte + 8 * count) != pte) {
1096 radeon_asic_vm_set_page(rdev, ib, last_pte,
1098 RADEON_GPU_PAGE_SIZE,
1110 dst += nptes * RADEON_GPU_PAGE_SIZE;
1114 radeon_asic_vm_set_page(rdev, ib, last_pte,
1116 RADEON_GPU_PAGE_SIZE, flags);
1121 * radeon_vm_bo_update - map a bo into the vm page table
1123 * @rdev: radeon_device pointer
1125 * @bo: radeon buffer object
1128 * Fill in the page table entries for @bo (cayman+).
1129 * Returns 0 for success, -EINVAL for failure.
1131 * Object have to be reserved & global and local mutex must be locked!
1133 int radeon_vm_bo_update(struct radeon_device *rdev,
1134 struct radeon_vm *vm,
1135 struct radeon_bo *bo,
1136 struct ttm_mem_reg *mem)
1138 struct radeon_ib ib;
1139 struct radeon_bo_va *bo_va;
1140 unsigned nptes, npdes, ndw;
1144 /* nothing to do if vm isn't bound */
1145 if (vm->page_directory == NULL)
1148 bo_va = radeon_vm_bo_find(vm, bo);
1149 if (bo_va == NULL) {
1150 dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm);
1154 if (!bo_va->soffset) {
1155 dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n",
1160 if ((bo_va->valid && mem) || (!bo_va->valid && mem == NULL))
1163 bo_va->flags &= ~RADEON_VM_PAGE_VALID;
1164 bo_va->flags &= ~RADEON_VM_PAGE_SYSTEM;
1166 addr = mem->start << PAGE_SHIFT;
1167 if (mem->mem_type != TTM_PL_SYSTEM) {
1168 bo_va->flags |= RADEON_VM_PAGE_VALID;
1169 bo_va->valid = true;
1171 if (mem->mem_type == TTM_PL_TT) {
1172 bo_va->flags |= RADEON_VM_PAGE_SYSTEM;
1174 addr += rdev->vm_manager.vram_base_offset;
1178 bo_va->valid = false;
1181 trace_radeon_vm_bo_update(bo_va);
1183 nptes = radeon_bo_ngpu_pages(bo);
1185 /* assume two extra pdes in case the mapping overlaps the borders */
1186 npdes = (nptes >> RADEON_VM_BLOCK_SIZE) + 2;
1191 if (RADEON_VM_BLOCK_SIZE > 11)
1192 /* reserve space for one header for every 2k dwords */
1193 ndw += (nptes >> 11) * 4;
1195 /* reserve space for one header for
1196 every (1 << BLOCK_SIZE) entries */
1197 ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4;
1199 /* reserve space for pte addresses */
1202 /* reserve space for one header for every 2k dwords */
1203 ndw += (npdes >> 11) * 4;
1205 /* reserve space for pde addresses */
1208 /* reserve space for clearing new page tables */
1209 ndw += npdes * 2 * RADEON_VM_PTE_COUNT;
1211 /* update too big for an IB */
1215 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);
1220 r = radeon_vm_update_pdes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset);
1222 radeon_ib_free(rdev, &ib);
1226 radeon_vm_update_ptes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset,
1227 addr, radeon_vm_page_flags(bo_va->flags));
1229 radeon_semaphore_sync_to(ib.semaphore, vm->fence);
1230 r = radeon_ib_schedule(rdev, &ib, NULL);
1232 radeon_ib_free(rdev, &ib);
1235 radeon_fence_unref(&vm->fence);
1236 vm->fence = radeon_fence_ref(ib.fence);
1237 radeon_ib_free(rdev, &ib);
1238 radeon_fence_unref(&vm->last_flush);
1244 * radeon_vm_bo_rmv - remove a bo to a specific vm
1246 * @rdev: radeon_device pointer
1247 * @bo_va: requested bo_va
1249 * Remove @bo_va->bo from the requested vm (cayman+).
1250 * Remove @bo_va->bo from the list of bos associated with the bo_va->vm and
1251 * remove the ptes for @bo_va in the page table.
1252 * Returns 0 for success.
1254 * Object have to be reserved!
1256 int radeon_vm_bo_rmv(struct radeon_device *rdev,
1257 struct radeon_bo_va *bo_va)
1261 mutex_lock(&rdev->vm_manager.lock);
1262 mutex_lock(&bo_va->vm->mutex);
1263 if (bo_va->soffset) {
1264 r = radeon_vm_bo_update(rdev, bo_va->vm, bo_va->bo, NULL);
1266 mutex_unlock(&rdev->vm_manager.lock);
1267 list_del(&bo_va->vm_list);
1268 mutex_unlock(&bo_va->vm->mutex);
1269 list_del(&bo_va->bo_list);
1276 * radeon_vm_bo_invalidate - mark the bo as invalid
1278 * @rdev: radeon_device pointer
1280 * @bo: radeon buffer object
1282 * Mark @bo as invalid (cayman+).
1284 void radeon_vm_bo_invalidate(struct radeon_device *rdev,
1285 struct radeon_bo *bo)
1287 struct radeon_bo_va *bo_va;
1289 list_for_each_entry(bo_va, &bo->va, bo_list) {
1290 bo_va->valid = false;
1295 * radeon_vm_init - initialize a vm instance
1297 * @rdev: radeon_device pointer
1300 * Init @vm fields (cayman+).
1302 void radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
1306 mutex_init(&vm->mutex);
1307 INIT_LIST_HEAD(&vm->list);
1308 INIT_LIST_HEAD(&vm->va);
1312 * radeon_vm_fini - tear down a vm instance
1314 * @rdev: radeon_device pointer
1317 * Tear down @vm (cayman+).
1318 * Unbind the VM and remove all bos from the vm bo list
1320 void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
1322 struct radeon_bo_va *bo_va, *tmp;
1325 mutex_lock(&rdev->vm_manager.lock);
1326 mutex_lock(&vm->mutex);
1327 radeon_vm_free_pt(rdev, vm);
1328 mutex_unlock(&rdev->vm_manager.lock);
1330 if (!list_empty(&vm->va)) {
1331 dev_err(rdev->dev, "still active bo inside vm\n");
1333 list_for_each_entry_safe(bo_va, tmp, &vm->va, vm_list) {
1334 list_del_init(&bo_va->vm_list);
1335 r = radeon_bo_reserve(bo_va->bo, false);
1337 list_del_init(&bo_va->bo_list);
1338 radeon_bo_unreserve(bo_va->bo);
1342 radeon_fence_unref(&vm->fence);
1343 radeon_fence_unref(&vm->last_flush);
1344 mutex_unlock(&vm->mutex);