2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <linux/pci.h>
30 #include <linux/vmalloc.h>
32 #include <drm/radeon_drm.h>
34 #include <asm/set_memory.h>
40 * The GART (Graphics Aperture Remapping Table) is an aperture
41 * in the GPU's address space. System pages can be mapped into
42 * the aperture and look like contiguous pages from the GPU's
43 * perspective. A page table maps the pages in the aperture
44 * to the actual backing pages in system memory.
46 * Radeon GPUs support both an internal GART, as described above,
47 * and AGP. AGP works similarly, but the GART table is configured
48 * and maintained by the northbridge rather than the driver.
49 * Radeon hw has a separate AGP aperture that is programmed to
50 * point to the AGP aperture provided by the northbridge and the
51 * requests are passed through to the northbridge aperture.
52 * Both AGP and internal GART can be used at the same time, however
53 * that is not currently supported by the driver.
55 * This file handles the common internal GART management.
59 * Common GART table functions.
62 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
64 * @rdev: radeon_device pointer
66 * Allocate system memory for GART page table
67 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
68 * gart table to be in system memory.
69 * Returns 0 for success, -ENOMEM for failure.
71 int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
75 ptr = dma_alloc_coherent(&rdev->pdev->dev, rdev->gart.table_size,
76 &rdev->gart.table_addr, GFP_KERNEL);
81 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
82 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
83 set_memory_uc((unsigned long)ptr,
84 rdev->gart.table_size >> PAGE_SHIFT);
92 * radeon_gart_table_ram_free - free system ram for gart page table
94 * @rdev: radeon_device pointer
96 * Free system memory for GART page table
97 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
98 * gart table to be in system memory.
100 void radeon_gart_table_ram_free(struct radeon_device *rdev)
102 if (rdev->gart.ptr == NULL) {
106 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
107 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
108 set_memory_wb((unsigned long)rdev->gart.ptr,
109 rdev->gart.table_size >> PAGE_SHIFT);
112 dma_free_coherent(&rdev->pdev->dev, rdev->gart.table_size,
113 (void *)rdev->gart.ptr, rdev->gart.table_addr);
114 rdev->gart.ptr = NULL;
115 rdev->gart.table_addr = 0;
119 * radeon_gart_table_vram_alloc - allocate vram for gart page table
121 * @rdev: radeon_device pointer
123 * Allocate video memory for GART page table
124 * (pcie r4xx, r5xx+). These asics require the
125 * gart table to be in video memory.
126 * Returns 0 for success, error for failure.
128 int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
132 if (rdev->gart.robj == NULL) {
133 r = radeon_bo_create(rdev, rdev->gart.table_size,
134 PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
135 0, NULL, NULL, &rdev->gart.robj);
144 * radeon_gart_table_vram_pin - pin gart page table in vram
146 * @rdev: radeon_device pointer
148 * Pin the GART page table in vram so it will not be moved
149 * by the memory manager (pcie r4xx, r5xx+). These asics require the
150 * gart table to be in video memory.
151 * Returns 0 for success, error for failure.
153 int radeon_gart_table_vram_pin(struct radeon_device *rdev)
158 r = radeon_bo_reserve(rdev->gart.robj, false);
159 if (unlikely(r != 0))
161 r = radeon_bo_pin(rdev->gart.robj,
162 RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
164 radeon_bo_unreserve(rdev->gart.robj);
167 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
169 radeon_bo_unpin(rdev->gart.robj);
170 radeon_bo_unreserve(rdev->gart.robj);
171 rdev->gart.table_addr = gpu_addr;
176 /* We might have dropped some GART table updates while it wasn't
177 * mapped, restore all entries
179 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
180 radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i]);
182 radeon_gart_tlb_flush(rdev);
189 * radeon_gart_table_vram_unpin - unpin gart page table in vram
191 * @rdev: radeon_device pointer
193 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
194 * These asics require the gart table to be in video memory.
196 void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
200 if (rdev->gart.robj == NULL) {
203 r = radeon_bo_reserve(rdev->gart.robj, false);
204 if (likely(r == 0)) {
205 radeon_bo_kunmap(rdev->gart.robj);
206 radeon_bo_unpin(rdev->gart.robj);
207 radeon_bo_unreserve(rdev->gart.robj);
208 rdev->gart.ptr = NULL;
213 * radeon_gart_table_vram_free - free gart page table vram
215 * @rdev: radeon_device pointer
217 * Free the video memory used for the GART page table
218 * (pcie r4xx, r5xx+). These asics require the gart table to
219 * be in video memory.
221 void radeon_gart_table_vram_free(struct radeon_device *rdev)
223 if (rdev->gart.robj == NULL) {
226 radeon_bo_unref(&rdev->gart.robj);
230 * Common gart functions.
233 * radeon_gart_unbind - unbind pages from the gart page table
235 * @rdev: radeon_device pointer
236 * @offset: offset into the GPU's gart aperture
237 * @pages: number of pages to unbind
239 * Unbinds the requested pages from the gart page table and
240 * replaces them with the dummy page (all asics).
242 void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
249 if (!rdev->gart.ready) {
250 WARN(1, "trying to unbind memory from uninitialized GART !\n");
253 t = offset / RADEON_GPU_PAGE_SIZE;
254 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
255 for (i = 0; i < pages; i++, p++) {
256 if (rdev->gart.pages[p]) {
257 rdev->gart.pages[p] = NULL;
258 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
259 rdev->gart.pages_entry[t] = rdev->dummy_page.entry;
260 if (rdev->gart.ptr) {
261 radeon_gart_set_page(rdev, t,
262 rdev->dummy_page.entry);
267 if (rdev->gart.ptr) {
269 radeon_gart_tlb_flush(rdev);
274 * radeon_gart_bind - bind pages into the gart page table
276 * @rdev: radeon_device pointer
277 * @offset: offset into the GPU's gart aperture
278 * @pages: number of pages to bind
279 * @pagelist: pages to bind
280 * @dma_addr: DMA addresses of pages
281 * @flags: RADEON_GART_PAGE_* flags
283 * Binds the requested pages to the gart page table
285 * Returns 0 for success, -EINVAL for failure.
287 int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
288 int pages, struct page **pagelist, dma_addr_t *dma_addr,
293 uint64_t page_base, page_entry;
296 if (!rdev->gart.ready) {
297 WARN(1, "trying to bind memory to uninitialized GART !\n");
300 t = offset / RADEON_GPU_PAGE_SIZE;
301 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
303 for (i = 0; i < pages; i++, p++) {
304 rdev->gart.pages[p] = pagelist ? pagelist[i] :
305 rdev->dummy_page.page;
306 page_base = dma_addr[i];
307 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
308 page_entry = radeon_gart_get_page_entry(page_base, flags);
309 rdev->gart.pages_entry[t] = page_entry;
310 if (rdev->gart.ptr) {
311 radeon_gart_set_page(rdev, t, page_entry);
313 page_base += RADEON_GPU_PAGE_SIZE;
316 if (rdev->gart.ptr) {
318 radeon_gart_tlb_flush(rdev);
324 * radeon_gart_init - init the driver info for managing the gart
326 * @rdev: radeon_device pointer
328 * Allocate the dummy page and init the gart driver info (all asics).
329 * Returns 0 for success, error for failure.
331 int radeon_gart_init(struct radeon_device *rdev)
335 if (rdev->gart.pages) {
338 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
339 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
340 DRM_ERROR("Page size is smaller than GPU page size!\n");
343 r = radeon_dummy_page_init(rdev);
346 /* Compute table size */
347 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
348 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
349 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
350 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
351 /* Allocate pages table */
352 rdev->gart.pages = vzalloc(array_size(sizeof(void *),
353 rdev->gart.num_cpu_pages));
354 if (rdev->gart.pages == NULL) {
355 radeon_gart_fini(rdev);
358 rdev->gart.pages_entry = vmalloc(array_size(sizeof(uint64_t),
359 rdev->gart.num_gpu_pages));
360 if (rdev->gart.pages_entry == NULL) {
361 radeon_gart_fini(rdev);
364 /* set GART entry to point to the dummy page by default */
365 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
366 rdev->gart.pages_entry[i] = rdev->dummy_page.entry;
371 * radeon_gart_fini - tear down the driver info for managing the gart
373 * @rdev: radeon_device pointer
375 * Tear down the gart driver info and free the dummy page (all asics).
377 void radeon_gart_fini(struct radeon_device *rdev)
379 if (rdev->gart.ready) {
381 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
383 rdev->gart.ready = false;
384 vfree(rdev->gart.pages);
385 vfree(rdev->gart.pages_entry);
386 rdev->gart.pages = NULL;
387 rdev->gart.pages_entry = NULL;
389 radeon_dummy_page_fini(rdev);