2 * Copyright 2009 Jerome Glisse.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Jerome Glisse
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
29 #define RADEON_BENCHMARK_COPY_BLIT 1
30 #define RADEON_BENCHMARK_COPY_DMA 0
32 #define RADEON_BENCHMARK_ITERATIONS 1024
33 #define RADEON_BENCHMARK_COMMON_MODES_N 17
35 static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36 uint64_t saddr, uint64_t daddr,
39 unsigned long start_jiffies;
40 unsigned long end_jiffies;
41 struct radeon_fence *fence = NULL;
44 start_jiffies = jiffies;
45 for (i = 0; i < n; i++) {
47 case RADEON_BENCHMARK_COPY_DMA:
48 r = radeon_fence_create(rdev, &fence, radeon_copy_dma_ring_index(rdev));
51 r = radeon_copy_dma(rdev, saddr, daddr,
52 size / RADEON_GPU_PAGE_SIZE,
55 case RADEON_BENCHMARK_COPY_BLIT:
56 r = radeon_fence_create(rdev, &fence, radeon_copy_blit_ring_index(rdev));
59 r = radeon_copy_blit(rdev, saddr, daddr,
60 size / RADEON_GPU_PAGE_SIZE,
64 DRM_ERROR("Unknown copy method\n");
69 r = radeon_fence_wait(fence, false);
72 radeon_fence_unref(&fence);
74 end_jiffies = jiffies;
75 r = jiffies_to_msecs(end_jiffies - start_jiffies);
79 radeon_fence_unref(&fence);
84 static void radeon_benchmark_log_results(int n, unsigned size,
86 unsigned sdomain, unsigned ddomain,
89 unsigned int throughput = (n * (size >> 10)) / time;
90 DRM_INFO("radeon: %s %u bo moves of %u kB from"
91 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
92 kind, n, size >> 10, sdomain, ddomain, time,
93 throughput * 8, throughput);
96 static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
97 unsigned sdomain, unsigned ddomain)
99 struct radeon_bo *dobj = NULL;
100 struct radeon_bo *sobj = NULL;
101 uint64_t saddr, daddr;
105 n = RADEON_BENCHMARK_ITERATIONS;
106 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, &sobj);
110 r = radeon_bo_reserve(sobj, false);
111 if (unlikely(r != 0))
113 r = radeon_bo_pin(sobj, sdomain, &saddr);
114 radeon_bo_unreserve(sobj);
118 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, &dobj);
122 r = radeon_bo_reserve(dobj, false);
123 if (unlikely(r != 0))
125 r = radeon_bo_pin(dobj, ddomain, &daddr);
126 radeon_bo_unreserve(dobj);
131 /* r100 doesn't have dma engine so skip the test */
132 /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
133 /* skip it as well if domains are the same */
134 if ((rdev->asic->copy.dma) && (sdomain != ddomain)) {
135 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
136 RADEON_BENCHMARK_COPY_DMA, n);
140 radeon_benchmark_log_results(n, size, time,
141 sdomain, ddomain, "dma");
144 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
145 RADEON_BENCHMARK_COPY_BLIT, n);
149 radeon_benchmark_log_results(n, size, time,
150 sdomain, ddomain, "blit");
154 r = radeon_bo_reserve(sobj, false);
155 if (likely(r == 0)) {
156 radeon_bo_unpin(sobj);
157 radeon_bo_unreserve(sobj);
159 radeon_bo_unref(&sobj);
162 r = radeon_bo_reserve(dobj, false);
163 if (likely(r == 0)) {
164 radeon_bo_unpin(dobj);
165 radeon_bo_unreserve(dobj);
167 radeon_bo_unref(&dobj);
171 DRM_ERROR("Error while benchmarking BO move.\n");
175 void radeon_benchmark(struct radeon_device *rdev, int test_number)
178 int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
198 switch (test_number) {
200 /* simple test, VRAM to GTT and GTT to VRAM */
201 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
202 RADEON_GEM_DOMAIN_VRAM);
203 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
204 RADEON_GEM_DOMAIN_GTT);
207 /* simple test, VRAM to VRAM */
208 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
209 RADEON_GEM_DOMAIN_VRAM);
212 /* GTT to VRAM, buffer size sweep, powers of 2 */
213 for (i = 1; i <= 16384; i <<= 1)
214 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
215 RADEON_GEM_DOMAIN_GTT,
216 RADEON_GEM_DOMAIN_VRAM);
219 /* VRAM to GTT, buffer size sweep, powers of 2 */
220 for (i = 1; i <= 16384; i <<= 1)
221 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
222 RADEON_GEM_DOMAIN_VRAM,
223 RADEON_GEM_DOMAIN_GTT);
226 /* VRAM to VRAM, buffer size sweep, powers of 2 */
227 for (i = 1; i <= 16384; i <<= 1)
228 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
229 RADEON_GEM_DOMAIN_VRAM,
230 RADEON_GEM_DOMAIN_VRAM);
233 /* GTT to VRAM, buffer size sweep, common modes */
234 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
235 radeon_benchmark_move(rdev, common_modes[i],
236 RADEON_GEM_DOMAIN_GTT,
237 RADEON_GEM_DOMAIN_VRAM);
240 /* VRAM to GTT, buffer size sweep, common modes */
241 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
242 radeon_benchmark_move(rdev, common_modes[i],
243 RADEON_GEM_DOMAIN_VRAM,
244 RADEON_GEM_DOMAIN_GTT);
247 /* VRAM to VRAM, buffer size sweep, common modes */
248 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
249 radeon_benchmark_move(rdev, common_modes[i],
250 RADEON_GEM_DOMAIN_VRAM,
251 RADEON_GEM_DOMAIN_VRAM);
255 DRM_ERROR("Unknown benchmark\n");