drivers/gpu/drm/panfrost/panfrost_issues.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* (C) COPYRIGHT 2014-2018 ARM Limited. All rights reserved. */
   3 /* Copyright 2019 Linaro, Ltd., Rob Herring <robh@kernel.org> */
   4 #ifndef __PANFROST_ISSUES_H__
   5 #define __PANFROST_ISSUES_H__
   6
   7 #include <linux/bitops.h>
   8
   9 #include "panfrost_device.h"
  10
  11 /*
  12  * This is not a complete list of issues, but only the ones the driver needs
  13  * to care about.
  14  */
  15 enum panfrost_hw_issue {
  16         HW_ISSUE_6367,
  17         HW_ISSUE_6787,
  18         HW_ISSUE_8186,
  19         HW_ISSUE_8245,
  20         HW_ISSUE_8316,
  21         HW_ISSUE_8394,
  22         HW_ISSUE_8401,
  23         HW_ISSUE_8408,
  24         HW_ISSUE_8443,
  25         HW_ISSUE_8987,
  26         HW_ISSUE_9435,
  27         HW_ISSUE_9510,
  28         HW_ISSUE_9630,
  29         HW_ISSUE_10327,
  30         HW_ISSUE_10649,
  31         HW_ISSUE_10676,
  32         HW_ISSUE_10797,
  33         HW_ISSUE_10817,
  34         HW_ISSUE_10883,
  35         HW_ISSUE_10959,
  36         HW_ISSUE_10969,
  37         HW_ISSUE_11020,
  38         HW_ISSUE_11024,
  39         HW_ISSUE_11035,
  40         HW_ISSUE_11056,
  41         HW_ISSUE_T76X_3542,
  42         HW_ISSUE_T76X_3953,
  43         HW_ISSUE_TMIX_8463,
  44         GPUCORE_1619,
  45         HW_ISSUE_TMIX_8438,
  46         HW_ISSUE_TGOX_R1_1234,
  47         HW_ISSUE_END
  48 };
  49
  50 #define hw_issues_all (\
  51         BIT_ULL(HW_ISSUE_9435))
  52
  53 #define hw_issues_t600 (\
  54         BIT_ULL(HW_ISSUE_6367) | \
  55         BIT_ULL(HW_ISSUE_6787) | \
  56         BIT_ULL(HW_ISSUE_8408) | \
  57         BIT_ULL(HW_ISSUE_9510) | \
  58         BIT_ULL(HW_ISSUE_10649) | \
  59         BIT_ULL(HW_ISSUE_10676) | \
  60         BIT_ULL(HW_ISSUE_10883) | \
  61         BIT_ULL(HW_ISSUE_11020) | \
  62         BIT_ULL(HW_ISSUE_11035) | \
  63         BIT_ULL(HW_ISSUE_11056) | \
  64         BIT_ULL(HW_ISSUE_TMIX_8438))
  65
  66 #define hw_issues_t600_r0p0_15dev0 (\
  67         BIT_ULL(HW_ISSUE_8186) | \
  68         BIT_ULL(HW_ISSUE_8245) | \
  69         BIT_ULL(HW_ISSUE_8316) | \
  70         BIT_ULL(HW_ISSUE_8394) | \
  71         BIT_ULL(HW_ISSUE_8401) | \
  72         BIT_ULL(HW_ISSUE_8443) | \
  73         BIT_ULL(HW_ISSUE_8987) | \
  74         BIT_ULL(HW_ISSUE_9630) | \
  75         BIT_ULL(HW_ISSUE_10969) | \
  76         BIT_ULL(GPUCORE_1619))
  77
  78 #define hw_issues_t620 (\
  79         BIT_ULL(HW_ISSUE_10649) | \
  80         BIT_ULL(HW_ISSUE_10883) | \
  81         BIT_ULL(HW_ISSUE_10959) | \
  82         BIT_ULL(HW_ISSUE_11056) | \
  83         BIT_ULL(HW_ISSUE_TMIX_8438))
  84
  85 #define hw_issues_t620_r0p1 (\
  86         BIT_ULL(HW_ISSUE_10327) | \
  87         BIT_ULL(HW_ISSUE_10676) | \
  88         BIT_ULL(HW_ISSUE_10817) | \
  89         BIT_ULL(HW_ISSUE_11020) | \
  90         BIT_ULL(HW_ISSUE_11024) | \
  91         BIT_ULL(HW_ISSUE_11035))
  92
  93 #define hw_issues_t620_r1p0 (\
  94         BIT_ULL(HW_ISSUE_11020) | \
  95         BIT_ULL(HW_ISSUE_11024))
  96
  97 #define hw_issues_t720 (\
  98         BIT_ULL(HW_ISSUE_10649) | \
  99         BIT_ULL(HW_ISSUE_10797) | \
 100         BIT_ULL(HW_ISSUE_10883) | \
 101         BIT_ULL(HW_ISSUE_11056) | \
 102         BIT_ULL(HW_ISSUE_TMIX_8438))
 103
 104 #define hw_issues_t760 (\
 105         BIT_ULL(HW_ISSUE_10883) | \
 106         BIT_ULL(HW_ISSUE_T76X_3953) | \
 107         BIT_ULL(HW_ISSUE_TMIX_8438))
 108
 109 #define hw_issues_t760_r0p0 (\
 110         BIT_ULL(HW_ISSUE_11020) | \
 111         BIT_ULL(HW_ISSUE_11024) | \
 112         BIT_ULL(HW_ISSUE_T76X_3542))
 113
 114 #define hw_issues_t760_r0p1 (\
 115         BIT_ULL(HW_ISSUE_11020) | \
 116         BIT_ULL(HW_ISSUE_11024) | \
 117         BIT_ULL(HW_ISSUE_T76X_3542))
 118
 119 #define hw_issues_t760_r0p1_50rel0 (\
 120         BIT_ULL(HW_ISSUE_T76X_3542))
 121
 122 #define hw_issues_t760_r0p2 (\
 123         BIT_ULL(HW_ISSUE_11020) | \
 124         BIT_ULL(HW_ISSUE_11024) | \
 125         BIT_ULL(HW_ISSUE_T76X_3542))
 126
 127 #define hw_issues_t760_r0p3 (\
 128         BIT_ULL(HW_ISSUE_T76X_3542))
 129
 130 #define hw_issues_t820 (\
 131         BIT_ULL(HW_ISSUE_10883) | \
 132         BIT_ULL(HW_ISSUE_T76X_3953) | \
 133         BIT_ULL(HW_ISSUE_TMIX_8438))
 134
 135 #define hw_issues_t830 (\
 136         BIT_ULL(HW_ISSUE_10883) | \
 137         BIT_ULL(HW_ISSUE_T76X_3953) | \
 138         BIT_ULL(HW_ISSUE_TMIX_8438))
 139
 140 #define hw_issues_t860 (\
 141         BIT_ULL(HW_ISSUE_10883) | \
 142         BIT_ULL(HW_ISSUE_T76X_3953) | \
 143         BIT_ULL(HW_ISSUE_TMIX_8438))
 144
 145 #define hw_issues_t880 (\
 146         BIT_ULL(HW_ISSUE_10883) | \
 147         BIT_ULL(HW_ISSUE_T76X_3953) | \
 148         BIT_ULL(HW_ISSUE_TMIX_8438))
 149
 150 #define hw_issues_g31 0
 151
 152 #define hw_issues_g31_r1p0 (\
 153         BIT_ULL(HW_ISSUE_TGOX_R1_1234))
 154
 155 #define hw_issues_g51 0
 156
 157 #define hw_issues_g52 0
 158
 159 #define hw_issues_g71 (\
 160         BIT_ULL(HW_ISSUE_TMIX_8463) | \
 161         BIT_ULL(HW_ISSUE_TMIX_8438))
 162
 163 #define hw_issues_g71_r0p0_05dev0 (\
 164         BIT_ULL(HW_ISSUE_T76X_3953))
 165
 166 #define hw_issues_g72 0
 167
 168 #define hw_issues_g76 0
 169
 170 static inline bool panfrost_has_hw_issue(struct panfrost_device *pfdev,
 171                                          enum panfrost_hw_issue issue)
 172 {
 173         return test_bit(issue, pfdev->features.hw_issues);
 174 }
 175
 176 #endif /* __PANFROST_ISSUES_H__ */