1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Jitao Shi <jitao.shi@mediatek.com>
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/module.h>
11 #include <linux/of_device.h>
12 #include <linux/regulator/consumer.h>
14 #include <drm/drm_crtc.h>
15 #include <drm/drm_mipi_dsi.h>
16 #include <drm/drm_panel.h>
18 #include <video/mipi_display.h>
21 const struct drm_display_mode *modes;
25 * @width_mm: width of the panel's active display area
26 * @height_mm: height of the panel's active display area
29 unsigned int width_mm;
30 unsigned int height_mm;
33 unsigned long mode_flags;
34 enum mipi_dsi_pixel_format format;
35 const struct panel_init_cmd *init_cmds;
37 bool discharge_on_disable;
41 struct drm_panel base;
42 struct mipi_dsi_device *dsi;
44 const struct panel_desc *desc;
46 struct regulator *pp1800;
47 struct regulator *avee;
48 struct regulator *avdd;
49 struct gpio_desc *enable_gpio;
59 struct panel_init_cmd {
60 enum dsi_cmd_type type;
65 #define _INIT_DCS_CMD(...) { \
66 .type = INIT_DCS_CMD, \
67 .len = sizeof((char[]){__VA_ARGS__}), \
68 .data = (char[]){__VA_ARGS__} }
70 #define _INIT_DELAY_CMD(...) { \
72 .len = sizeof((char[]){__VA_ARGS__}), \
73 .data = (char[]){__VA_ARGS__} }
75 static const struct panel_init_cmd boe_init_cmd[] = {
77 _INIT_DCS_CMD(0xB0, 0x05),
78 _INIT_DCS_CMD(0xB1, 0xE5),
79 _INIT_DCS_CMD(0xB3, 0x52),
80 _INIT_DCS_CMD(0xB0, 0x00),
81 _INIT_DCS_CMD(0xB3, 0x88),
82 _INIT_DCS_CMD(0xB0, 0x04),
83 _INIT_DCS_CMD(0xB8, 0x00),
84 _INIT_DCS_CMD(0xB0, 0x00),
85 _INIT_DCS_CMD(0xB6, 0x03),
86 _INIT_DCS_CMD(0xBA, 0x8B),
87 _INIT_DCS_CMD(0xBF, 0x1A),
88 _INIT_DCS_CMD(0xC0, 0x0F),
89 _INIT_DCS_CMD(0xC2, 0x0C),
90 _INIT_DCS_CMD(0xC3, 0x02),
91 _INIT_DCS_CMD(0xC4, 0x0C),
92 _INIT_DCS_CMD(0xC5, 0x02),
93 _INIT_DCS_CMD(0xB0, 0x01),
94 _INIT_DCS_CMD(0xE0, 0x26),
95 _INIT_DCS_CMD(0xE1, 0x26),
96 _INIT_DCS_CMD(0xDC, 0x00),
97 _INIT_DCS_CMD(0xDD, 0x00),
98 _INIT_DCS_CMD(0xCC, 0x26),
99 _INIT_DCS_CMD(0xCD, 0x26),
100 _INIT_DCS_CMD(0xC8, 0x00),
101 _INIT_DCS_CMD(0xC9, 0x00),
102 _INIT_DCS_CMD(0xD2, 0x03),
103 _INIT_DCS_CMD(0xD3, 0x03),
104 _INIT_DCS_CMD(0xE6, 0x04),
105 _INIT_DCS_CMD(0xE7, 0x04),
106 _INIT_DCS_CMD(0xC4, 0x09),
107 _INIT_DCS_CMD(0xC5, 0x09),
108 _INIT_DCS_CMD(0xD8, 0x0A),
109 _INIT_DCS_CMD(0xD9, 0x0A),
110 _INIT_DCS_CMD(0xC2, 0x0B),
111 _INIT_DCS_CMD(0xC3, 0x0B),
112 _INIT_DCS_CMD(0xD6, 0x0C),
113 _INIT_DCS_CMD(0xD7, 0x0C),
114 _INIT_DCS_CMD(0xC0, 0x05),
115 _INIT_DCS_CMD(0xC1, 0x05),
116 _INIT_DCS_CMD(0xD4, 0x06),
117 _INIT_DCS_CMD(0xD5, 0x06),
118 _INIT_DCS_CMD(0xCA, 0x07),
119 _INIT_DCS_CMD(0xCB, 0x07),
120 _INIT_DCS_CMD(0xDE, 0x08),
121 _INIT_DCS_CMD(0xDF, 0x08),
122 _INIT_DCS_CMD(0xB0, 0x02),
123 _INIT_DCS_CMD(0xC0, 0x00),
124 _INIT_DCS_CMD(0xC1, 0x0D),
125 _INIT_DCS_CMD(0xC2, 0x17),
126 _INIT_DCS_CMD(0xC3, 0x26),
127 _INIT_DCS_CMD(0xC4, 0x31),
128 _INIT_DCS_CMD(0xC5, 0x1C),
129 _INIT_DCS_CMD(0xC6, 0x2C),
130 _INIT_DCS_CMD(0xC7, 0x33),
131 _INIT_DCS_CMD(0xC8, 0x31),
132 _INIT_DCS_CMD(0xC9, 0x37),
133 _INIT_DCS_CMD(0xCA, 0x37),
134 _INIT_DCS_CMD(0xCB, 0x37),
135 _INIT_DCS_CMD(0xCC, 0x39),
136 _INIT_DCS_CMD(0xCD, 0x2E),
137 _INIT_DCS_CMD(0xCE, 0x2F),
138 _INIT_DCS_CMD(0xCF, 0x2F),
139 _INIT_DCS_CMD(0xD0, 0x07),
140 _INIT_DCS_CMD(0xD2, 0x00),
141 _INIT_DCS_CMD(0xD3, 0x0D),
142 _INIT_DCS_CMD(0xD4, 0x17),
143 _INIT_DCS_CMD(0xD5, 0x26),
144 _INIT_DCS_CMD(0xD6, 0x31),
145 _INIT_DCS_CMD(0xD7, 0x3F),
146 _INIT_DCS_CMD(0xD8, 0x3F),
147 _INIT_DCS_CMD(0xD9, 0x3F),
148 _INIT_DCS_CMD(0xDA, 0x3F),
149 _INIT_DCS_CMD(0xDB, 0x37),
150 _INIT_DCS_CMD(0xDC, 0x37),
151 _INIT_DCS_CMD(0xDD, 0x37),
152 _INIT_DCS_CMD(0xDE, 0x39),
153 _INIT_DCS_CMD(0xDF, 0x2E),
154 _INIT_DCS_CMD(0xE0, 0x2F),
155 _INIT_DCS_CMD(0xE1, 0x2F),
156 _INIT_DCS_CMD(0xE2, 0x07),
157 _INIT_DCS_CMD(0xB0, 0x03),
158 _INIT_DCS_CMD(0xC8, 0x0B),
159 _INIT_DCS_CMD(0xC9, 0x07),
160 _INIT_DCS_CMD(0xC3, 0x00),
161 _INIT_DCS_CMD(0xE7, 0x00),
162 _INIT_DCS_CMD(0xC5, 0x2A),
163 _INIT_DCS_CMD(0xDE, 0x2A),
164 _INIT_DCS_CMD(0xCA, 0x43),
165 _INIT_DCS_CMD(0xC9, 0x07),
166 _INIT_DCS_CMD(0xE4, 0xC0),
167 _INIT_DCS_CMD(0xE5, 0x0D),
168 _INIT_DCS_CMD(0xCB, 0x00),
169 _INIT_DCS_CMD(0xB0, 0x06),
170 _INIT_DCS_CMD(0xB8, 0xA5),
171 _INIT_DCS_CMD(0xC0, 0xA5),
172 _INIT_DCS_CMD(0xC7, 0x0F),
173 _INIT_DCS_CMD(0xD5, 0x32),
174 _INIT_DCS_CMD(0xB8, 0x00),
175 _INIT_DCS_CMD(0xC0, 0x00),
176 _INIT_DCS_CMD(0xBC, 0x00),
177 _INIT_DCS_CMD(0xB0, 0x07),
178 _INIT_DCS_CMD(0xB1, 0x00),
179 _INIT_DCS_CMD(0xB2, 0x02),
180 _INIT_DCS_CMD(0xB3, 0x0F),
181 _INIT_DCS_CMD(0xB4, 0x25),
182 _INIT_DCS_CMD(0xB5, 0x39),
183 _INIT_DCS_CMD(0xB6, 0x4E),
184 _INIT_DCS_CMD(0xB7, 0x72),
185 _INIT_DCS_CMD(0xB8, 0x97),
186 _INIT_DCS_CMD(0xB9, 0xDC),
187 _INIT_DCS_CMD(0xBA, 0x22),
188 _INIT_DCS_CMD(0xBB, 0xA4),
189 _INIT_DCS_CMD(0xBC, 0x2B),
190 _INIT_DCS_CMD(0xBD, 0x2F),
191 _INIT_DCS_CMD(0xBE, 0xA9),
192 _INIT_DCS_CMD(0xBF, 0x25),
193 _INIT_DCS_CMD(0xC0, 0x61),
194 _INIT_DCS_CMD(0xC1, 0x97),
195 _INIT_DCS_CMD(0xC2, 0xB2),
196 _INIT_DCS_CMD(0xC3, 0xCD),
197 _INIT_DCS_CMD(0xC4, 0xD9),
198 _INIT_DCS_CMD(0xC5, 0xE7),
199 _INIT_DCS_CMD(0xC6, 0xF4),
200 _INIT_DCS_CMD(0xC7, 0xFA),
201 _INIT_DCS_CMD(0xC8, 0xFC),
202 _INIT_DCS_CMD(0xC9, 0x00),
203 _INIT_DCS_CMD(0xCA, 0x00),
204 _INIT_DCS_CMD(0xCB, 0x16),
205 _INIT_DCS_CMD(0xCC, 0xAF),
206 _INIT_DCS_CMD(0xCD, 0xFF),
207 _INIT_DCS_CMD(0xCE, 0xFF),
208 _INIT_DCS_CMD(0xB0, 0x08),
209 _INIT_DCS_CMD(0xB1, 0x04),
210 _INIT_DCS_CMD(0xB2, 0x05),
211 _INIT_DCS_CMD(0xB3, 0x11),
212 _INIT_DCS_CMD(0xB4, 0x24),
213 _INIT_DCS_CMD(0xB5, 0x39),
214 _INIT_DCS_CMD(0xB6, 0x4F),
215 _INIT_DCS_CMD(0xB7, 0x72),
216 _INIT_DCS_CMD(0xB8, 0x98),
217 _INIT_DCS_CMD(0xB9, 0xDC),
218 _INIT_DCS_CMD(0xBA, 0x23),
219 _INIT_DCS_CMD(0xBB, 0xA6),
220 _INIT_DCS_CMD(0xBC, 0x2C),
221 _INIT_DCS_CMD(0xBD, 0x30),
222 _INIT_DCS_CMD(0xBE, 0xAA),
223 _INIT_DCS_CMD(0xBF, 0x26),
224 _INIT_DCS_CMD(0xC0, 0x62),
225 _INIT_DCS_CMD(0xC1, 0x9B),
226 _INIT_DCS_CMD(0xC2, 0xB5),
227 _INIT_DCS_CMD(0xC3, 0xCF),
228 _INIT_DCS_CMD(0xC4, 0xDB),
229 _INIT_DCS_CMD(0xC5, 0xE8),
230 _INIT_DCS_CMD(0xC6, 0xF5),
231 _INIT_DCS_CMD(0xC7, 0xFA),
232 _INIT_DCS_CMD(0xC8, 0xFC),
233 _INIT_DCS_CMD(0xC9, 0x00),
234 _INIT_DCS_CMD(0xCA, 0x00),
235 _INIT_DCS_CMD(0xCB, 0x16),
236 _INIT_DCS_CMD(0xCC, 0xAF),
237 _INIT_DCS_CMD(0xCD, 0xFF),
238 _INIT_DCS_CMD(0xCE, 0xFF),
239 _INIT_DCS_CMD(0xB0, 0x09),
240 _INIT_DCS_CMD(0xB1, 0x04),
241 _INIT_DCS_CMD(0xB2, 0x02),
242 _INIT_DCS_CMD(0xB3, 0x16),
243 _INIT_DCS_CMD(0xB4, 0x24),
244 _INIT_DCS_CMD(0xB5, 0x3B),
245 _INIT_DCS_CMD(0xB6, 0x4F),
246 _INIT_DCS_CMD(0xB7, 0x73),
247 _INIT_DCS_CMD(0xB8, 0x99),
248 _INIT_DCS_CMD(0xB9, 0xE0),
249 _INIT_DCS_CMD(0xBA, 0x26),
250 _INIT_DCS_CMD(0xBB, 0xAD),
251 _INIT_DCS_CMD(0xBC, 0x36),
252 _INIT_DCS_CMD(0xBD, 0x3A),
253 _INIT_DCS_CMD(0xBE, 0xAE),
254 _INIT_DCS_CMD(0xBF, 0x2A),
255 _INIT_DCS_CMD(0xC0, 0x66),
256 _INIT_DCS_CMD(0xC1, 0x9E),
257 _INIT_DCS_CMD(0xC2, 0xB8),
258 _INIT_DCS_CMD(0xC3, 0xD1),
259 _INIT_DCS_CMD(0xC4, 0xDD),
260 _INIT_DCS_CMD(0xC5, 0xE9),
261 _INIT_DCS_CMD(0xC6, 0xF6),
262 _INIT_DCS_CMD(0xC7, 0xFA),
263 _INIT_DCS_CMD(0xC8, 0xFC),
264 _INIT_DCS_CMD(0xC9, 0x00),
265 _INIT_DCS_CMD(0xCA, 0x00),
266 _INIT_DCS_CMD(0xCB, 0x16),
267 _INIT_DCS_CMD(0xCC, 0xAF),
268 _INIT_DCS_CMD(0xCD, 0xFF),
269 _INIT_DCS_CMD(0xCE, 0xFF),
270 _INIT_DCS_CMD(0xB0, 0x0A),
271 _INIT_DCS_CMD(0xB1, 0x00),
272 _INIT_DCS_CMD(0xB2, 0x02),
273 _INIT_DCS_CMD(0xB3, 0x0F),
274 _INIT_DCS_CMD(0xB4, 0x25),
275 _INIT_DCS_CMD(0xB5, 0x39),
276 _INIT_DCS_CMD(0xB6, 0x4E),
277 _INIT_DCS_CMD(0xB7, 0x72),
278 _INIT_DCS_CMD(0xB8, 0x97),
279 _INIT_DCS_CMD(0xB9, 0xDC),
280 _INIT_DCS_CMD(0xBA, 0x22),
281 _INIT_DCS_CMD(0xBB, 0xA4),
282 _INIT_DCS_CMD(0xBC, 0x2B),
283 _INIT_DCS_CMD(0xBD, 0x2F),
284 _INIT_DCS_CMD(0xBE, 0xA9),
285 _INIT_DCS_CMD(0xBF, 0x25),
286 _INIT_DCS_CMD(0xC0, 0x61),
287 _INIT_DCS_CMD(0xC1, 0x97),
288 _INIT_DCS_CMD(0xC2, 0xB2),
289 _INIT_DCS_CMD(0xC3, 0xCD),
290 _INIT_DCS_CMD(0xC4, 0xD9),
291 _INIT_DCS_CMD(0xC5, 0xE7),
292 _INIT_DCS_CMD(0xC6, 0xF4),
293 _INIT_DCS_CMD(0xC7, 0xFA),
294 _INIT_DCS_CMD(0xC8, 0xFC),
295 _INIT_DCS_CMD(0xC9, 0x00),
296 _INIT_DCS_CMD(0xCA, 0x00),
297 _INIT_DCS_CMD(0xCB, 0x16),
298 _INIT_DCS_CMD(0xCC, 0xAF),
299 _INIT_DCS_CMD(0xCD, 0xFF),
300 _INIT_DCS_CMD(0xCE, 0xFF),
301 _INIT_DCS_CMD(0xB0, 0x0B),
302 _INIT_DCS_CMD(0xB1, 0x04),
303 _INIT_DCS_CMD(0xB2, 0x05),
304 _INIT_DCS_CMD(0xB3, 0x11),
305 _INIT_DCS_CMD(0xB4, 0x24),
306 _INIT_DCS_CMD(0xB5, 0x39),
307 _INIT_DCS_CMD(0xB6, 0x4F),
308 _INIT_DCS_CMD(0xB7, 0x72),
309 _INIT_DCS_CMD(0xB8, 0x98),
310 _INIT_DCS_CMD(0xB9, 0xDC),
311 _INIT_DCS_CMD(0xBA, 0x23),
312 _INIT_DCS_CMD(0xBB, 0xA6),
313 _INIT_DCS_CMD(0xBC, 0x2C),
314 _INIT_DCS_CMD(0xBD, 0x30),
315 _INIT_DCS_CMD(0xBE, 0xAA),
316 _INIT_DCS_CMD(0xBF, 0x26),
317 _INIT_DCS_CMD(0xC0, 0x62),
318 _INIT_DCS_CMD(0xC1, 0x9B),
319 _INIT_DCS_CMD(0xC2, 0xB5),
320 _INIT_DCS_CMD(0xC3, 0xCF),
321 _INIT_DCS_CMD(0xC4, 0xDB),
322 _INIT_DCS_CMD(0xC5, 0xE8),
323 _INIT_DCS_CMD(0xC6, 0xF5),
324 _INIT_DCS_CMD(0xC7, 0xFA),
325 _INIT_DCS_CMD(0xC8, 0xFC),
326 _INIT_DCS_CMD(0xC9, 0x00),
327 _INIT_DCS_CMD(0xCA, 0x00),
328 _INIT_DCS_CMD(0xCB, 0x16),
329 _INIT_DCS_CMD(0xCC, 0xAF),
330 _INIT_DCS_CMD(0xCD, 0xFF),
331 _INIT_DCS_CMD(0xCE, 0xFF),
332 _INIT_DCS_CMD(0xB0, 0x0C),
333 _INIT_DCS_CMD(0xB1, 0x04),
334 _INIT_DCS_CMD(0xB2, 0x02),
335 _INIT_DCS_CMD(0xB3, 0x16),
336 _INIT_DCS_CMD(0xB4, 0x24),
337 _INIT_DCS_CMD(0xB5, 0x3B),
338 _INIT_DCS_CMD(0xB6, 0x4F),
339 _INIT_DCS_CMD(0xB7, 0x73),
340 _INIT_DCS_CMD(0xB8, 0x99),
341 _INIT_DCS_CMD(0xB9, 0xE0),
342 _INIT_DCS_CMD(0xBA, 0x26),
343 _INIT_DCS_CMD(0xBB, 0xAD),
344 _INIT_DCS_CMD(0xBC, 0x36),
345 _INIT_DCS_CMD(0xBD, 0x3A),
346 _INIT_DCS_CMD(0xBE, 0xAE),
347 _INIT_DCS_CMD(0xBF, 0x2A),
348 _INIT_DCS_CMD(0xC0, 0x66),
349 _INIT_DCS_CMD(0xC1, 0x9E),
350 _INIT_DCS_CMD(0xC2, 0xB8),
351 _INIT_DCS_CMD(0xC3, 0xD1),
352 _INIT_DCS_CMD(0xC4, 0xDD),
353 _INIT_DCS_CMD(0xC5, 0xE9),
354 _INIT_DCS_CMD(0xC6, 0xF6),
355 _INIT_DCS_CMD(0xC7, 0xFA),
356 _INIT_DCS_CMD(0xC8, 0xFC),
357 _INIT_DCS_CMD(0xC9, 0x00),
358 _INIT_DCS_CMD(0xCA, 0x00),
359 _INIT_DCS_CMD(0xCB, 0x16),
360 _INIT_DCS_CMD(0xCC, 0xAF),
361 _INIT_DCS_CMD(0xCD, 0xFF),
362 _INIT_DCS_CMD(0xCE, 0xFF),
363 _INIT_DCS_CMD(0xB0, 0x00),
364 _INIT_DCS_CMD(0xB3, 0x08),
365 _INIT_DCS_CMD(0xB0, 0x04),
366 _INIT_DCS_CMD(0xB8, 0x68),
367 _INIT_DELAY_CMD(150),
371 static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
374 _INIT_DELAY_CMD(120),
376 _INIT_DELAY_CMD(120),
380 static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = {
382 _INIT_DCS_CMD(0xB0, 0x01),
383 _INIT_DCS_CMD(0xC0, 0x48),
384 _INIT_DCS_CMD(0xC1, 0x48),
385 _INIT_DCS_CMD(0xC2, 0x47),
386 _INIT_DCS_CMD(0xC3, 0x47),
387 _INIT_DCS_CMD(0xC4, 0x46),
388 _INIT_DCS_CMD(0xC5, 0x46),
389 _INIT_DCS_CMD(0xC6, 0x45),
390 _INIT_DCS_CMD(0xC7, 0x45),
391 _INIT_DCS_CMD(0xC8, 0x64),
392 _INIT_DCS_CMD(0xC9, 0x64),
393 _INIT_DCS_CMD(0xCA, 0x4F),
394 _INIT_DCS_CMD(0xCB, 0x4F),
395 _INIT_DCS_CMD(0xCC, 0x40),
396 _INIT_DCS_CMD(0xCD, 0x40),
397 _INIT_DCS_CMD(0xCE, 0x66),
398 _INIT_DCS_CMD(0xCF, 0x66),
399 _INIT_DCS_CMD(0xD0, 0x4F),
400 _INIT_DCS_CMD(0xD1, 0x4F),
401 _INIT_DCS_CMD(0xD2, 0x41),
402 _INIT_DCS_CMD(0xD3, 0x41),
403 _INIT_DCS_CMD(0xD4, 0x48),
404 _INIT_DCS_CMD(0xD5, 0x48),
405 _INIT_DCS_CMD(0xD6, 0x47),
406 _INIT_DCS_CMD(0xD7, 0x47),
407 _INIT_DCS_CMD(0xD8, 0x46),
408 _INIT_DCS_CMD(0xD9, 0x46),
409 _INIT_DCS_CMD(0xDA, 0x45),
410 _INIT_DCS_CMD(0xDB, 0x45),
411 _INIT_DCS_CMD(0xDC, 0x64),
412 _INIT_DCS_CMD(0xDD, 0x64),
413 _INIT_DCS_CMD(0xDE, 0x4F),
414 _INIT_DCS_CMD(0xDF, 0x4F),
415 _INIT_DCS_CMD(0xE0, 0x40),
416 _INIT_DCS_CMD(0xE1, 0x40),
417 _INIT_DCS_CMD(0xE2, 0x66),
418 _INIT_DCS_CMD(0xE3, 0x66),
419 _INIT_DCS_CMD(0xE4, 0x4F),
420 _INIT_DCS_CMD(0xE5, 0x4F),
421 _INIT_DCS_CMD(0xE6, 0x41),
422 _INIT_DCS_CMD(0xE7, 0x41),
423 _INIT_DELAY_CMD(150),
427 static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
429 return container_of(panel, struct boe_panel, base);
432 static int boe_panel_init_dcs_cmd(struct boe_panel *boe)
434 struct mipi_dsi_device *dsi = boe->dsi;
435 struct drm_panel *panel = &boe->base;
438 if (boe->desc->init_cmds) {
439 const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
441 for (i = 0; init_cmds[i].len != 0; i++) {
442 const struct panel_init_cmd *cmd = &init_cmds[i];
446 msleep(cmd->data[0]);
451 err = mipi_dsi_dcs_write(dsi, cmd->data[0],
452 cmd->len <= 1 ? NULL :
463 "failed to write command %u\n", i);
471 static int boe_panel_enter_sleep_mode(struct boe_panel *boe)
473 struct mipi_dsi_device *dsi = boe->dsi;
476 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
478 ret = mipi_dsi_dcs_set_display_off(dsi);
482 ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
489 static int boe_panel_unprepare(struct drm_panel *panel)
491 struct boe_panel *boe = to_boe_panel(panel);
497 ret = boe_panel_enter_sleep_mode(boe);
499 dev_err(panel->dev, "failed to set panel off: %d\n", ret);
505 if (boe->desc->discharge_on_disable) {
506 regulator_disable(boe->avee);
507 regulator_disable(boe->avdd);
508 usleep_range(5000, 7000);
509 gpiod_set_value(boe->enable_gpio, 0);
510 usleep_range(5000, 7000);
511 regulator_disable(boe->pp1800);
513 gpiod_set_value(boe->enable_gpio, 0);
514 usleep_range(500, 1000);
515 regulator_disable(boe->avee);
516 regulator_disable(boe->avdd);
517 usleep_range(5000, 7000);
518 regulator_disable(boe->pp1800);
521 boe->prepared = false;
526 static int boe_panel_prepare(struct drm_panel *panel)
528 struct boe_panel *boe = to_boe_panel(panel);
534 gpiod_set_value(boe->enable_gpio, 0);
535 usleep_range(1000, 1500);
537 ret = regulator_enable(boe->pp1800);
541 usleep_range(3000, 5000);
543 ret = regulator_enable(boe->avdd);
546 ret = regulator_enable(boe->avee);
550 usleep_range(5000, 10000);
552 gpiod_set_value(boe->enable_gpio, 1);
553 usleep_range(1000, 2000);
554 gpiod_set_value(boe->enable_gpio, 0);
555 usleep_range(1000, 2000);
556 gpiod_set_value(boe->enable_gpio, 1);
557 usleep_range(6000, 10000);
559 ret = boe_panel_init_dcs_cmd(boe);
561 dev_err(panel->dev, "failed to init panel: %d\n", ret);
565 boe->prepared = true;
570 regulator_disable(boe->avee);
572 regulator_disable(boe->avdd);
574 usleep_range(5000, 7000);
575 regulator_disable(boe->pp1800);
576 gpiod_set_value(boe->enable_gpio, 0);
581 static int boe_panel_enable(struct drm_panel *panel)
587 static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
590 .hsync_start = 1200 + 100,
591 .hsync_end = 1200 + 100 + 40,
592 .htotal = 1200 + 100 + 40 + 24,
594 .vsync_start = 1920 + 10,
595 .vsync_end = 1920 + 10 + 14,
596 .vtotal = 1920 + 10 + 14 + 4,
599 static const struct panel_desc boe_tv101wum_nl6_desc = {
600 .modes = &boe_tv101wum_nl6_default_mode,
607 .format = MIPI_DSI_FMT_RGB888,
608 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
610 .init_cmds = boe_init_cmd,
611 .discharge_on_disable = false,
614 static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
617 .hsync_start = 1200 + 60,
618 .hsync_end = 1200 + 60 + 24,
619 .htotal = 1200 + 60 + 24 + 56,
621 .vsync_start = 1920 + 16,
622 .vsync_end = 1920 + 16 + 4,
623 .vtotal = 1920 + 16 + 4 + 16,
626 static const struct panel_desc auo_kd101n80_45na_desc = {
627 .modes = &auo_kd101n80_45na_default_mode,
634 .format = MIPI_DSI_FMT_RGB888,
635 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
637 .init_cmds = auo_kd101n80_45na_init_cmd,
638 .discharge_on_disable = true,
641 static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
644 .hsync_start = 1200 + 80,
645 .hsync_end = 1200 + 80 + 24,
646 .htotal = 1200 + 80 + 24 + 60,
648 .vsync_start = 1920 + 20,
649 .vsync_end = 1920 + 20 + 4,
650 .vtotal = 1920 + 20 + 4 + 10,
651 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
654 static const struct panel_desc boe_tv101wum_n53_desc = {
655 .modes = &boe_tv101wum_n53_default_mode,
662 .format = MIPI_DSI_FMT_RGB888,
663 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
665 .init_cmds = boe_init_cmd,
668 static const struct drm_display_mode auo_b101uan08_3_default_mode = {
671 .hsync_start = 1200 + 60,
672 .hsync_end = 1200 + 60 + 4,
673 .htotal = 1200 + 60 + 4 + 80,
675 .vsync_start = 1920 + 34,
676 .vsync_end = 1920 + 34 + 2,
677 .vtotal = 1920 + 34 + 2 + 24,
678 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
681 static const struct panel_desc auo_b101uan08_3_desc = {
682 .modes = &auo_b101uan08_3_default_mode,
689 .format = MIPI_DSI_FMT_RGB888,
690 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
692 .init_cmds = auo_b101uan08_3_init_cmd,
695 static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
698 .hsync_start = 1200 + 80,
699 .hsync_end = 1200 + 80 + 24,
700 .htotal = 1200 + 80 + 24 + 60,
702 .vsync_start = 1920 + 20,
703 .vsync_end = 1920 + 20 + 4,
704 .vtotal = 1920 + 20 + 4 + 10,
705 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
708 static const struct panel_desc boe_tv105wum_nw0_desc = {
709 .modes = &boe_tv105wum_nw0_default_mode,
716 .format = MIPI_DSI_FMT_RGB888,
717 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
719 .init_cmds = boe_init_cmd,
722 static int boe_panel_get_modes(struct drm_panel *panel,
723 struct drm_connector *connector)
725 struct boe_panel *boe = to_boe_panel(panel);
726 const struct drm_display_mode *m = boe->desc->modes;
727 struct drm_display_mode *mode;
729 mode = drm_mode_duplicate(connector->dev, m);
731 dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
732 m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
736 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
737 drm_mode_set_name(mode);
738 drm_mode_probed_add(connector, mode);
740 connector->display_info.width_mm = boe->desc->size.width_mm;
741 connector->display_info.height_mm = boe->desc->size.height_mm;
742 connector->display_info.bpc = boe->desc->bpc;
747 static const struct drm_panel_funcs boe_panel_funcs = {
748 .unprepare = boe_panel_unprepare,
749 .prepare = boe_panel_prepare,
750 .enable = boe_panel_enable,
751 .get_modes = boe_panel_get_modes,
754 static int boe_panel_add(struct boe_panel *boe)
756 struct device *dev = &boe->dsi->dev;
759 boe->avdd = devm_regulator_get(dev, "avdd");
760 if (IS_ERR(boe->avdd))
761 return PTR_ERR(boe->avdd);
763 boe->avee = devm_regulator_get(dev, "avee");
764 if (IS_ERR(boe->avee))
765 return PTR_ERR(boe->avee);
767 boe->pp1800 = devm_regulator_get(dev, "pp1800");
768 if (IS_ERR(boe->pp1800))
769 return PTR_ERR(boe->pp1800);
771 boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
772 if (IS_ERR(boe->enable_gpio)) {
773 dev_err(dev, "cannot get reset-gpios %ld\n",
774 PTR_ERR(boe->enable_gpio));
775 return PTR_ERR(boe->enable_gpio);
778 gpiod_set_value(boe->enable_gpio, 0);
780 drm_panel_init(&boe->base, dev, &boe_panel_funcs,
781 DRM_MODE_CONNECTOR_DSI);
783 err = drm_panel_of_backlight(&boe->base);
787 boe->base.funcs = &boe_panel_funcs;
788 boe->base.dev = &boe->dsi->dev;
790 return drm_panel_add(&boe->base);
793 static int boe_panel_probe(struct mipi_dsi_device *dsi)
795 struct boe_panel *boe;
797 const struct panel_desc *desc;
799 boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL);
803 desc = of_device_get_match_data(&dsi->dev);
804 dsi->lanes = desc->lanes;
805 dsi->format = desc->format;
806 dsi->mode_flags = desc->mode_flags;
809 ret = boe_panel_add(boe);
813 mipi_dsi_set_drvdata(dsi, boe);
815 ret = mipi_dsi_attach(dsi);
817 drm_panel_remove(&boe->base);
822 static void boe_panel_shutdown(struct mipi_dsi_device *dsi)
824 struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
826 drm_panel_disable(&boe->base);
827 drm_panel_unprepare(&boe->base);
830 static int boe_panel_remove(struct mipi_dsi_device *dsi)
832 struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
835 boe_panel_shutdown(dsi);
837 ret = mipi_dsi_detach(dsi);
839 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
842 drm_panel_remove(&boe->base);
847 static const struct of_device_id boe_of_match[] = {
848 { .compatible = "boe,tv101wum-nl6",
849 .data = &boe_tv101wum_nl6_desc
851 { .compatible = "auo,kd101n80-45na",
852 .data = &auo_kd101n80_45na_desc
854 { .compatible = "boe,tv101wum-n53",
855 .data = &boe_tv101wum_n53_desc
857 { .compatible = "auo,b101uan08.3",
858 .data = &auo_b101uan08_3_desc
860 { .compatible = "boe,tv105wum-nw0",
861 .data = &boe_tv105wum_nw0_desc
865 MODULE_DEVICE_TABLE(of, boe_of_match);
867 static struct mipi_dsi_driver boe_panel_driver = {
869 .name = "panel-boe-tv101wum-nl6",
870 .of_match_table = boe_of_match,
872 .probe = boe_panel_probe,
873 .remove = boe_panel_remove,
874 .shutdown = boe_panel_shutdown,
876 module_mipi_dsi_driver(boe_panel_driver);
878 MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
879 MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver");
880 MODULE_LICENSE("GPL v2");