2 * Copyright 2014 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
29 #include <subdev/bios.h>
30 #include <subdev/bios/init.h>
31 #include <subdev/gpio.h>
32 #include <subdev/i2c.h>
34 #include <nvif/event.h>
36 /* IED scripts are no longer used by UEFI/RM from Ampere, but have been updated for
37 * the x86 option ROM. However, the relevant VBIOS table versions weren't modified,
38 * so we're unable to detect this in a nice way.
40 #define AMPERE_IED_HACK(disp) ((disp)->engine.subdev.device->card_type >= GA100)
52 nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay)
54 struct nvkm_dp *dp = lt->dp;
57 if (dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL])
58 mdelay(dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL] * 4);
62 ret = nvkm_rdaux(dp->aux, DPCD_LS02, lt->stat, 6);
67 ret = nvkm_rdaux(dp->aux, DPCD_LS0C, <->pc2stat, 1);
70 OUTP_TRACE(&dp->outp, "status %6ph pc2 %02x",
71 lt->stat, lt->pc2stat);
73 OUTP_TRACE(&dp->outp, "status %6ph", lt->stat);
80 nvkm_dp_train_drive(struct lt_state *lt, bool pc)
82 struct nvkm_dp *dp = lt->dp;
83 struct nvkm_ior *ior = dp->outp.ior;
84 struct nvkm_bios *bios = ior->disp->engine.subdev.device->bios;
85 struct nvbios_dpout info;
86 struct nvbios_dpcfg ocfg;
87 u8 ver, hdr, cnt, len;
91 for (i = 0; i < ior->dp.nr; i++) {
92 u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf;
93 u8 lpc2 = (lt->pc2stat >> (i * 2)) & 0x3;
94 u8 lpre = (lane & 0x0c) >> 2;
95 u8 lvsw = (lane & 0x03) >> 0;
101 lpc2 = hipc | DPCD_LC0F_LANE0_MAX_POST_CURSOR2_REACHED;
103 lpre = hipe | DPCD_LC03_MAX_SWING_REACHED; /* yes. */
104 lvsw = hivs = 3 - (lpre & 3);
107 lvsw = hivs | DPCD_LC03_MAX_SWING_REACHED;
110 lt->conf[i] = (lpre << 3) | lvsw;
111 lt->pc2conf[i >> 1] |= lpc2 << ((i & 1) * 4);
113 OUTP_TRACE(&dp->outp, "config lane %d %02x %02x",
114 i, lt->conf[i], lpc2);
116 data = nvbios_dpout_match(bios, dp->outp.info.hasht,
118 &ver, &hdr, &cnt, &len, &info);
122 data = nvbios_dpcfg_match(bios, data, lpc2 & 3, lvsw & 3,
123 lpre & 3, &ver, &hdr, &cnt, &len,
128 ior->func->dp.drive(ior, i, ocfg.pc, ocfg.dc,
129 ocfg.pe, ocfg.tx_pu);
132 ret = nvkm_wraux(dp->aux, DPCD_LC03(0), lt->conf, 4);
137 ret = nvkm_wraux(dp->aux, DPCD_LC0F, lt->pc2conf, 2);
146 nvkm_dp_train_pattern(struct lt_state *lt, u8 pattern)
148 struct nvkm_dp *dp = lt->dp;
151 OUTP_TRACE(&dp->outp, "training pattern %d", pattern);
152 dp->outp.ior->func->dp.pattern(dp->outp.ior, pattern);
154 nvkm_rdaux(dp->aux, DPCD_LC02, &sink_tp, 1);
155 sink_tp &= ~DPCD_LC02_TRAINING_PATTERN_SET;
157 nvkm_wraux(dp->aux, DPCD_LC02, &sink_tp, 1);
161 nvkm_dp_train_eq(struct lt_state *lt)
163 bool eq_done = false, cr_done = true;
166 if (lt->dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED)
167 nvkm_dp_train_pattern(lt, 3);
169 nvkm_dp_train_pattern(lt, 2);
173 nvkm_dp_train_drive(lt, lt->pc2)) ||
174 nvkm_dp_train_sense(lt, lt->pc2, 400))
177 eq_done = !!(lt->stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE);
178 for (i = 0; i < lt->dp->outp.ior->dp.nr && eq_done; i++) {
179 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
180 if (!(lane & DPCD_LS02_LANE0_CR_DONE))
182 if (!(lane & DPCD_LS02_LANE0_CHANNEL_EQ_DONE) ||
183 !(lane & DPCD_LS02_LANE0_SYMBOL_LOCKED))
186 } while (!eq_done && cr_done && ++tries <= 5);
188 return eq_done ? 0 : -1;
192 nvkm_dp_train_cr(struct lt_state *lt)
194 bool cr_done = false, abort = false;
195 int voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET;
198 nvkm_dp_train_pattern(lt, 1);
201 if (nvkm_dp_train_drive(lt, false) ||
202 nvkm_dp_train_sense(lt, false, 100))
206 for (i = 0; i < lt->dp->outp.ior->dp.nr; i++) {
207 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
208 if (!(lane & DPCD_LS02_LANE0_CR_DONE)) {
210 if (lt->conf[i] & DPCD_LC03_MAX_SWING_REACHED)
216 if ((lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET) != voltage) {
217 voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET;
220 } while (!cr_done && !abort && ++tries < 5);
222 return cr_done ? 0 : -1;
226 nvkm_dp_train_links(struct nvkm_dp *dp)
228 struct nvkm_ior *ior = dp->outp.ior;
229 struct nvkm_disp *disp = dp->outp.disp;
230 struct nvkm_subdev *subdev = &disp->engine.subdev;
231 struct nvkm_bios *bios = subdev->device->bios;
232 struct lt_state lt = {
239 OUTP_DBG(&dp->outp, "training %d x %d MB/s",
240 ior->dp.nr, ior->dp.bw * 27);
242 /* Intersect misc. capabilities of the OR and sink. */
243 if (disp->engine.subdev.device->chipset < 0xd0)
244 dp->dpcd[DPCD_RC02] &= ~DPCD_RC02_TPS3_SUPPORTED;
245 lt.pc2 = dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED;
247 if (AMPERE_IED_HACK(disp) && (lnkcmp = lt.dp->info.script[0])) {
248 /* Execute BeforeLinkTraining script from DP Info table. */
249 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp))
251 lnkcmp = nvbios_rd16(bios, lnkcmp + 1);
253 nvbios_init(&dp->outp.disp->engine.subdev, lnkcmp,
254 init.outp = &dp->outp.info;
256 init.link = ior->asy.link;
260 /* Set desired link configuration on the source. */
261 if ((lnkcmp = lt.dp->info.lnkcmp)) {
262 if (dp->version < 0x30) {
263 while ((ior->dp.bw * 2700) < nvbios_rd16(bios, lnkcmp))
265 lnkcmp = nvbios_rd16(bios, lnkcmp + 2);
267 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp))
269 lnkcmp = nvbios_rd16(bios, lnkcmp + 1);
272 nvbios_init(subdev, lnkcmp,
273 init.outp = &dp->outp.info;
275 init.link = ior->asy.link;
279 ret = ior->func->dp.links(ior, dp->aux);
282 OUTP_ERR(&dp->outp, "train failed with %d", ret);
288 ior->func->dp.power(ior, ior->dp.nr);
290 /* Set desired link configuration on the sink. */
291 sink[0] = ior->dp.bw;
292 sink[1] = ior->dp.nr;
294 sink[1] |= DPCD_LC01_ENHANCED_FRAME_EN;
296 ret = nvkm_wraux(dp->aux, DPCD_LC00_LINK_BW_SET, sink, 2);
300 /* Attempt to train the link in this configuration. */
301 memset(lt.stat, 0x00, sizeof(lt.stat));
302 ret = nvkm_dp_train_cr(<);
304 ret = nvkm_dp_train_eq(<);
305 nvkm_dp_train_pattern(<, 0);
310 nvkm_dp_train_fini(struct nvkm_dp *dp)
312 /* Execute AfterLinkTraining script from DP Info table. */
313 nvbios_init(&dp->outp.disp->engine.subdev, dp->info.script[1],
314 init.outp = &dp->outp.info;
315 init.or = dp->outp.ior->id;
316 init.link = dp->outp.ior->asy.link;
321 nvkm_dp_train_init(struct nvkm_dp *dp)
323 /* Execute EnableSpread/DisableSpread script from DP Info table. */
324 if (dp->dpcd[DPCD_RC03] & DPCD_RC03_MAX_DOWNSPREAD) {
325 nvbios_init(&dp->outp.disp->engine.subdev, dp->info.script[2],
326 init.outp = &dp->outp.info;
327 init.or = dp->outp.ior->id;
328 init.link = dp->outp.ior->asy.link;
331 nvbios_init(&dp->outp.disp->engine.subdev, dp->info.script[3],
332 init.outp = &dp->outp.info;
333 init.or = dp->outp.ior->id;
334 init.link = dp->outp.ior->asy.link;
338 if (!AMPERE_IED_HACK(dp->outp.disp)) {
339 /* Execute BeforeLinkTraining script from DP Info table. */
340 nvbios_init(&dp->outp.disp->engine.subdev, dp->info.script[0],
341 init.outp = &dp->outp.info;
342 init.or = dp->outp.ior->id;
343 init.link = dp->outp.ior->asy.link;
348 static const struct dp_rates {
352 } nvkm_dp_rates[] = {
353 { 2160000, 0x14, 4 },
354 { 1080000, 0x0a, 4 },
355 { 1080000, 0x14, 2 },
366 nvkm_dp_train(struct nvkm_dp *dp, u32 dataKBps)
368 struct nvkm_ior *ior = dp->outp.ior;
369 const u8 sink_nr = dp->dpcd[DPCD_RC02] & DPCD_RC02_MAX_LANE_COUNT;
370 const u8 sink_bw = dp->dpcd[DPCD_RC01_MAX_LINK_RATE];
371 const u8 outp_nr = dp->outp.info.dpconf.link_nr;
372 const u8 outp_bw = dp->outp.info.dpconf.link_bw;
373 const struct dp_rates *failsafe = NULL, *cfg;
377 /* Find the lowest configuration of the OR that can support
378 * the required link rate.
380 * We will refuse to program the OR to lower rates, even if
381 * link training fails at higher rates (or even if the sink
382 * can't support the rate at all, though the DD is supposed
383 * to prevent such situations from happening).
385 * Attempting to do so can cause the entire display to hang,
386 * and it's better to have a failed modeset than that.
388 for (cfg = nvkm_dp_rates; cfg->rate; cfg++) {
389 if (cfg->nr <= outp_nr && cfg->bw <= outp_bw) {
390 /* Try to respect sink limits too when selecting
391 * lowest link configuration.
394 (cfg->nr <= sink_nr && cfg->bw <= sink_bw))
398 if (failsafe && cfg[1].rate < dataKBps)
402 if (WARN_ON(!failsafe))
405 /* Ensure sink is not in a low-power state. */
406 if (!nvkm_rdaux(dp->aux, DPCD_SC00, &pwr, 1)) {
407 if ((pwr & DPCD_SC00_SET_POWER) != DPCD_SC00_SET_POWER_D0) {
408 pwr &= ~DPCD_SC00_SET_POWER;
409 pwr |= DPCD_SC00_SET_POWER_D0;
410 nvkm_wraux(dp->aux, DPCD_SC00, &pwr, 1);
415 OUTP_DBG(&dp->outp, "training (min: %d x %d MB/s)",
416 failsafe->nr, failsafe->bw * 27);
417 nvkm_dp_train_init(dp);
418 for (cfg = nvkm_dp_rates; ret < 0 && cfg <= failsafe; cfg++) {
419 /* Skip configurations not supported by both OR and sink. */
420 if ((cfg->nr > outp_nr || cfg->bw > outp_bw ||
421 cfg->nr > sink_nr || cfg->bw > sink_bw)) {
424 OUTP_ERR(&dp->outp, "link rate unsupported by sink");
426 ior->dp.mst = dp->lt.mst;
427 ior->dp.ef = dp->dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP;
428 ior->dp.bw = cfg->bw;
429 ior->dp.nr = cfg->nr;
431 /* Program selected link configuration. */
432 ret = nvkm_dp_train_links(dp);
434 nvkm_dp_train_fini(dp);
436 OUTP_ERR(&dp->outp, "training failed");
438 OUTP_DBG(&dp->outp, "training done");
439 atomic_set(&dp->lt.done, 1);
444 nvkm_dp_disable(struct nvkm_outp *outp, struct nvkm_ior *ior)
446 struct nvkm_dp *dp = nvkm_dp(outp);
448 /* Execute DisableLT script from DP Info Table. */
449 nvbios_init(&ior->disp->engine.subdev, dp->info.script[4],
450 init.outp = &dp->outp.info;
452 init.link = ior->arm.link;
457 nvkm_dp_release(struct nvkm_outp *outp)
459 struct nvkm_dp *dp = nvkm_dp(outp);
461 /* Prevent link from being retrained if sink sends an IRQ. */
462 atomic_set(&dp->lt.done, 0);
463 dp->outp.ior->dp.nr = 0;
467 nvkm_dp_acquire(struct nvkm_outp *outp)
469 struct nvkm_dp *dp = nvkm_dp(outp);
470 struct nvkm_ior *ior = dp->outp.ior;
471 struct nvkm_head *head;
479 mutex_lock(&dp->mutex);
481 /* Check that link configuration meets current requirements. */
482 list_for_each_entry(head, &outp->disp->head, head) {
483 if (ior->asy.head & (1 << head->id)) {
484 u32 khz = (head->asy.hz >> ior->asy.rgdiv) / 1000;
485 datakbps += khz * head->asy.or.depth;
489 linkKBps = ior->dp.bw * 27000 * ior->dp.nr;
490 dataKBps = DIV_ROUND_UP(datakbps, 8);
491 OUTP_DBG(&dp->outp, "data %d KB/s link %d KB/s mst %d->%d",
492 dataKBps, linkKBps, ior->dp.mst, dp->lt.mst);
493 if (linkKBps < dataKBps || ior->dp.mst != dp->lt.mst) {
494 OUTP_DBG(&dp->outp, "link requirements changed");
498 /* Check that link is still trained. */
499 ret = nvkm_rdaux(dp->aux, DPCD_LS02, stat, 3);
502 "failed to read link status, assuming no sink");
506 if (stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE) {
507 for (i = 0; i < ior->dp.nr; i++) {
508 u8 lane = (stat[i >> 1] >> ((i & 1) * 4)) & 0x0f;
509 if (!(lane & DPCD_LS02_LANE0_CR_DONE) ||
510 !(lane & DPCD_LS02_LANE0_CHANNEL_EQ_DONE) ||
511 !(lane & DPCD_LS02_LANE0_SYMBOL_LOCKED)) {
513 "lane %d not equalised", lane);
519 OUTP_DBG(&dp->outp, "no inter-lane alignment");
523 if (retrain || !atomic_read(&dp->lt.done))
524 ret = nvkm_dp_train(dp, dataKBps);
525 mutex_unlock(&dp->mutex);
530 nvkm_dp_enable(struct nvkm_dp *dp, bool enable)
532 struct nvkm_i2c_aux *aux = dp->aux;
536 OUTP_DBG(&dp->outp, "aux power -> always");
537 nvkm_i2c_aux_monitor(aux, true);
541 if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, dp->dpcd,
547 OUTP_DBG(&dp->outp, "aux power -> demand");
548 nvkm_i2c_aux_monitor(aux, false);
552 atomic_set(&dp->lt.done, 0);
557 nvkm_dp_hpd(struct nvkm_notify *notify)
559 const struct nvkm_i2c_ntfy_rep *line = notify->data;
560 struct nvkm_dp *dp = container_of(notify, typeof(*dp), hpd);
561 struct nvkm_conn *conn = dp->outp.conn;
562 struct nvkm_disp *disp = dp->outp.disp;
563 struct nvif_notify_conn_rep_v0 rep = {};
565 OUTP_DBG(&dp->outp, "HPD: %d", line->mask);
566 if (line->mask & NVKM_I2C_IRQ) {
567 if (atomic_read(&dp->lt.done))
568 dp->outp.func->acquire(&dp->outp);
569 rep.mask |= NVIF_NOTIFY_CONN_V0_IRQ;
571 nvkm_dp_enable(dp, true);
574 if (line->mask & NVKM_I2C_UNPLUG)
575 rep.mask |= NVIF_NOTIFY_CONN_V0_UNPLUG;
576 if (line->mask & NVKM_I2C_PLUG)
577 rep.mask |= NVIF_NOTIFY_CONN_V0_PLUG;
579 nvkm_event_send(&disp->hpd, rep.mask, conn->index, &rep, sizeof(rep));
580 return NVKM_NOTIFY_KEEP;
584 nvkm_dp_fini(struct nvkm_outp *outp)
586 struct nvkm_dp *dp = nvkm_dp(outp);
587 nvkm_notify_put(&dp->hpd);
588 nvkm_dp_enable(dp, false);
592 nvkm_dp_init(struct nvkm_outp *outp)
594 struct nvkm_gpio *gpio = outp->disp->engine.subdev.device->gpio;
595 struct nvkm_dp *dp = nvkm_dp(outp);
597 nvkm_notify_put(&dp->outp.conn->hpd);
599 /* eDP panels need powering on by us (if the VBIOS doesn't default it
600 * to on) before doing any AUX channel transactions. LVDS panel power
601 * is handled by the SOR itself, and not required for LVDS DDC.
603 if (dp->outp.conn->info.type == DCB_CONNECTOR_eDP) {
604 int power = nvkm_gpio_get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff);
606 nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);
608 /* We delay here unconditionally, even if already powered,
609 * because some laptop panels having a significant resume
610 * delay before the panel begins responding.
612 * This is likely a bit of a hack, but no better idea for
613 * handling this at the moment.
617 /* If the eDP panel can't be detected, we need to restore
618 * the panel power GPIO to avoid breaking another output.
620 if (!nvkm_dp_enable(dp, true) && power == 0)
621 nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 0);
623 nvkm_dp_enable(dp, true);
626 nvkm_notify_get(&dp->hpd);
630 nvkm_dp_dtor(struct nvkm_outp *outp)
632 struct nvkm_dp *dp = nvkm_dp(outp);
633 nvkm_notify_fini(&dp->hpd);
637 static const struct nvkm_outp_func
639 .dtor = nvkm_dp_dtor,
640 .init = nvkm_dp_init,
641 .fini = nvkm_dp_fini,
642 .acquire = nvkm_dp_acquire,
643 .release = nvkm_dp_release,
644 .disable = nvkm_dp_disable,
648 nvkm_dp_ctor(struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
649 struct nvkm_i2c_aux *aux, struct nvkm_dp *dp)
651 struct nvkm_device *device = disp->engine.subdev.device;
652 struct nvkm_bios *bios = device->bios;
653 struct nvkm_i2c *i2c = device->i2c;
658 ret = nvkm_outp_ctor(&nvkm_dp_func, disp, index, dcbE, &dp->outp);
664 OUTP_ERR(&dp->outp, "no aux");
668 /* bios data is not optional */
669 data = nvbios_dpout_match(bios, dp->outp.info.hasht,
670 dp->outp.info.hashm, &dp->version,
671 &hdr, &cnt, &len, &dp->info);
673 OUTP_ERR(&dp->outp, "no bios dp data");
677 OUTP_DBG(&dp->outp, "bios dp %02x %02x %02x %02x",
678 dp->version, hdr, cnt, len);
680 /* hotplug detect, replaces gpio-based mechanism with aux events */
681 ret = nvkm_notify_init(NULL, &i2c->event, nvkm_dp_hpd, true,
682 &(struct nvkm_i2c_ntfy_req) {
683 .mask = NVKM_I2C_PLUG | NVKM_I2C_UNPLUG |
687 sizeof(struct nvkm_i2c_ntfy_req),
688 sizeof(struct nvkm_i2c_ntfy_rep),
691 OUTP_ERR(&dp->outp, "error monitoring aux hpd: %d", ret);
695 mutex_init(&dp->mutex);
696 atomic_set(&dp->lt.done, 0);
701 nvkm_dp_new(struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
702 struct nvkm_outp **poutp)
704 struct nvkm_i2c *i2c = disp->engine.subdev.device->i2c;
705 struct nvkm_i2c_aux *aux;
708 if (dcbE->location == 0)
709 aux = nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_CCB(dcbE->i2c_index));
711 aux = nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_EXT(dcbE->extdev));
713 if (!(dp = kzalloc(sizeof(*dp), GFP_KERNEL)))
717 return nvkm_dp_ctor(disp, index, dcbE, aux, dp);