Merge tag 'drm-intel-gt-next-2021-01-21-1' of git://anongit.freedesktop.org/drm/drm...
[linux-2.6-microblaze.git] / drivers / gpu / drm / nouveau / nv50_fbcon.c
1 /*
2  * Copyright 2010 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #define NVIF_DEBUG_PRINT_DISABLE
25 #include "nouveau_drv.h"
26 #include "nouveau_dma.h"
27 #include "nouveau_fbcon.h"
28 #include "nouveau_vmm.h"
29
30 #include <nvif/push206e.h>
31
32 #include <nvhw/class/cl502d.h>
33
34 int
35 nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
36 {
37         struct nouveau_fbdev *nfbdev = info->par;
38         struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
39         struct nouveau_channel *chan = drm->channel;
40         struct nvif_push *push = chan->chan.push;
41         u32 colour;
42         int ret;
43
44         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
45             info->fix.visual == FB_VISUAL_DIRECTCOLOR)
46                 colour = ((uint32_t *)info->pseudo_palette)[rect->color];
47         else
48                 colour = rect->color;
49
50         ret = PUSH_WAIT(push, rect->rop == ROP_COPY ? 7 : 11);
51         if (ret)
52                 return ret;
53
54         if (rect->rop != ROP_COPY) {
55                 PUSH_MTHD(push, NV502D, SET_OPERATION,
56                           NVDEF(NV502D, SET_OPERATION, V, ROP_AND));
57         }
58
59         PUSH_MTHD(push, NV502D, SET_RENDER_SOLID_PRIM_COLOR, colour);
60
61         PUSH_MTHD(push, NV502D, RENDER_SOLID_PRIM_POINT_SET_X(0), rect->dx,
62                                 RENDER_SOLID_PRIM_POINT_Y(0), rect->dy,
63                                 RENDER_SOLID_PRIM_POINT_SET_X(1), rect->dx + rect->width,
64                                 RENDER_SOLID_PRIM_POINT_Y(1), rect->dy + rect->height);
65
66         if (rect->rop != ROP_COPY) {
67                 PUSH_MTHD(push, NV502D, SET_OPERATION,
68                           NVDEF(NV502D, SET_OPERATION, V, SRCCOPY));
69         }
70
71         PUSH_KICK(push);
72         return 0;
73 }
74
75 int
76 nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
77 {
78         struct nouveau_fbdev *nfbdev = info->par;
79         struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
80         struct nouveau_channel *chan = drm->channel;
81         struct nvif_push *push = chan->chan.push;
82         int ret;
83
84         ret = PUSH_WAIT(push, 12);
85         if (ret)
86                 return ret;
87
88         PUSH_MTHD(push, NV502D, WAIT_FOR_IDLE, 0);
89
90         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_DST_X0, region->dx,
91                                 SET_PIXELS_FROM_MEMORY_DST_Y0, region->dy,
92                                 SET_PIXELS_FROM_MEMORY_DST_WIDTH, region->width,
93                                 SET_PIXELS_FROM_MEMORY_DST_HEIGHT, region->height);
94
95         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC, 0,
96                                 SET_PIXELS_FROM_MEMORY_SRC_X0_INT, region->sx,
97                                 SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC, 0,
98                                 PIXELS_FROM_MEMORY_SRC_Y0_INT, region->sy);
99         PUSH_KICK(push);
100         return 0;
101 }
102
103 int
104 nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
105 {
106         struct nouveau_fbdev *nfbdev = info->par;
107         struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
108         struct nouveau_channel *chan = drm->channel;
109         struct nvif_push *push = chan->chan.push;
110         uint32_t dwords, *data = (uint32_t *)image->data;
111         uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
112         uint32_t *palette = info->pseudo_palette, bg, fg;
113         int ret;
114
115         if (image->depth != 1)
116                 return -ENODEV;
117
118         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
119             info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
120                 bg = palette[image->bg_color] | mask;
121                 fg = palette[image->fg_color] | mask;
122         } else {
123                 bg = image->bg_color;
124                 fg = image->fg_color;
125         }
126
127         ret = PUSH_WAIT(push, 11);
128         if (ret)
129                 return ret;
130
131         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_COLOR0, bg,
132                                 SET_PIXELS_FROM_CPU_COLOR1, fg);
133
134         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_SRC_WIDTH, image->width,
135                                 SET_PIXELS_FROM_CPU_SRC_HEIGHT, image->height);
136
137         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DST_X0_FRAC, 0,
138                                 SET_PIXELS_FROM_CPU_DST_X0_INT, image->dx,
139                                 SET_PIXELS_FROM_CPU_DST_Y0_FRAC, 0,
140                                 SET_PIXELS_FROM_CPU_DST_Y0_INT, image->dy);
141
142         dwords = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
143         while (dwords) {
144                 int count = dwords > 2047 ? 2047 : dwords;
145
146                 ret = PUSH_WAIT(push, count + 1);
147                 if (ret)
148                         return ret;
149
150                 dwords -= count;
151
152                 PUSH_NINC(push, NV502D, PIXELS_FROM_CPU_DATA, data, count);
153                 data += count;
154         }
155
156         PUSH_KICK(push);
157         return 0;
158 }
159
160 int
161 nv50_fbcon_accel_init(struct fb_info *info)
162 {
163         struct nouveau_fbdev *nfbdev = info->par;
164         struct drm_device *dev = nfbdev->helper.dev;
165         struct nouveau_drm *drm = nouveau_drm(dev);
166         struct nouveau_channel *chan = drm->channel;
167         struct nvif_push *push = chan->chan.push;
168         int ret, format;
169
170         switch (info->var.bits_per_pixel) {
171         case 8:
172                 format = NV502D_SET_DST_FORMAT_V_Y8;
173                 break;
174         case 15:
175                 format = NV502D_SET_DST_FORMAT_V_X1R5G5B5;
176                 break;
177         case 16:
178                 format = NV502D_SET_DST_FORMAT_V_R5G6B5;
179                 break;
180         case 32:
181                 switch (info->var.transp.length) {
182                 case 0: /* depth 24 */
183                 case 8: /* depth 32, just use 24.. */
184                         format = NV502D_SET_DST_FORMAT_V_X8R8G8B8;
185                         break;
186                 case 2: /* depth 30 */
187                         format = NV502D_SET_DST_FORMAT_V_A2B10G10R10;
188                         break;
189                 default:
190                         return -EINVAL;
191                 }
192                 break;
193         default:
194                 return -EINVAL;
195         }
196
197         ret = nvif_object_ctor(&chan->user, "fbconTwoD", 0x502d, 0x502d,
198                                NULL, 0, &nfbdev->twod);
199         if (ret)
200                 return ret;
201
202         ret = PUSH_WAIT(push, 56);
203         if (ret) {
204                 nouveau_fbcon_gpu_lockup(info);
205                 return ret;
206         }
207
208         PUSH_MTHD(push, NV502D, SET_OBJECT, nfbdev->twod.handle);
209         PUSH_MTHD(push, NV502D, SET_DST_CONTEXT_DMA, chan->vram.handle,
210                                 SET_SRC_CONTEXT_DMA, chan->vram.handle,
211                                 SET_SEMAPHORE_CONTEXT_DMA, chan->vram.handle);
212
213         PUSH_MTHD(push, NV502D, SET_DST_FORMAT,
214                   NVVAL(NV502D, SET_DST_FORMAT, V, format),
215
216                                 SET_DST_MEMORY_LAYOUT,
217                   NVDEF(NV502D, SET_DST_MEMORY_LAYOUT, V, PITCH));
218
219         PUSH_MTHD(push, NV502D, SET_DST_PITCH, info->fix.line_length,
220                                 SET_DST_WIDTH, info->var.xres_virtual,
221                                 SET_DST_HEIGHT, info->var.yres_virtual,
222
223                                 SET_DST_OFFSET_UPPER,
224                   NVVAL(NV502D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
225
226                                 SET_DST_OFFSET_LOWER,
227                   NVVAL(NV502D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
228
229         PUSH_MTHD(push, NV502D, SET_SRC_FORMAT,
230                   NVVAL(NV502D, SET_SRC_FORMAT, V, format),
231
232                                 SET_SRC_MEMORY_LAYOUT,
233                   NVDEF(NV502D, SET_SRC_MEMORY_LAYOUT, V, PITCH));
234
235         PUSH_MTHD(push, NV502D, SET_SRC_PITCH, info->fix.line_length,
236                                 SET_SRC_WIDTH, info->var.xres_virtual,
237                                 SET_SRC_HEIGHT, info->var.yres_virtual,
238
239                                 SET_SRC_OFFSET_UPPER,
240                   NVVAL(NV502D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
241
242                                 SET_SRC_OFFSET_LOWER,
243                   NVVAL(NV502D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
244
245         PUSH_MTHD(push, NV502D, SET_CLIP_ENABLE,
246                   NVDEF(NV502D, SET_CLIP_ENABLE, V, FALSE));
247
248         PUSH_MTHD(push, NV502D, SET_ROP,
249                   NVVAL(NV502D, SET_ROP, V, 0x55));
250
251         PUSH_MTHD(push, NV502D, SET_OPERATION,
252                   NVDEF(NV502D, SET_OPERATION, V, SRCCOPY));
253
254         PUSH_MTHD(push, NV502D, SET_MONOCHROME_PATTERN_COLOR_FORMAT,
255                   NVDEF(NV502D, SET_MONOCHROME_PATTERN_COLOR_FORMAT, V, A8R8G8B8),
256
257                                 SET_MONOCHROME_PATTERN_FORMAT,
258                   NVDEF(NV502D, SET_MONOCHROME_PATTERN_FORMAT, V, LE_M1));
259
260         PUSH_MTHD(push, NV502D, RENDER_SOLID_PRIM_MODE,
261                   NVDEF(NV502D, RENDER_SOLID_PRIM_MODE, V, RECTS),
262
263                                 SET_RENDER_SOLID_PRIM_COLOR_FORMAT,
264                   NVVAL(NV502D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format));
265
266         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DATA_TYPE,
267                   NVDEF(NV502D, SET_PIXELS_FROM_CPU_DATA_TYPE, V, INDEX),
268
269                                 SET_PIXELS_FROM_CPU_COLOR_FORMAT,
270                   NVVAL(NV502D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format),
271
272                                 SET_PIXELS_FROM_CPU_INDEX_FORMAT,
273                   NVDEF(NV502D, SET_PIXELS_FROM_CPU_INDEX_FORMAT, V, I1),
274
275                                 SET_PIXELS_FROM_CPU_MONO_FORMAT,
276                   NVDEF(NV502D, SET_PIXELS_FROM_CPU_MONO_FORMAT, V, CGA6_M1),
277
278                                 SET_PIXELS_FROM_CPU_WRAP,
279                   NVDEF(NV502D, SET_PIXELS_FROM_CPU_WRAP, V, WRAP_BYTE));
280
281         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_MONO_OPACITY,
282                   NVDEF(NV502D, SET_PIXELS_FROM_CPU_MONO_OPACITY, V, OPAQUE));
283
284         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DX_DU_FRAC, 0,
285                                 SET_PIXELS_FROM_CPU_DX_DU_INT, 1,
286                                 SET_PIXELS_FROM_CPU_DY_DV_FRAC, 0,
287                                 SET_PIXELS_FROM_CPU_DY_DV_INT, 1);
288
289         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP,
290                   NVDEF(NV502D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP, V, TRUE));
291
292         PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_DU_DX_FRAC, 0,
293                                 SET_PIXELS_FROM_MEMORY_DU_DX_INT, 1,
294                                 SET_PIXELS_FROM_MEMORY_DV_DY_FRAC, 0,
295                                 SET_PIXELS_FROM_MEMORY_DV_DY_INT, 1);
296         PUSH_KICK(push);
297         return 0;
298 }
299