36348f72ecb3987226fbf6ff7a5a84e800f3de60
[linux-2.6-microblaze.git] / drivers / gpu / drm / nouveau / nv50_fbcon.c
1 /*
2  * Copyright 2010 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #define NVIF_DEBUG_PRINT_DISABLE
25 #include "nouveau_drv.h"
26 #include "nouveau_dma.h"
27 #include "nouveau_fbcon.h"
28 #include "nouveau_vmm.h"
29
30 #include <nvif/push206e.h>
31
32 int
33 nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
34 {
35         struct nouveau_fbdev *nfbdev = info->par;
36         struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
37         struct nouveau_channel *chan = drm->channel;
38         int ret;
39
40         ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11);
41         if (ret)
42                 return ret;
43
44         if (rect->rop != ROP_COPY) {
45                 BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);
46                 OUT_RING(chan, 1);
47         }
48         BEGIN_NV04(chan, NvSub2D, 0x0588, 1);
49         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
50             info->fix.visual == FB_VISUAL_DIRECTCOLOR)
51                 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
52         else
53                 OUT_RING(chan, rect->color);
54         BEGIN_NV04(chan, NvSub2D, 0x0600, 4);
55         OUT_RING(chan, rect->dx);
56         OUT_RING(chan, rect->dy);
57         OUT_RING(chan, rect->dx + rect->width);
58         OUT_RING(chan, rect->dy + rect->height);
59         if (rect->rop != ROP_COPY) {
60                 BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);
61                 OUT_RING(chan, 3);
62         }
63         FIRE_RING(chan);
64         return 0;
65 }
66
67 int
68 nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
69 {
70         struct nouveau_fbdev *nfbdev = info->par;
71         struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
72         struct nouveau_channel *chan = drm->channel;
73         int ret;
74
75         ret = RING_SPACE(chan, 12);
76         if (ret)
77                 return ret;
78
79         BEGIN_NV04(chan, NvSub2D, 0x0110, 1);
80         OUT_RING(chan, 0);
81         BEGIN_NV04(chan, NvSub2D, 0x08b0, 4);
82         OUT_RING(chan, region->dx);
83         OUT_RING(chan, region->dy);
84         OUT_RING(chan, region->width);
85         OUT_RING(chan, region->height);
86         BEGIN_NV04(chan, NvSub2D, 0x08d0, 4);
87         OUT_RING(chan, 0);
88         OUT_RING(chan, region->sx);
89         OUT_RING(chan, 0);
90         OUT_RING(chan, region->sy);
91         FIRE_RING(chan);
92         return 0;
93 }
94
95 int
96 nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
97 {
98         struct nouveau_fbdev *nfbdev = info->par;
99         struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
100         struct nouveau_channel *chan = drm->channel;
101         uint32_t dwords, *data = (uint32_t *)image->data;
102         uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
103         uint32_t *palette = info->pseudo_palette;
104         int ret;
105
106         if (image->depth != 1)
107                 return -ENODEV;
108
109         ret = RING_SPACE(chan, 11);
110         if (ret)
111                 return ret;
112
113         BEGIN_NV04(chan, NvSub2D, 0x0814, 2);
114         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
115             info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
116                 OUT_RING(chan, palette[image->bg_color] | mask);
117                 OUT_RING(chan, palette[image->fg_color] | mask);
118         } else {
119                 OUT_RING(chan, image->bg_color);
120                 OUT_RING(chan, image->fg_color);
121         }
122         BEGIN_NV04(chan, NvSub2D, 0x0838, 2);
123         OUT_RING(chan, image->width);
124         OUT_RING(chan, image->height);
125         BEGIN_NV04(chan, NvSub2D, 0x0850, 4);
126         OUT_RING(chan, 0);
127         OUT_RING(chan, image->dx);
128         OUT_RING(chan, 0);
129         OUT_RING(chan, image->dy);
130
131         dwords = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
132         while (dwords) {
133                 int push = dwords > 2047 ? 2047 : dwords;
134
135                 ret = RING_SPACE(chan, push + 1);
136                 if (ret)
137                         return ret;
138
139                 dwords -= push;
140
141                 BEGIN_NI04(chan, NvSub2D, 0x0860, push);
142                 OUT_RINGp(chan, data, push);
143                 data += push;
144         }
145
146         FIRE_RING(chan);
147         return 0;
148 }
149
150 int
151 nv50_fbcon_accel_init(struct fb_info *info)
152 {
153         struct nouveau_fbdev *nfbdev = info->par;
154         struct drm_device *dev = nfbdev->helper.dev;
155         struct nouveau_drm *drm = nouveau_drm(dev);
156         struct nouveau_channel *chan = drm->channel;
157         struct nvif_push *push = chan->chan.push;
158         int ret, format;
159
160         switch (info->var.bits_per_pixel) {
161         case 8:
162                 format = 0xf3;
163                 break;
164         case 15:
165                 format = 0xf8;
166                 break;
167         case 16:
168                 format = 0xe8;
169                 break;
170         case 32:
171                 switch (info->var.transp.length) {
172                 case 0: /* depth 24 */
173                 case 8: /* depth 32, just use 24.. */
174                         format = 0xe6;
175                         break;
176                 case 2: /* depth 30 */
177                         format = 0xd1;
178                         break;
179                 default:
180                         return -EINVAL;
181                 }
182                 break;
183         default:
184                 return -EINVAL;
185         }
186
187         ret = nvif_object_ctor(&chan->user, "fbconTwoD", 0x502d, 0x502d,
188                                NULL, 0, &nfbdev->twod);
189         if (ret)
190                 return ret;
191
192         ret = PUSH_WAIT(push, 56);
193         if (ret) {
194                 nouveau_fbcon_gpu_lockup(info);
195                 return ret;
196         }
197
198         PUSH_NVSQ(push, NV502D, 0x0000, nfbdev->twod.handle);
199         PUSH_NVSQ(push, NV502D, 0x0184, chan->vram.handle,
200                                 0x0188, chan->vram.handle,
201                                 0x018c, chan->vram.handle);
202
203         PUSH_NVSQ(push, NV502D, 0x0200, format,
204                                 0x0204, 1);
205         PUSH_NVSQ(push, NV502D, 0x0214, info->fix.line_length,
206                                 0x0218, info->var.xres_virtual,
207                                 0x021c, info->var.yres_virtual,
208                                 0x0220, upper_32_bits(nfbdev->vma->addr),
209                                 0x0224, lower_32_bits(nfbdev->vma->addr));
210
211         PUSH_NVSQ(push, NV502D, 0x0230, format,
212                                 0x0234, 1);
213         PUSH_NVSQ(push, NV502D, 0x0244, info->fix.line_length,
214                                 0x0248, info->var.xres_virtual,
215                                 0x024c, info->var.yres_virtual,
216                                 0x0250, upper_32_bits(nfbdev->vma->addr),
217                                 0x0254, lower_32_bits(nfbdev->vma->addr));
218
219         PUSH_NVSQ(push, NV502D, 0x0290, 0);
220         PUSH_NVSQ(push, NV502D, 0x02a0, 0x55);
221         PUSH_NVSQ(push, NV502D, 0x02ac, 3);
222         PUSH_NVSQ(push, NV502D, 0x02e8, 2,
223                                 0x02ec, 1);
224
225         PUSH_NVSQ(push, NV502D, 0X0580, 4,
226                                 0x0584, format);
227
228         PUSH_NVSQ(push, NV502D, 0x0800, 1,
229                                 0x0804, format,
230                                 0x0808, 0,
231                                 0x080c, 0,
232                                 0x0810, 1);
233         PUSH_NVSQ(push, NV502D, 0x081c, 1);
234         PUSH_NVSQ(push, NV502D, 0x0840, 0,
235                                 0x0844, 1,
236                                 0x0848, 0,
237                                 0x084c, 1);
238
239         PUSH_NVSQ(push, NV502D, 0x0888, 1);
240         PUSH_NVSQ(push, NV502D, 0x08c0, 0,
241                                 0x08c4, 1,
242                                 0x08c8, 0,
243                                 0x08cc, 1);
244
245         PUSH_KICK(push);
246         return 0;
247 }
248