2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/vga_switcheroo.h>
33 #include <drm/drm_crtc_helper.h>
35 #include <core/gpuobj.h>
36 #include <core/option.h>
38 #include <core/tegra.h>
40 #include <nvif/driver.h>
41 #include <nvif/fifo.h>
42 #include <nvif/user.h>
44 #include <nvif/class.h>
45 #include <nvif/cl0002.h>
46 #include <nvif/cla06f.h>
47 #include <nvif/if0004.h>
49 #include "nouveau_drv.h"
50 #include "nouveau_dma.h"
51 #include "nouveau_ttm.h"
52 #include "nouveau_gem.h"
53 #include "nouveau_vga.h"
54 #include "nouveau_led.h"
55 #include "nouveau_hwmon.h"
56 #include "nouveau_acpi.h"
57 #include "nouveau_bios.h"
58 #include "nouveau_ioctl.h"
59 #include "nouveau_abi16.h"
60 #include "nouveau_fbcon.h"
61 #include "nouveau_fence.h"
62 #include "nouveau_debugfs.h"
63 #include "nouveau_usif.h"
64 #include "nouveau_connector.h"
65 #include "nouveau_platform.h"
67 MODULE_PARM_DESC(config, "option string to pass to driver core");
68 static char *nouveau_config;
69 module_param_named(config, nouveau_config, charp, 0400);
71 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
72 static char *nouveau_debug;
73 module_param_named(debug, nouveau_debug, charp, 0400);
75 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
76 static int nouveau_noaccel = 0;
77 module_param_named(noaccel, nouveau_noaccel, int, 0400);
79 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
80 "0 = disabled, 1 = enabled, 2 = headless)");
81 int nouveau_modeset = -1;
82 module_param_named(modeset, nouveau_modeset, int, 0400);
84 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
85 static int nouveau_runtime_pm = -1;
86 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
88 static struct drm_driver driver_stub;
89 static struct drm_driver driver_pci;
90 static struct drm_driver driver_platform;
93 nouveau_pci_name(struct pci_dev *pdev)
95 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
96 name |= pdev->bus->number << 16;
97 name |= PCI_SLOT(pdev->devfn) << 8;
98 return name | PCI_FUNC(pdev->devfn);
102 nouveau_platform_name(struct platform_device *platformdev)
104 return platformdev->id;
108 nouveau_name(struct drm_device *dev)
111 return nouveau_pci_name(dev->pdev);
113 return nouveau_platform_name(to_platform_device(dev->dev));
117 nouveau_cli_work_ready(struct dma_fence *fence)
119 if (!dma_fence_is_signaled(fence))
121 dma_fence_put(fence);
126 nouveau_cli_work(struct work_struct *w)
128 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
129 struct nouveau_cli_work *work, *wtmp;
130 mutex_lock(&cli->lock);
131 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
132 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
133 list_del(&work->head);
137 mutex_unlock(&cli->lock);
141 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
143 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
144 schedule_work(&work->cli->work);
148 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
149 struct nouveau_cli_work *work)
151 work->fence = dma_fence_get(fence);
153 mutex_lock(&cli->lock);
154 list_add_tail(&work->head, &cli->worker);
155 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
156 nouveau_cli_work_fence(fence, &work->cb);
157 mutex_unlock(&cli->lock);
161 nouveau_cli_fini(struct nouveau_cli *cli)
163 /* All our channels are dead now, which means all the fences they
164 * own are signalled, and all callback functions have been called.
166 * So, after flushing the workqueue, there should be nothing left.
168 flush_work(&cli->work);
169 WARN_ON(!list_empty(&cli->worker));
171 usif_client_fini(cli);
172 nouveau_vmm_fini(&cli->vmm);
173 nvif_mmu_fini(&cli->mmu);
174 nvif_device_fini(&cli->device);
175 mutex_lock(&cli->drm->master.lock);
176 nvif_client_fini(&cli->base);
177 mutex_unlock(&cli->drm->master.lock);
181 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
182 struct nouveau_cli *cli)
184 static const struct nvif_mclass
186 { NVIF_CLASS_MEM_GF100, -1 },
187 { NVIF_CLASS_MEM_NV50 , -1 },
188 { NVIF_CLASS_MEM_NV04 , -1 },
191 static const struct nvif_mclass
193 { NVIF_CLASS_MMU_GF100, -1 },
194 { NVIF_CLASS_MMU_NV50 , -1 },
195 { NVIF_CLASS_MMU_NV04 , -1 },
198 static const struct nvif_mclass
200 { NVIF_CLASS_VMM_GP100, -1 },
201 { NVIF_CLASS_VMM_GM200, -1 },
202 { NVIF_CLASS_VMM_GF100, -1 },
203 { NVIF_CLASS_VMM_NV50 , -1 },
204 { NVIF_CLASS_VMM_NV04 , -1 },
207 u64 device = nouveau_name(drm->dev);
210 snprintf(cli->name, sizeof(cli->name), "%s", sname);
212 mutex_init(&cli->mutex);
213 usif_client_init(cli);
215 INIT_WORK(&cli->work, nouveau_cli_work);
216 INIT_LIST_HEAD(&cli->worker);
217 mutex_init(&cli->lock);
219 if (cli == &drm->master) {
220 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
221 cli->name, device, &cli->base);
223 mutex_lock(&drm->master.lock);
224 ret = nvif_client_init(&drm->master.base, cli->name, device,
226 mutex_unlock(&drm->master.lock);
229 NV_ERROR(drm, "Client allocation failed: %d\n", ret);
233 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
234 &(struct nv_device_v0) {
236 }, sizeof(struct nv_device_v0),
239 NV_ERROR(drm, "Device allocation failed: %d\n", ret);
243 ret = nvif_mclass(&cli->device.object, mmus);
245 NV_ERROR(drm, "No supported MMU class\n");
249 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
251 NV_ERROR(drm, "MMU allocation failed: %d\n", ret);
255 ret = nvif_mclass(&cli->mmu.object, vmms);
257 NV_ERROR(drm, "No supported VMM class\n");
261 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
263 NV_ERROR(drm, "VMM allocation failed: %d\n", ret);
267 ret = nvif_mclass(&cli->mmu.object, mems);
269 NV_ERROR(drm, "No supported MEM class\n");
273 cli->mem = &mems[ret];
277 nouveau_cli_fini(cli);
282 nouveau_accel_fini(struct nouveau_drm *drm)
284 nouveau_channel_idle(drm->channel);
285 nvif_object_fini(&drm->ntfy);
286 nvkm_gpuobj_del(&drm->notify);
287 nvif_notify_fini(&drm->flip);
288 nvif_object_fini(&drm->nvsw);
289 nouveau_channel_del(&drm->channel);
291 nouveau_channel_idle(drm->cechan);
292 nvif_object_fini(&drm->ttm.copy);
293 nouveau_channel_del(&drm->cechan);
296 nouveau_fence(drm)->dtor(drm);
300 nouveau_accel_init(struct nouveau_drm *drm)
302 struct nvif_device *device = &drm->client.device;
303 struct nvif_sclass *sclass;
310 ret = nouveau_channels_init(drm);
314 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
315 ret = nvif_user_init(device);
320 /* initialise synchronisation routines */
321 /*XXX: this is crap, but the fence/channel stuff is a little
322 * backwards in some places. this will be fixed.
324 ret = n = nvif_object_sclass_get(&device->object, &sclass);
328 for (ret = -ENOSYS, i = 0; i < n; i++) {
329 switch (sclass[i].oclass) {
330 case NV03_CHANNEL_DMA:
331 ret = nv04_fence_create(drm);
333 case NV10_CHANNEL_DMA:
334 ret = nv10_fence_create(drm);
336 case NV17_CHANNEL_DMA:
337 case NV40_CHANNEL_DMA:
338 ret = nv17_fence_create(drm);
340 case NV50_CHANNEL_GPFIFO:
341 ret = nv50_fence_create(drm);
343 case G82_CHANNEL_GPFIFO:
344 ret = nv84_fence_create(drm);
346 case FERMI_CHANNEL_GPFIFO:
347 case KEPLER_CHANNEL_GPFIFO_A:
348 case KEPLER_CHANNEL_GPFIFO_B:
349 case MAXWELL_CHANNEL_GPFIFO_A:
350 case PASCAL_CHANNEL_GPFIFO_A:
351 case VOLTA_CHANNEL_GPFIFO_A:
352 ret = nvc0_fence_create(drm);
359 nvif_object_sclass_put(&sclass);
361 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
362 nouveau_accel_fini(drm);
366 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
367 ret = nouveau_channel_new(drm, &drm->client.device,
368 nvif_fifo_runlist_ce(device), 0,
371 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
373 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
376 if (device->info.chipset >= 0xa3 &&
377 device->info.chipset != 0xaa &&
378 device->info.chipset != 0xac) {
379 ret = nouveau_channel_new(drm, &drm->client.device,
380 NvDmaFB, NvDmaTT, &drm->cechan);
382 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
391 ret = nouveau_channel_new(drm, &drm->client.device,
392 arg0, arg1, &drm->channel);
394 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
395 nouveau_accel_fini(drm);
399 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
400 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
401 nouveau_abi16_swclass(drm), NULL, 0,
404 ret = RING_SPACE(drm->channel, 2);
406 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
407 OUT_RING (drm->channel, drm->nvsw.handle);
410 ret = nvif_notify_init(&drm->nvsw,
411 nouveau_flip_complete,
412 false, NV04_NVSW_NTFY_UEVENT,
413 NULL, 0, 0, &drm->flip);
415 ret = nvif_notify_get(&drm->flip);
417 nouveau_accel_fini(drm);
423 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
424 nouveau_accel_fini(drm);
429 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
430 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
431 false, NULL, &drm->notify);
433 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
434 nouveau_accel_fini(drm);
438 ret = nvif_object_init(&drm->channel->user, NvNotify0,
440 &(struct nv_dma_v0) {
441 .target = NV_DMA_V0_TARGET_VRAM,
442 .access = NV_DMA_V0_ACCESS_RDWR,
443 .start = drm->notify->addr,
444 .limit = drm->notify->addr + 31
445 }, sizeof(struct nv_dma_v0),
448 nouveau_accel_fini(drm);
454 nouveau_bo_move_init(drm);
457 static int nouveau_drm_probe(struct pci_dev *pdev,
458 const struct pci_device_id *pent)
460 struct nvkm_device *device;
461 struct apertures_struct *aper;
465 if (vga_switcheroo_client_probe_defer(pdev))
466 return -EPROBE_DEFER;
468 /* We need to check that the chipset is supported before booting
469 * fbdev off the hardware, as there's no way to put it back.
471 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
475 nvkm_device_del(&device);
477 /* Remove conflicting drivers (vesafb, efifb etc). */
478 aper = alloc_apertures(3);
482 aper->ranges[0].base = pci_resource_start(pdev, 1);
483 aper->ranges[0].size = pci_resource_len(pdev, 1);
486 if (pci_resource_len(pdev, 2)) {
487 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
488 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
492 if (pci_resource_len(pdev, 3)) {
493 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
494 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
499 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
501 if (nouveau_modeset != 2)
502 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
505 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
506 true, true, ~0ULL, &device);
510 pci_set_master(pdev);
512 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
514 nvkm_device_del(&device);
522 nouveau_drm_load(struct drm_device *dev, unsigned long flags)
524 struct nouveau_drm *drm;
527 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
529 dev->dev_private = drm;
532 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
536 ret = nouveau_cli_init(drm, "DRM", &drm->client);
540 dev->irq_enabled = true;
542 nvxx_client(&drm->client.base)->debug =
543 nvkm_dbgopt(nouveau_debug, "DRM");
545 INIT_LIST_HEAD(&drm->clients);
546 spin_lock_init(&drm->tile.lock);
548 /* workaround an odd issue on nvc1 by disabling the device's
549 * nosnoop capability. hopefully won't cause issues until a
550 * better fix is found - assuming there is one...
552 if (drm->client.device.info.chipset == 0xc1)
553 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
555 nouveau_vga_init(drm);
557 ret = nouveau_ttm_init(drm);
561 ret = nouveau_bios_init(dev);
565 ret = nouveau_display_create(dev);
569 if (dev->mode_config.num_crtc) {
570 ret = nouveau_display_init(dev);
575 nouveau_debugfs_init(drm);
576 nouveau_hwmon_init(dev);
577 nouveau_accel_init(drm);
578 nouveau_fbcon_init(dev);
579 nouveau_led_init(dev);
581 if (nouveau_pmops_runtime()) {
582 pm_runtime_use_autosuspend(dev->dev);
583 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
584 pm_runtime_set_active(dev->dev);
585 pm_runtime_allow(dev->dev);
586 pm_runtime_mark_last_busy(dev->dev);
587 pm_runtime_put(dev->dev);
589 /* enable polling for external displays */
590 drm_kms_helper_poll_enable(dev);
595 nouveau_display_destroy(dev);
597 nouveau_bios_takedown(dev);
599 nouveau_ttm_fini(drm);
601 nouveau_vga_fini(drm);
602 nouveau_cli_fini(&drm->client);
603 nouveau_cli_fini(&drm->master);
609 nouveau_drm_unload(struct drm_device *dev)
611 struct nouveau_drm *drm = nouveau_drm(dev);
613 if (nouveau_pmops_runtime()) {
614 pm_runtime_get_sync(dev->dev);
615 pm_runtime_forbid(dev->dev);
618 nouveau_led_fini(dev);
619 nouveau_fbcon_fini(dev);
620 nouveau_accel_fini(drm);
621 nouveau_hwmon_fini(dev);
622 nouveau_debugfs_fini(drm);
624 if (dev->mode_config.num_crtc)
625 nouveau_display_fini(dev, false);
626 nouveau_display_destroy(dev);
628 nouveau_bios_takedown(dev);
630 nouveau_ttm_fini(drm);
631 nouveau_vga_fini(drm);
633 nouveau_cli_fini(&drm->client);
634 nouveau_cli_fini(&drm->master);
639 nouveau_drm_device_remove(struct drm_device *dev)
641 struct nouveau_drm *drm = nouveau_drm(dev);
642 struct nvkm_client *client;
643 struct nvkm_device *device;
645 dev->irq_enabled = false;
646 client = nvxx_client(&drm->client.base);
647 device = nvkm_device_find(client->device);
650 nvkm_device_del(&device);
654 nouveau_drm_remove(struct pci_dev *pdev)
656 struct drm_device *dev = pci_get_drvdata(pdev);
658 nouveau_drm_device_remove(dev);
662 nouveau_do_suspend(struct drm_device *dev, bool runtime)
664 struct nouveau_drm *drm = nouveau_drm(dev);
667 nouveau_led_suspend(dev);
669 if (dev->mode_config.num_crtc) {
670 NV_DEBUG(drm, "suspending console...\n");
671 nouveau_fbcon_set_suspend(dev, 1);
672 NV_DEBUG(drm, "suspending display...\n");
673 ret = nouveau_display_suspend(dev, runtime);
678 NV_DEBUG(drm, "evicting buffers...\n");
679 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
681 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
683 ret = nouveau_channel_idle(drm->cechan);
689 ret = nouveau_channel_idle(drm->channel);
694 NV_DEBUG(drm, "suspending fence...\n");
695 if (drm->fence && nouveau_fence(drm)->suspend) {
696 if (!nouveau_fence(drm)->suspend(drm)) {
702 NV_DEBUG(drm, "suspending object tree...\n");
703 ret = nvif_client_suspend(&drm->master.base);
710 if (drm->fence && nouveau_fence(drm)->resume)
711 nouveau_fence(drm)->resume(drm);
714 if (dev->mode_config.num_crtc) {
715 NV_DEBUG(drm, "resuming display...\n");
716 nouveau_display_resume(dev, runtime);
722 nouveau_do_resume(struct drm_device *dev, bool runtime)
724 struct nouveau_drm *drm = nouveau_drm(dev);
726 NV_DEBUG(drm, "resuming object tree...\n");
727 nvif_client_resume(&drm->master.base);
729 NV_DEBUG(drm, "resuming fence...\n");
730 if (drm->fence && nouveau_fence(drm)->resume)
731 nouveau_fence(drm)->resume(drm);
733 nouveau_run_vbios_init(dev);
735 if (dev->mode_config.num_crtc) {
736 NV_DEBUG(drm, "resuming display...\n");
737 nouveau_display_resume(dev, runtime);
738 NV_DEBUG(drm, "resuming console...\n");
739 nouveau_fbcon_set_suspend(dev, 0);
742 nouveau_led_resume(dev);
748 nouveau_pmops_suspend(struct device *dev)
750 struct pci_dev *pdev = to_pci_dev(dev);
751 struct drm_device *drm_dev = pci_get_drvdata(pdev);
754 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
755 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
758 ret = nouveau_do_suspend(drm_dev, false);
762 pci_save_state(pdev);
763 pci_disable_device(pdev);
764 pci_set_power_state(pdev, PCI_D3hot);
770 nouveau_pmops_resume(struct device *dev)
772 struct pci_dev *pdev = to_pci_dev(dev);
773 struct drm_device *drm_dev = pci_get_drvdata(pdev);
776 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
777 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
780 pci_set_power_state(pdev, PCI_D0);
781 pci_restore_state(pdev);
782 ret = pci_enable_device(pdev);
785 pci_set_master(pdev);
787 ret = nouveau_do_resume(drm_dev, false);
789 /* Monitors may have been connected / disconnected during suspend */
790 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
796 nouveau_pmops_freeze(struct device *dev)
798 struct pci_dev *pdev = to_pci_dev(dev);
799 struct drm_device *drm_dev = pci_get_drvdata(pdev);
800 return nouveau_do_suspend(drm_dev, false);
804 nouveau_pmops_thaw(struct device *dev)
806 struct pci_dev *pdev = to_pci_dev(dev);
807 struct drm_device *drm_dev = pci_get_drvdata(pdev);
808 return nouveau_do_resume(drm_dev, false);
812 nouveau_pmops_runtime(void)
814 if (nouveau_runtime_pm == -1)
815 return nouveau_is_optimus() || nouveau_is_v1_dsm();
816 return nouveau_runtime_pm == 1;
820 nouveau_pmops_runtime_suspend(struct device *dev)
822 struct pci_dev *pdev = to_pci_dev(dev);
823 struct drm_device *drm_dev = pci_get_drvdata(pdev);
826 if (!nouveau_pmops_runtime()) {
827 pm_runtime_forbid(dev);
831 drm_kms_helper_poll_disable(drm_dev);
832 nouveau_switcheroo_optimus_dsm();
833 ret = nouveau_do_suspend(drm_dev, true);
834 pci_save_state(pdev);
835 pci_disable_device(pdev);
836 pci_ignore_hotplug(pdev);
837 pci_set_power_state(pdev, PCI_D3cold);
838 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
843 nouveau_pmops_runtime_resume(struct device *dev)
845 struct pci_dev *pdev = to_pci_dev(dev);
846 struct drm_device *drm_dev = pci_get_drvdata(pdev);
847 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
850 if (!nouveau_pmops_runtime()) {
851 pm_runtime_forbid(dev);
855 pci_set_power_state(pdev, PCI_D0);
856 pci_restore_state(pdev);
857 ret = pci_enable_device(pdev);
860 pci_set_master(pdev);
862 ret = nouveau_do_resume(drm_dev, true);
865 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
866 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
868 /* Monitors may have been connected / disconnected during suspend */
869 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
875 nouveau_pmops_runtime_idle(struct device *dev)
877 struct pci_dev *pdev = to_pci_dev(dev);
878 struct drm_device *drm_dev = pci_get_drvdata(pdev);
879 struct nouveau_drm *drm = nouveau_drm(drm_dev);
880 struct drm_crtc *crtc;
882 if (!nouveau_pmops_runtime()) {
883 pm_runtime_forbid(dev);
887 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
889 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
893 pm_runtime_mark_last_busy(dev);
894 pm_runtime_autosuspend(dev);
895 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
900 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
902 struct nouveau_drm *drm = nouveau_drm(dev);
903 struct nouveau_cli *cli;
904 char name[32], tmpname[TASK_COMM_LEN];
907 /* need to bring up power immediately if opening device */
908 ret = pm_runtime_get_sync(dev->dev);
909 if (ret < 0 && ret != -EACCES)
912 get_task_comm(tmpname, current);
913 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
915 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL)))
918 ret = nouveau_cli_init(drm, name, cli);
922 cli->base.super = false;
924 fpriv->driver_priv = cli;
926 mutex_lock(&drm->client.mutex);
927 list_add(&cli->head, &drm->clients);
928 mutex_unlock(&drm->client.mutex);
932 nouveau_cli_fini(cli);
936 pm_runtime_mark_last_busy(dev->dev);
937 pm_runtime_put_autosuspend(dev->dev);
942 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
944 struct nouveau_cli *cli = nouveau_cli(fpriv);
945 struct nouveau_drm *drm = nouveau_drm(dev);
947 pm_runtime_get_sync(dev->dev);
949 mutex_lock(&cli->mutex);
951 nouveau_abi16_fini(cli->abi16);
952 mutex_unlock(&cli->mutex);
954 mutex_lock(&drm->client.mutex);
955 list_del(&cli->head);
956 mutex_unlock(&drm->client.mutex);
958 nouveau_cli_fini(cli);
960 pm_runtime_mark_last_busy(dev->dev);
961 pm_runtime_put_autosuspend(dev->dev);
964 static const struct drm_ioctl_desc
966 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
967 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
968 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
969 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
970 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
971 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
972 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
973 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
974 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
975 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
976 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
977 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
981 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
983 struct drm_file *filp = file->private_data;
984 struct drm_device *dev = filp->minor->dev;
987 ret = pm_runtime_get_sync(dev->dev);
988 if (ret < 0 && ret != -EACCES)
991 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
992 case DRM_NOUVEAU_NVIF:
993 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
996 ret = drm_ioctl(file, cmd, arg);
1000 pm_runtime_mark_last_busy(dev->dev);
1001 pm_runtime_put_autosuspend(dev->dev);
1005 static const struct file_operations
1006 nouveau_driver_fops = {
1007 .owner = THIS_MODULE,
1009 .release = drm_release,
1010 .unlocked_ioctl = nouveau_drm_ioctl,
1011 .mmap = nouveau_ttm_mmap,
1014 #if defined(CONFIG_COMPAT)
1015 .compat_ioctl = nouveau_compat_ioctl,
1017 .llseek = noop_llseek,
1020 static struct drm_driver
1023 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1024 DRIVER_KMS_LEGACY_CONTEXT,
1026 .load = nouveau_drm_load,
1027 .unload = nouveau_drm_unload,
1028 .open = nouveau_drm_open,
1029 .postclose = nouveau_drm_postclose,
1030 .lastclose = nouveau_vga_lastclose,
1032 #if defined(CONFIG_DEBUG_FS)
1033 .debugfs_init = nouveau_drm_debugfs_init,
1036 .enable_vblank = nouveau_display_vblank_enable,
1037 .disable_vblank = nouveau_display_vblank_disable,
1038 .get_scanout_position = nouveau_display_scanoutpos,
1039 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
1041 .ioctls = nouveau_ioctls,
1042 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1043 .fops = &nouveau_driver_fops,
1045 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1046 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1047 .gem_prime_export = drm_gem_prime_export,
1048 .gem_prime_import = drm_gem_prime_import,
1049 .gem_prime_pin = nouveau_gem_prime_pin,
1050 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1051 .gem_prime_unpin = nouveau_gem_prime_unpin,
1052 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1053 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1054 .gem_prime_vmap = nouveau_gem_prime_vmap,
1055 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
1057 .gem_free_object_unlocked = nouveau_gem_object_del,
1058 .gem_open_object = nouveau_gem_object_open,
1059 .gem_close_object = nouveau_gem_object_close,
1061 .dumb_create = nouveau_display_dumb_create,
1062 .dumb_map_offset = nouveau_display_dumb_map_offset,
1064 .name = DRIVER_NAME,
1065 .desc = DRIVER_DESC,
1067 .date = GIT_REVISION,
1069 .date = DRIVER_DATE,
1071 .major = DRIVER_MAJOR,
1072 .minor = DRIVER_MINOR,
1073 .patchlevel = DRIVER_PATCHLEVEL,
1076 static struct pci_device_id
1077 nouveau_drm_pci_table[] = {
1079 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1080 .class = PCI_BASE_CLASS_DISPLAY << 16,
1081 .class_mask = 0xff << 16,
1084 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1085 .class = PCI_BASE_CLASS_DISPLAY << 16,
1086 .class_mask = 0xff << 16,
1091 static void nouveau_display_options(void)
1093 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1095 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1096 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1097 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1098 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1099 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1100 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1101 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1102 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1103 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1104 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1105 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1108 static const struct dev_pm_ops nouveau_pm_ops = {
1109 .suspend = nouveau_pmops_suspend,
1110 .resume = nouveau_pmops_resume,
1111 .freeze = nouveau_pmops_freeze,
1112 .thaw = nouveau_pmops_thaw,
1113 .poweroff = nouveau_pmops_freeze,
1114 .restore = nouveau_pmops_resume,
1115 .runtime_suspend = nouveau_pmops_runtime_suspend,
1116 .runtime_resume = nouveau_pmops_runtime_resume,
1117 .runtime_idle = nouveau_pmops_runtime_idle,
1120 static struct pci_driver
1121 nouveau_drm_pci_driver = {
1123 .id_table = nouveau_drm_pci_table,
1124 .probe = nouveau_drm_probe,
1125 .remove = nouveau_drm_remove,
1126 .driver.pm = &nouveau_pm_ops,
1130 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1131 struct platform_device *pdev,
1132 struct nvkm_device **pdevice)
1134 struct drm_device *drm;
1137 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1138 true, true, ~0ULL, pdevice);
1142 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1148 platform_set_drvdata(pdev, drm);
1153 nvkm_device_del(pdevice);
1155 return ERR_PTR(err);
1159 nouveau_drm_init(void)
1161 driver_pci = driver_stub;
1162 driver_platform = driver_stub;
1164 nouveau_display_options();
1166 if (nouveau_modeset == -1) {
1167 if (vgacon_text_force())
1168 nouveau_modeset = 0;
1171 if (!nouveau_modeset)
1174 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1175 platform_driver_register(&nouveau_platform_driver);
1178 nouveau_register_dsm_handler();
1179 nouveau_backlight_ctor();
1182 return pci_register_driver(&nouveau_drm_pci_driver);
1189 nouveau_drm_exit(void)
1191 if (!nouveau_modeset)
1195 pci_unregister_driver(&nouveau_drm_pci_driver);
1197 nouveau_backlight_dtor();
1198 nouveau_unregister_dsm_handler();
1200 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1201 platform_driver_unregister(&nouveau_platform_driver);
1205 module_init(nouveau_drm_init);
1206 module_exit(nouveau_drm_exit);
1208 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1209 MODULE_AUTHOR(DRIVER_AUTHOR);
1210 MODULE_DESCRIPTION(DRIVER_DESC);
1211 MODULE_LICENSE("GPL and additional rights");