2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/vga_switcheroo.h>
31 #include <linux/mmu_notifier.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_ioctl.h>
35 #include <drm/drm_vblank.h>
37 #include <core/gpuobj.h>
38 #include <core/option.h>
40 #include <core/tegra.h>
42 #include <nvif/driver.h>
43 #include <nvif/fifo.h>
44 #include <nvif/push006c.h>
45 #include <nvif/user.h>
47 #include <nvif/class.h>
48 #include <nvif/cl0002.h>
49 #include <nvif/cla06f.h>
51 #include "nouveau_drv.h"
52 #include "nouveau_dma.h"
53 #include "nouveau_ttm.h"
54 #include "nouveau_gem.h"
55 #include "nouveau_vga.h"
56 #include "nouveau_led.h"
57 #include "nouveau_hwmon.h"
58 #include "nouveau_acpi.h"
59 #include "nouveau_bios.h"
60 #include "nouveau_ioctl.h"
61 #include "nouveau_abi16.h"
62 #include "nouveau_fbcon.h"
63 #include "nouveau_fence.h"
64 #include "nouveau_debugfs.h"
65 #include "nouveau_usif.h"
66 #include "nouveau_connector.h"
67 #include "nouveau_platform.h"
68 #include "nouveau_svm.h"
69 #include "nouveau_dmem.h"
71 MODULE_PARM_DESC(config, "option string to pass to driver core");
72 static char *nouveau_config;
73 module_param_named(config, nouveau_config, charp, 0400);
75 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
76 static char *nouveau_debug;
77 module_param_named(debug, nouveau_debug, charp, 0400);
79 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
80 static int nouveau_noaccel = 0;
81 module_param_named(noaccel, nouveau_noaccel, int, 0400);
83 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
84 "0 = disabled, 1 = enabled, 2 = headless)");
85 int nouveau_modeset = -1;
86 module_param_named(modeset, nouveau_modeset, int, 0400);
88 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
89 static int nouveau_atomic = 0;
90 module_param_named(atomic, nouveau_atomic, int, 0400);
92 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
93 static int nouveau_runtime_pm = -1;
94 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
96 static struct drm_driver driver_stub;
97 static struct drm_driver driver_pci;
98 static struct drm_driver driver_platform;
101 nouveau_pci_name(struct pci_dev *pdev)
103 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
104 name |= pdev->bus->number << 16;
105 name |= PCI_SLOT(pdev->devfn) << 8;
106 return name | PCI_FUNC(pdev->devfn);
110 nouveau_platform_name(struct platform_device *platformdev)
112 return platformdev->id;
116 nouveau_name(struct drm_device *dev)
119 return nouveau_pci_name(dev->pdev);
121 return nouveau_platform_name(to_platform_device(dev->dev));
125 nouveau_cli_work_ready(struct dma_fence *fence)
127 if (!dma_fence_is_signaled(fence))
129 dma_fence_put(fence);
134 nouveau_cli_work(struct work_struct *w)
136 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
137 struct nouveau_cli_work *work, *wtmp;
138 mutex_lock(&cli->lock);
139 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
140 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
141 list_del(&work->head);
145 mutex_unlock(&cli->lock);
149 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
151 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
152 schedule_work(&work->cli->work);
156 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
157 struct nouveau_cli_work *work)
159 work->fence = dma_fence_get(fence);
161 mutex_lock(&cli->lock);
162 list_add_tail(&work->head, &cli->worker);
163 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
164 nouveau_cli_work_fence(fence, &work->cb);
165 mutex_unlock(&cli->lock);
169 nouveau_cli_fini(struct nouveau_cli *cli)
171 /* All our channels are dead now, which means all the fences they
172 * own are signalled, and all callback functions have been called.
174 * So, after flushing the workqueue, there should be nothing left.
176 flush_work(&cli->work);
177 WARN_ON(!list_empty(&cli->worker));
179 usif_client_fini(cli);
180 nouveau_vmm_fini(&cli->svm);
181 nouveau_vmm_fini(&cli->vmm);
182 nvif_mmu_dtor(&cli->mmu);
183 nvif_device_dtor(&cli->device);
184 mutex_lock(&cli->drm->master.lock);
185 nvif_client_dtor(&cli->base);
186 mutex_unlock(&cli->drm->master.lock);
190 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
191 struct nouveau_cli *cli)
193 static const struct nvif_mclass
195 { NVIF_CLASS_MEM_GF100, -1 },
196 { NVIF_CLASS_MEM_NV50 , -1 },
197 { NVIF_CLASS_MEM_NV04 , -1 },
200 static const struct nvif_mclass
202 { NVIF_CLASS_MMU_GF100, -1 },
203 { NVIF_CLASS_MMU_NV50 , -1 },
204 { NVIF_CLASS_MMU_NV04 , -1 },
207 static const struct nvif_mclass
209 { NVIF_CLASS_VMM_GP100, -1 },
210 { NVIF_CLASS_VMM_GM200, -1 },
211 { NVIF_CLASS_VMM_GF100, -1 },
212 { NVIF_CLASS_VMM_NV50 , -1 },
213 { NVIF_CLASS_VMM_NV04 , -1 },
216 u64 device = nouveau_name(drm->dev);
219 snprintf(cli->name, sizeof(cli->name), "%s", sname);
221 mutex_init(&cli->mutex);
222 usif_client_init(cli);
224 INIT_WORK(&cli->work, nouveau_cli_work);
225 INIT_LIST_HEAD(&cli->worker);
226 mutex_init(&cli->lock);
228 if (cli == &drm->master) {
229 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
230 cli->name, device, &cli->base);
232 mutex_lock(&drm->master.lock);
233 ret = nvif_client_ctor(&drm->master.base, cli->name, device,
235 mutex_unlock(&drm->master.lock);
238 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
242 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
243 &(struct nv_device_v0) {
245 }, sizeof(struct nv_device_v0),
248 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
252 ret = nvif_mclass(&cli->device.object, mmus);
254 NV_PRINTK(err, cli, "No supported MMU class\n");
258 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
261 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
265 ret = nvif_mclass(&cli->mmu.object, vmms);
267 NV_PRINTK(err, cli, "No supported VMM class\n");
271 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
273 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
277 ret = nvif_mclass(&cli->mmu.object, mems);
279 NV_PRINTK(err, cli, "No supported MEM class\n");
283 cli->mem = &mems[ret];
287 nouveau_cli_fini(cli);
292 nouveau_accel_ce_fini(struct nouveau_drm *drm)
294 nouveau_channel_idle(drm->cechan);
295 nvif_object_dtor(&drm->ttm.copy);
296 nouveau_channel_del(&drm->cechan);
300 nouveau_accel_ce_init(struct nouveau_drm *drm)
302 struct nvif_device *device = &drm->client.device;
305 /* Allocate channel that has access to a (preferably async) copy
306 * engine, to use for TTM buffer moves.
308 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
309 ret = nouveau_channel_new(drm, device,
310 nvif_fifo_runlist_ce(device), 0,
313 if (device->info.chipset >= 0xa3 &&
314 device->info.chipset != 0xaa &&
315 device->info.chipset != 0xac) {
316 /* Prior to Kepler, there's only a single runlist, so all
317 * engines can be accessed from any channel.
319 * We still want to use a separate channel though.
321 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
326 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
330 nouveau_accel_gr_fini(struct nouveau_drm *drm)
332 nouveau_channel_idle(drm->channel);
333 nvif_object_dtor(&drm->ntfy);
334 nvkm_gpuobj_del(&drm->notify);
335 nouveau_channel_del(&drm->channel);
339 nouveau_accel_gr_init(struct nouveau_drm *drm)
341 struct nvif_device *device = &drm->client.device;
345 /* Allocate channel that has access to the graphics engine. */
346 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
347 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
354 ret = nouveau_channel_new(drm, device, arg0, arg1, false,
357 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
358 nouveau_accel_gr_fini(drm);
362 /* A SW class is used on pre-NV50 HW to assist with handling the
363 * synchronisation of page flips, as well as to implement fences
364 * on TNT/TNT2 HW that lacks any kind of support in host.
366 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
367 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
368 NVDRM_NVSW, nouveau_abi16_swclass(drm),
369 NULL, 0, &drm->channel->nvsw);
371 struct nvif_push *push = drm->channel->chan.push;
372 ret = PUSH_WAIT(push, 2);
374 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
378 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
379 nouveau_accel_gr_fini(drm);
384 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
385 * even if notification is never requested, so, allocate a ctxdma on
386 * any GPU where it's possible we'll end up using M2MF for BO moves.
388 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
389 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
392 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
393 nouveau_accel_gr_fini(drm);
397 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
398 NvNotify0, NV_DMA_IN_MEMORY,
399 &(struct nv_dma_v0) {
400 .target = NV_DMA_V0_TARGET_VRAM,
401 .access = NV_DMA_V0_ACCESS_RDWR,
402 .start = drm->notify->addr,
403 .limit = drm->notify->addr + 31
404 }, sizeof(struct nv_dma_v0),
407 nouveau_accel_gr_fini(drm);
414 nouveau_accel_fini(struct nouveau_drm *drm)
416 nouveau_accel_ce_fini(drm);
417 nouveau_accel_gr_fini(drm);
419 nouveau_fence(drm)->dtor(drm);
423 nouveau_accel_init(struct nouveau_drm *drm)
425 struct nvif_device *device = &drm->client.device;
426 struct nvif_sclass *sclass;
432 /* Initialise global support for channels, and synchronisation. */
433 ret = nouveau_channels_init(drm);
437 /*XXX: this is crap, but the fence/channel stuff is a little
438 * backwards in some places. this will be fixed.
440 ret = n = nvif_object_sclass_get(&device->object, &sclass);
444 for (ret = -ENOSYS, i = 0; i < n; i++) {
445 switch (sclass[i].oclass) {
446 case NV03_CHANNEL_DMA:
447 ret = nv04_fence_create(drm);
449 case NV10_CHANNEL_DMA:
450 ret = nv10_fence_create(drm);
452 case NV17_CHANNEL_DMA:
453 case NV40_CHANNEL_DMA:
454 ret = nv17_fence_create(drm);
456 case NV50_CHANNEL_GPFIFO:
457 ret = nv50_fence_create(drm);
459 case G82_CHANNEL_GPFIFO:
460 ret = nv84_fence_create(drm);
462 case FERMI_CHANNEL_GPFIFO:
463 case KEPLER_CHANNEL_GPFIFO_A:
464 case KEPLER_CHANNEL_GPFIFO_B:
465 case MAXWELL_CHANNEL_GPFIFO_A:
466 case PASCAL_CHANNEL_GPFIFO_A:
467 case VOLTA_CHANNEL_GPFIFO_A:
468 case TURING_CHANNEL_GPFIFO_A:
469 ret = nvc0_fence_create(drm);
476 nvif_object_sclass_put(&sclass);
478 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
479 nouveau_accel_fini(drm);
483 /* Volta requires access to a doorbell register for kickoff. */
484 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
485 ret = nvif_user_ctor(device, "drmUsermode");
490 /* Allocate channels we need to support various functions. */
491 nouveau_accel_gr_init(drm);
492 nouveau_accel_ce_init(drm);
494 /* Initialise accelerated TTM buffer moves. */
495 nouveau_bo_move_init(drm);
498 static void __printf(2, 3)
499 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
501 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
502 struct va_format vaf;
508 NV_ERROR(drm, "%pV", &vaf);
512 static void __printf(2, 3)
513 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
515 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
516 struct va_format vaf;
522 NV_DEBUG(drm, "%pV", &vaf);
526 static const struct nvif_parent_func
528 .debugf = nouveau_drm_debugf,
529 .errorf = nouveau_drm_errorf,
533 nouveau_drm_device_init(struct drm_device *dev)
535 struct nouveau_drm *drm;
538 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
540 dev->dev_private = drm;
543 nvif_parent_ctor(&nouveau_parent, &drm->parent);
544 drm->master.base.object.parent = &drm->parent;
546 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
550 ret = nouveau_cli_init(drm, "DRM", &drm->client);
554 dev->irq_enabled = true;
556 nvxx_client(&drm->client.base)->debug =
557 nvkm_dbgopt(nouveau_debug, "DRM");
559 INIT_LIST_HEAD(&drm->clients);
560 spin_lock_init(&drm->tile.lock);
562 /* workaround an odd issue on nvc1 by disabling the device's
563 * nosnoop capability. hopefully won't cause issues until a
564 * better fix is found - assuming there is one...
566 if (drm->client.device.info.chipset == 0xc1)
567 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
569 nouveau_vga_init(drm);
571 ret = nouveau_ttm_init(drm);
575 ret = nouveau_bios_init(dev);
579 nouveau_accel_init(drm);
581 ret = nouveau_display_create(dev);
585 if (dev->mode_config.num_crtc) {
586 ret = nouveau_display_init(dev, false, false);
591 nouveau_debugfs_init(drm);
592 nouveau_hwmon_init(dev);
593 nouveau_svm_init(drm);
594 nouveau_dmem_init(drm);
595 nouveau_fbcon_init(dev);
596 nouveau_led_init(dev);
598 if (nouveau_pmops_runtime()) {
599 pm_runtime_use_autosuspend(dev->dev);
600 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
601 pm_runtime_set_active(dev->dev);
602 pm_runtime_allow(dev->dev);
603 pm_runtime_mark_last_busy(dev->dev);
604 pm_runtime_put(dev->dev);
610 nouveau_display_destroy(dev);
612 nouveau_accel_fini(drm);
613 nouveau_bios_takedown(dev);
615 nouveau_ttm_fini(drm);
617 nouveau_vga_fini(drm);
618 nouveau_cli_fini(&drm->client);
620 nouveau_cli_fini(&drm->master);
622 nvif_parent_dtor(&drm->parent);
628 nouveau_drm_device_fini(struct drm_device *dev)
630 struct nouveau_drm *drm = nouveau_drm(dev);
632 if (nouveau_pmops_runtime()) {
633 pm_runtime_get_sync(dev->dev);
634 pm_runtime_forbid(dev->dev);
637 nouveau_led_fini(dev);
638 nouveau_fbcon_fini(dev);
639 nouveau_dmem_fini(drm);
640 nouveau_svm_fini(drm);
641 nouveau_hwmon_fini(dev);
642 nouveau_debugfs_fini(drm);
644 if (dev->mode_config.num_crtc)
645 nouveau_display_fini(dev, false, false);
646 nouveau_display_destroy(dev);
648 nouveau_accel_fini(drm);
649 nouveau_bios_takedown(dev);
651 nouveau_ttm_fini(drm);
652 nouveau_vga_fini(drm);
654 nouveau_cli_fini(&drm->client);
655 nouveau_cli_fini(&drm->master);
656 nvif_parent_dtor(&drm->parent);
661 * On some Intel PCIe bridge controllers doing a
662 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
663 * Skipping the intermediate D3hot step seems to make it work again. This is
664 * probably caused by not meeting the expectation the involved AML code has
665 * when the GPU is put into D3hot state before invoking it.
667 * This leads to various manifestations of this issue:
668 * - AML code execution to power on the GPU hits an infinite loop (as the
669 * code waits on device memory to change).
670 * - kernel crashes, as all PCI reads return -1, which most code isn't able
671 * to handle well enough.
673 * In all cases dmesg will contain at least one line like this:
674 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
675 * followed by a lot of nouveau timeouts.
677 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
678 * documented PCI config space register 0x248 of the Intel PCIe bridge
679 * controller (0x1901) in order to change the state of the PCIe link between
680 * the PCIe port and the GPU. There are alternative code paths using other
681 * registers, which seem to work fine (executed pre Windows 8):
682 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
683 * - 0xb0 bit 0x10 (link disable)
684 * Changing the conditions inside the firmware by poking into the relevant
685 * addresses does resolve the issue, but it seemed to be ACPI private memory
686 * and not any device accessible memory at all, so there is no portable way of
687 * changing the conditions.
688 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
690 * The only systems where this behavior can be seen are hybrid graphics laptops
691 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
692 * this issue only occurs in combination with listed Intel PCIe bridge
693 * controllers and the mentioned GPUs or other devices as well.
695 * documentation on the PCIe bridge controller can be found in the
696 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
697 * Section "12 PCI Express* Controller (x16) Registers"
700 static void quirk_broken_nv_runpm(struct pci_dev *pdev)
702 struct drm_device *dev = pci_get_drvdata(pdev);
703 struct nouveau_drm *drm = nouveau_drm(dev);
704 struct pci_dev *bridge = pci_upstream_bridge(pdev);
706 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
709 switch (bridge->device) {
711 drm->old_pm_cap = pdev->pm_cap;
713 NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
718 static int nouveau_drm_probe(struct pci_dev *pdev,
719 const struct pci_device_id *pent)
721 struct nvkm_device *device;
722 struct drm_device *drm_dev;
725 if (vga_switcheroo_client_probe_defer(pdev))
726 return -EPROBE_DEFER;
728 /* We need to check that the chipset is supported before booting
729 * fbdev off the hardware, as there's no way to put it back.
731 ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
732 true, false, 0, &device);
736 nvkm_device_del(&device);
738 /* Remove conflicting drivers (vesafb, efifb etc). */
739 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "nouveaufb");
743 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
744 true, true, ~0ULL, &device);
748 pci_set_master(pdev);
751 driver_pci.driver_features |= DRIVER_ATOMIC;
753 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
754 if (IS_ERR(drm_dev)) {
755 ret = PTR_ERR(drm_dev);
759 ret = pci_enable_device(pdev);
763 drm_dev->pdev = pdev;
764 pci_set_drvdata(pdev, drm_dev);
766 ret = nouveau_drm_device_init(drm_dev);
770 ret = drm_dev_register(drm_dev, pent->driver_data);
772 goto fail_drm_dev_init;
774 quirk_broken_nv_runpm(pdev);
778 nouveau_drm_device_fini(drm_dev);
780 pci_disable_device(pdev);
782 drm_dev_put(drm_dev);
784 nvkm_device_del(&device);
789 nouveau_drm_device_remove(struct drm_device *dev)
791 struct nouveau_drm *drm = nouveau_drm(dev);
792 struct nvkm_client *client;
793 struct nvkm_device *device;
795 drm_dev_unregister(dev);
797 dev->irq_enabled = false;
798 client = nvxx_client(&drm->client.base);
799 device = nvkm_device_find(client->device);
801 nouveau_drm_device_fini(dev);
803 nvkm_device_del(&device);
807 nouveau_drm_remove(struct pci_dev *pdev)
809 struct drm_device *dev = pci_get_drvdata(pdev);
810 struct nouveau_drm *drm = nouveau_drm(dev);
812 /* revert our workaround */
814 pdev->pm_cap = drm->old_pm_cap;
815 nouveau_drm_device_remove(dev);
816 pci_disable_device(pdev);
820 nouveau_do_suspend(struct drm_device *dev, bool runtime)
822 struct nouveau_drm *drm = nouveau_drm(dev);
825 nouveau_svm_suspend(drm);
826 nouveau_dmem_suspend(drm);
827 nouveau_led_suspend(dev);
829 if (dev->mode_config.num_crtc) {
830 NV_DEBUG(drm, "suspending console...\n");
831 nouveau_fbcon_set_suspend(dev, 1);
832 NV_DEBUG(drm, "suspending display...\n");
833 ret = nouveau_display_suspend(dev, runtime);
838 NV_DEBUG(drm, "evicting buffers...\n");
839 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
841 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
843 ret = nouveau_channel_idle(drm->cechan);
849 ret = nouveau_channel_idle(drm->channel);
854 NV_DEBUG(drm, "suspending fence...\n");
855 if (drm->fence && nouveau_fence(drm)->suspend) {
856 if (!nouveau_fence(drm)->suspend(drm)) {
862 NV_DEBUG(drm, "suspending object tree...\n");
863 ret = nvif_client_suspend(&drm->master.base);
870 if (drm->fence && nouveau_fence(drm)->resume)
871 nouveau_fence(drm)->resume(drm);
874 if (dev->mode_config.num_crtc) {
875 NV_DEBUG(drm, "resuming display...\n");
876 nouveau_display_resume(dev, runtime);
882 nouveau_do_resume(struct drm_device *dev, bool runtime)
885 struct nouveau_drm *drm = nouveau_drm(dev);
887 NV_DEBUG(drm, "resuming object tree...\n");
888 ret = nvif_client_resume(&drm->master.base);
890 NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
894 NV_DEBUG(drm, "resuming fence...\n");
895 if (drm->fence && nouveau_fence(drm)->resume)
896 nouveau_fence(drm)->resume(drm);
898 nouveau_run_vbios_init(dev);
900 if (dev->mode_config.num_crtc) {
901 NV_DEBUG(drm, "resuming display...\n");
902 nouveau_display_resume(dev, runtime);
903 NV_DEBUG(drm, "resuming console...\n");
904 nouveau_fbcon_set_suspend(dev, 0);
907 nouveau_led_resume(dev);
908 nouveau_dmem_resume(drm);
909 nouveau_svm_resume(drm);
914 nouveau_pmops_suspend(struct device *dev)
916 struct pci_dev *pdev = to_pci_dev(dev);
917 struct drm_device *drm_dev = pci_get_drvdata(pdev);
920 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
921 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
924 ret = nouveau_do_suspend(drm_dev, false);
928 pci_save_state(pdev);
929 pci_disable_device(pdev);
930 pci_set_power_state(pdev, PCI_D3hot);
936 nouveau_pmops_resume(struct device *dev)
938 struct pci_dev *pdev = to_pci_dev(dev);
939 struct drm_device *drm_dev = pci_get_drvdata(pdev);
942 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
943 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
946 pci_set_power_state(pdev, PCI_D0);
947 pci_restore_state(pdev);
948 ret = pci_enable_device(pdev);
951 pci_set_master(pdev);
953 ret = nouveau_do_resume(drm_dev, false);
955 /* Monitors may have been connected / disconnected during suspend */
956 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
962 nouveau_pmops_freeze(struct device *dev)
964 struct pci_dev *pdev = to_pci_dev(dev);
965 struct drm_device *drm_dev = pci_get_drvdata(pdev);
966 return nouveau_do_suspend(drm_dev, false);
970 nouveau_pmops_thaw(struct device *dev)
972 struct pci_dev *pdev = to_pci_dev(dev);
973 struct drm_device *drm_dev = pci_get_drvdata(pdev);
974 return nouveau_do_resume(drm_dev, false);
978 nouveau_pmops_runtime(void)
980 if (nouveau_runtime_pm == -1)
981 return nouveau_is_optimus() || nouveau_is_v1_dsm();
982 return nouveau_runtime_pm == 1;
986 nouveau_pmops_runtime_suspend(struct device *dev)
988 struct pci_dev *pdev = to_pci_dev(dev);
989 struct drm_device *drm_dev = pci_get_drvdata(pdev);
992 if (!nouveau_pmops_runtime()) {
993 pm_runtime_forbid(dev);
997 nouveau_switcheroo_optimus_dsm();
998 ret = nouveau_do_suspend(drm_dev, true);
999 pci_save_state(pdev);
1000 pci_disable_device(pdev);
1001 pci_ignore_hotplug(pdev);
1002 pci_set_power_state(pdev, PCI_D3cold);
1003 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1008 nouveau_pmops_runtime_resume(struct device *dev)
1010 struct pci_dev *pdev = to_pci_dev(dev);
1011 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1012 struct nouveau_drm *drm = nouveau_drm(drm_dev);
1013 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1016 if (!nouveau_pmops_runtime()) {
1017 pm_runtime_forbid(dev);
1021 pci_set_power_state(pdev, PCI_D0);
1022 pci_restore_state(pdev);
1023 ret = pci_enable_device(pdev);
1026 pci_set_master(pdev);
1028 ret = nouveau_do_resume(drm_dev, true);
1030 NV_ERROR(drm, "resume failed with: %d\n", ret);
1035 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1036 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1038 /* Monitors may have been connected / disconnected during suspend */
1039 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
1045 nouveau_pmops_runtime_idle(struct device *dev)
1047 if (!nouveau_pmops_runtime()) {
1048 pm_runtime_forbid(dev);
1052 pm_runtime_mark_last_busy(dev);
1053 pm_runtime_autosuspend(dev);
1054 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1059 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1061 struct nouveau_drm *drm = nouveau_drm(dev);
1062 struct nouveau_cli *cli;
1063 char name[32], tmpname[TASK_COMM_LEN];
1066 /* need to bring up power immediately if opening device */
1067 ret = pm_runtime_get_sync(dev->dev);
1068 if (ret < 0 && ret != -EACCES) {
1069 pm_runtime_put_autosuspend(dev->dev);
1073 get_task_comm(tmpname, current);
1074 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1076 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1081 ret = nouveau_cli_init(drm, name, cli);
1085 cli->base.super = false;
1087 fpriv->driver_priv = cli;
1089 mutex_lock(&drm->client.mutex);
1090 list_add(&cli->head, &drm->clients);
1091 mutex_unlock(&drm->client.mutex);
1095 nouveau_cli_fini(cli);
1099 pm_runtime_mark_last_busy(dev->dev);
1100 pm_runtime_put_autosuspend(dev->dev);
1105 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1107 struct nouveau_cli *cli = nouveau_cli(fpriv);
1108 struct nouveau_drm *drm = nouveau_drm(dev);
1110 pm_runtime_get_sync(dev->dev);
1112 mutex_lock(&cli->mutex);
1114 nouveau_abi16_fini(cli->abi16);
1115 mutex_unlock(&cli->mutex);
1117 mutex_lock(&drm->client.mutex);
1118 list_del(&cli->head);
1119 mutex_unlock(&drm->client.mutex);
1121 nouveau_cli_fini(cli);
1123 pm_runtime_mark_last_busy(dev->dev);
1124 pm_runtime_put_autosuspend(dev->dev);
1127 static const struct drm_ioctl_desc
1128 nouveau_ioctls[] = {
1129 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1130 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1131 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1132 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1133 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1134 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1135 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1136 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1137 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1138 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1139 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1140 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1141 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1142 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1146 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1148 struct drm_file *filp = file->private_data;
1149 struct drm_device *dev = filp->minor->dev;
1152 ret = pm_runtime_get_sync(dev->dev);
1153 if (ret < 0 && ret != -EACCES) {
1154 pm_runtime_put_autosuspend(dev->dev);
1158 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1159 case DRM_NOUVEAU_NVIF:
1160 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1163 ret = drm_ioctl(file, cmd, arg);
1167 pm_runtime_mark_last_busy(dev->dev);
1168 pm_runtime_put_autosuspend(dev->dev);
1172 static const struct file_operations
1173 nouveau_driver_fops = {
1174 .owner = THIS_MODULE,
1176 .release = drm_release,
1177 .unlocked_ioctl = nouveau_drm_ioctl,
1178 .mmap = nouveau_ttm_mmap,
1181 #if defined(CONFIG_COMPAT)
1182 .compat_ioctl = nouveau_compat_ioctl,
1184 .llseek = noop_llseek,
1187 static struct drm_driver
1190 DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1191 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1192 | DRIVER_KMS_LEGACY_CONTEXT
1196 .open = nouveau_drm_open,
1197 .postclose = nouveau_drm_postclose,
1198 .lastclose = nouveau_vga_lastclose,
1200 #if defined(CONFIG_DEBUG_FS)
1201 .debugfs_init = nouveau_drm_debugfs_init,
1204 .ioctls = nouveau_ioctls,
1205 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1206 .fops = &nouveau_driver_fops,
1208 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1209 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1210 .gem_prime_pin = nouveau_gem_prime_pin,
1211 .gem_prime_unpin = nouveau_gem_prime_unpin,
1212 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1213 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1214 .gem_prime_vmap = nouveau_gem_prime_vmap,
1215 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
1217 .gem_free_object_unlocked = nouveau_gem_object_del,
1218 .gem_open_object = nouveau_gem_object_open,
1219 .gem_close_object = nouveau_gem_object_close,
1221 .dumb_create = nouveau_display_dumb_create,
1222 .dumb_map_offset = nouveau_display_dumb_map_offset,
1224 .name = DRIVER_NAME,
1225 .desc = DRIVER_DESC,
1227 .date = GIT_REVISION,
1229 .date = DRIVER_DATE,
1231 .major = DRIVER_MAJOR,
1232 .minor = DRIVER_MINOR,
1233 .patchlevel = DRIVER_PATCHLEVEL,
1236 static struct pci_device_id
1237 nouveau_drm_pci_table[] = {
1239 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1240 .class = PCI_BASE_CLASS_DISPLAY << 16,
1241 .class_mask = 0xff << 16,
1244 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1245 .class = PCI_BASE_CLASS_DISPLAY << 16,
1246 .class_mask = 0xff << 16,
1251 static void nouveau_display_options(void)
1253 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1255 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1256 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1257 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1258 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1259 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1260 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1261 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1262 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1263 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1264 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1265 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1268 static const struct dev_pm_ops nouveau_pm_ops = {
1269 .suspend = nouveau_pmops_suspend,
1270 .resume = nouveau_pmops_resume,
1271 .freeze = nouveau_pmops_freeze,
1272 .thaw = nouveau_pmops_thaw,
1273 .poweroff = nouveau_pmops_freeze,
1274 .restore = nouveau_pmops_resume,
1275 .runtime_suspend = nouveau_pmops_runtime_suspend,
1276 .runtime_resume = nouveau_pmops_runtime_resume,
1277 .runtime_idle = nouveau_pmops_runtime_idle,
1280 static struct pci_driver
1281 nouveau_drm_pci_driver = {
1283 .id_table = nouveau_drm_pci_table,
1284 .probe = nouveau_drm_probe,
1285 .remove = nouveau_drm_remove,
1286 .driver.pm = &nouveau_pm_ops,
1290 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1291 struct platform_device *pdev,
1292 struct nvkm_device **pdevice)
1294 struct drm_device *drm;
1297 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1298 true, true, ~0ULL, pdevice);
1302 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1308 err = nouveau_drm_device_init(drm);
1312 platform_set_drvdata(pdev, drm);
1319 nvkm_device_del(pdevice);
1321 return ERR_PTR(err);
1325 nouveau_drm_init(void)
1327 driver_pci = driver_stub;
1328 driver_platform = driver_stub;
1330 nouveau_display_options();
1332 if (nouveau_modeset == -1) {
1333 if (vgacon_text_force())
1334 nouveau_modeset = 0;
1337 if (!nouveau_modeset)
1340 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1341 platform_driver_register(&nouveau_platform_driver);
1344 nouveau_register_dsm_handler();
1345 nouveau_backlight_ctor();
1348 return pci_register_driver(&nouveau_drm_pci_driver);
1355 nouveau_drm_exit(void)
1357 if (!nouveau_modeset)
1361 pci_unregister_driver(&nouveau_drm_pci_driver);
1363 nouveau_backlight_dtor();
1364 nouveau_unregister_dsm_handler();
1366 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1367 platform_driver_unregister(&nouveau_platform_driver);
1369 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1370 mmu_notifier_synchronize();
1373 module_init(nouveau_drm_init);
1374 module_exit(nouveau_drm_exit);
1376 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1377 MODULE_AUTHOR(DRIVER_AUTHOR);
1378 MODULE_DESCRIPTION(DRIVER_DESC);
1379 MODULE_LICENSE("GPL and additional rights");