drivers/gpu/drm/nouveau/nouveau_bo5039.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29 #include "nouveau_bo.h"
  30 #include "nouveau_dma.h"
  31 #include "nouveau_drv.h"
  32 #include "nouveau_mem.h"
  33
  34 #include <nvif/push206e.h>
  35
  36 int
  37 nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
  38                   struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
  39 {
  40         struct nouveau_mem *mem = nouveau_mem(old_reg);
  41         struct nvif_push *push = chan->chan.push;
  42         u64 length = (new_reg->num_pages << PAGE_SHIFT);
  43         u64 src_offset = mem->vma[0].addr;
  44         u64 dst_offset = mem->vma[1].addr;
  45         int src_tiled = !!mem->kind;
  46         int dst_tiled = !!nouveau_mem(new_reg)->kind;
  47         int ret;
  48
  49         while (length) {
  50                 u32 amount, stride, height;
  51
  52                 ret = PUSH_WAIT(push, 18 + 6 * (src_tiled + dst_tiled));
  53                 if (ret)
  54                         return ret;
  55
  56                 amount  = min(length, (u64)(4 * 1024 * 1024));
  57                 stride  = 16 * 4;
  58                 height  = amount / stride;
  59
  60                 if (src_tiled) {
  61                         PUSH_NVSQ(push, NV5039, 0x0200, 0,
  62                                                 0x0204, 0,
  63                                                 0x0208, stride,
  64                                                 0x020c, height,
  65                                                 0x0210, 1,
  66                                                 0x0214, 0,
  67                                                 0x0218, 0);
  68                 } else {
  69                         PUSH_NVSQ(push, NV5039, 0x0200, 1);
  70                 }
  71
  72                 if (dst_tiled) {
  73                         PUSH_NVSQ(push, NV5039, 0x021c, 0,
  74                                                 0x0220, 0,
  75                                                 0x0224, stride,
  76                                                 0x0228, height,
  77                                                 0x022c, 1,
  78                                                 0x0230, 0,
  79                                                 0x0234, 0);
  80                 } else {
  81                         PUSH_NVSQ(push, NV5039, 0x021c, 1);
  82                 }
  83
  84                 PUSH_NVSQ(push, NV5039, 0x0238, upper_32_bits(src_offset),
  85                                         0x023c, upper_32_bits(dst_offset));
  86                 PUSH_NVSQ(push, NV5039, 0x030c, lower_32_bits(src_offset),
  87                                         0x0310, lower_32_bits(dst_offset),
  88                                         0x0314, stride,
  89                                         0x0318, stride,
  90                                         0x031c, stride,
  91                                         0x0320, height,
  92                                         0x0324, 0x00000101,
  93                                         0x0328, 0x00000000);
  94                 PUSH_NVSQ(push, NV5039, 0x0100, 0x00000000);
  95
  96                 length -= amount;
  97                 src_offset += amount;
  98                 dst_offset += amount;
  99         }
 100
 101         return 0;
 102 }
 103
 104 int
 105 nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
 106 {
 107         struct nvif_push *push = chan->chan.push;
 108         int ret;
 109
 110         ret = PUSH_WAIT(push, 6);
 111         if (ret)
 112                 return ret;
 113
 114         PUSH_NVSQ(push, NV5039, 0x0000, handle);
 115         PUSH_NVSQ(push, NV5039, 0x0180, chan->drm->ntfy.handle,
 116                                 0x0184, chan->vram.handle,
 117                                 0x0188, chan->vram.handle);
 118         return 0;
 119 }