drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31 #include <linux/swiotlb.h>
  32
  33 #include "nouveau_drv.h"
  34 #include "nouveau_chan.h"
  35 #include "nouveau_fence.h"
  36
  37 #include "nouveau_bo.h"
  38 #include "nouveau_ttm.h"
  39 #include "nouveau_gem.h"
  40 #include "nouveau_mem.h"
  41 #include "nouveau_vmm.h"
  42
  43 #include <nvif/class.h>
  44 #include <nvif/if500b.h>
  45 #include <nvif/if900b.h>
  46
  47 static int nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
  48                                struct ttm_resource *reg);
  49 static void nouveau_ttm_tt_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm);
  50
  51 /*
  52  * NV10-NV40 tiling helpers
  53  */
  54
  55 static void
  56 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  57                            u32 addr, u32 size, u32 pitch, u32 flags)
  58 {
  59         struct nouveau_drm *drm = nouveau_drm(dev);
  60         int i = reg - drm->tile.reg;
  61         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  62         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  63
  64         nouveau_fence_unref(&reg->fence);
  65
  66         if (tile->pitch)
  67                 nvkm_fb_tile_fini(fb, i, tile);
  68
  69         if (pitch)
  70                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  71
  72         nvkm_fb_tile_prog(fb, i, tile);
  73 }
  74
  75 static struct nouveau_drm_tile *
  76 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  77 {
  78         struct nouveau_drm *drm = nouveau_drm(dev);
  79         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  80
  81         spin_lock(&drm->tile.lock);
  82
  83         if (!tile->used &&
  84             (!tile->fence || nouveau_fence_done(tile->fence)))
  85                 tile->used = true;
  86         else
  87                 tile = NULL;
  88
  89         spin_unlock(&drm->tile.lock);
  90         return tile;
  91 }
  92
  93 static void
  94 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  95                         struct dma_fence *fence)
  96 {
  97         struct nouveau_drm *drm = nouveau_drm(dev);
  98
  99         if (tile) {
 100                 spin_lock(&drm->tile.lock);
 101                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
 102                 tile->used = false;
 103                 spin_unlock(&drm->tile.lock);
 104         }
 105 }
 106
 107 static struct nouveau_drm_tile *
 108 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 109                    u32 size, u32 pitch, u32 zeta)
 110 {
 111         struct nouveau_drm *drm = nouveau_drm(dev);
 112         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 113         struct nouveau_drm_tile *tile, *found = NULL;
 114         int i;
 115
 116         for (i = 0; i < fb->tile.regions; i++) {
 117                 tile = nv10_bo_get_tile_region(dev, i);
 118
 119                 if (pitch && !found) {
 120                         found = tile;
 121                         continue;
 122
 123                 } else if (tile && fb->tile.region[i].pitch) {
 124                         /* Kill an unused tile region. */
 125                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 126                 }
 127
 128                 nv10_bo_put_tile_region(dev, tile, NULL);
 129         }
 130
 131         if (found)
 132                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 133         return found;
 134 }
 135
 136 static void
 137 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 138 {
 139         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 140         struct drm_device *dev = drm->dev;
 141         struct nouveau_bo *nvbo = nouveau_bo(bo);
 142
 143         WARN_ON(nvbo->bo.pin_count > 0);
 144         nouveau_bo_del_io_reserve_lru(bo);
 145         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 146
 147         /*
 148          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 149          * initialized, so don't attempt to release it.
 150          */
 151         if (bo->base.dev)
 152                 drm_gem_object_release(&bo->base);
 153
 154         kfree(nvbo);
 155 }
 156
 157 static inline u64
 158 roundup_64(u64 x, u32 y)
 159 {
 160         x += y - 1;
 161         do_div(x, y);
 162         return x * y;
 163 }
 164
 165 static void
 166 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, u64 *size)
 167 {
 168         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 169         struct nvif_device *device = &drm->client.device;
 170
 171         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 172                 if (nvbo->mode) {
 173                         if (device->info.chipset >= 0x40) {
 174                                 *align = 65536;
 175                                 *size = roundup_64(*size, 64 * nvbo->mode);
 176
 177                         } else if (device->info.chipset >= 0x30) {
 178                                 *align = 32768;
 179                                 *size = roundup_64(*size, 64 * nvbo->mode);
 180
 181                         } else if (device->info.chipset >= 0x20) {
 182                                 *align = 16384;
 183                                 *size = roundup_64(*size, 64 * nvbo->mode);
 184
 185                         } else if (device->info.chipset >= 0x10) {
 186                                 *align = 16384;
 187                                 *size = roundup_64(*size, 32 * nvbo->mode);
 188                         }
 189                 }
 190         } else {
 191                 *size = roundup_64(*size, (1 << nvbo->page));
 192                 *align = max((1 <<  nvbo->page), *align);
 193         }
 194
 195         *size = roundup_64(*size, PAGE_SIZE);
 196 }
 197
 198 struct nouveau_bo *
 199 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain,
 200                  u32 tile_mode, u32 tile_flags)
 201 {
 202         struct nouveau_drm *drm = cli->drm;
 203         struct nouveau_bo *nvbo;
 204         struct nvif_mmu *mmu = &cli->mmu;
 205         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 206         int i, pi = -1;
 207
 208         if (!*size) {
 209                 NV_WARN(drm, "skipped size %016llx\n", *size);
 210                 return ERR_PTR(-EINVAL);
 211         }
 212
 213         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 214         if (!nvbo)
 215                 return ERR_PTR(-ENOMEM);
 216         INIT_LIST_HEAD(&nvbo->head);
 217         INIT_LIST_HEAD(&nvbo->entry);
 218         INIT_LIST_HEAD(&nvbo->vma_list);
 219         nvbo->bo.bdev = &drm->ttm.bdev;
 220
 221         /* This is confusing, and doesn't actually mean we want an uncached
 222          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 223          * into in nouveau_gem_new().
 224          */
 225         if (domain & NOUVEAU_GEM_DOMAIN_COHERENT) {
 226                 /* Determine if we can get a cache-coherent map, forcing
 227                  * uncached mapping if we can't.
 228                  */
 229                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 230                         nvbo->force_coherent = true;
 231         }
 232
 233         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 234                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 235                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 236                         kfree(nvbo);
 237                         return ERR_PTR(-EINVAL);
 238                 }
 239
 240                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 241         } else
 242         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 243                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 244                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 245                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 246                         kfree(nvbo);
 247                         return ERR_PTR(-EINVAL);
 248                 }
 249         } else {
 250                 nvbo->zeta = (tile_flags & 0x00000007);
 251         }
 252         nvbo->mode = tile_mode;
 253         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 254
 255         /* Determine the desirable target GPU page size for the buffer. */
 256         for (i = 0; i < vmm->page_nr; i++) {
 257                 /* Because we cannot currently allow VMM maps to fail
 258                  * during buffer migration, we need to determine page
 259                  * size for the buffer up-front, and pre-allocate its
 260                  * page tables.
 261                  *
 262                  * Skip page sizes that can't support needed domains.
 263                  */
 264                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 265                     (domain & NOUVEAU_GEM_DOMAIN_VRAM) && !vmm->page[i].vram)
 266                         continue;
 267                 if ((domain & NOUVEAU_GEM_DOMAIN_GART) &&
 268                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 269                         continue;
 270
 271                 /* Select this page size if it's the first that supports
 272                  * the potential memory domains, or when it's compatible
 273                  * with the requested compression settings.
 274                  */
 275                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 276                         pi = i;
 277
 278                 /* Stop once the buffer is larger than the current page size. */
 279                 if (*size >= 1ULL << vmm->page[i].shift)
 280                         break;
 281         }
 282
 283         if (WARN_ON(pi < 0))
 284                 return ERR_PTR(-EINVAL);
 285
 286         /* Disable compression if suitable settings couldn't be found. */
 287         if (nvbo->comp && !vmm->page[pi].comp) {
 288                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 289                         nvbo->kind = mmu->kind[nvbo->kind];
 290                 nvbo->comp = 0;
 291         }
 292         nvbo->page = vmm->page[pi].shift;
 293
 294         nouveau_bo_fixup_align(nvbo, align, size);
 295
 296         return nvbo;
 297 }
 298
 299 int
 300 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 domain,
 301                 struct sg_table *sg, struct dma_resv *robj)
 302 {
 303         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 304         size_t acc_size;
 305         int ret;
 306
 307         acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo));
 308
 309         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 310         nouveau_bo_placement_set(nvbo, domain, 0);
 311         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 312
 313         ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type,
 314                           &nvbo->placement, align >> PAGE_SHIFT, false,
 315                           acc_size, sg, robj, nouveau_bo_del_ttm);
 316         if (ret) {
 317                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 318                 return ret;
 319         }
 320
 321         return 0;
 322 }
 323
 324 int
 325 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 326                uint32_t domain, uint32_t tile_mode, uint32_t tile_flags,
 327                struct sg_table *sg, struct dma_resv *robj,
 328                struct nouveau_bo **pnvbo)
 329 {
 330         struct nouveau_bo *nvbo;
 331         int ret;
 332
 333         nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode,
 334                                 tile_flags);
 335         if (IS_ERR(nvbo))
 336                 return PTR_ERR(nvbo);
 337
 338         ret = nouveau_bo_init(nvbo, size, align, domain, sg, robj);
 339         if (ret)
 340                 return ret;
 341
 342         *pnvbo = nvbo;
 343         return 0;
 344 }
 345
 346 static void
 347 set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain)
 348 {
 349         *n = 0;
 350
 351         if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
 352                 pl[*n].mem_type = TTM_PL_VRAM;
 353                 pl[*n].flags = 0;
 354                 (*n)++;
 355         }
 356         if (domain & NOUVEAU_GEM_DOMAIN_GART) {
 357                 pl[*n].mem_type = TTM_PL_TT;
 358                 pl[*n].flags = 0;
 359                 (*n)++;
 360         }
 361         if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
 362                 pl[*n].mem_type = TTM_PL_SYSTEM;
 363                 pl[(*n)++].flags = 0;
 364         }
 365 }
 366
 367 static void
 368 set_placement_range(struct nouveau_bo *nvbo, uint32_t domain)
 369 {
 370         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 371         u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
 372         unsigned i, fpfn, lpfn;
 373
 374         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 375             nvbo->mode && (domain & NOUVEAU_GEM_DOMAIN_VRAM) &&
 376             nvbo->bo.mem.num_pages < vram_pages / 4) {
 377                 /*
 378                  * Make sure that the color and depth buffers are handled
 379                  * by independent memory controller units. Up to a 9x
 380                  * speed up when alpha-blending and depth-test are enabled
 381                  * at the same time.
 382                  */
 383                 if (nvbo->zeta) {
 384                         fpfn = vram_pages / 2;
 385                         lpfn = ~0;
 386                 } else {
 387                         fpfn = 0;
 388                         lpfn = vram_pages / 2;
 389                 }
 390                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 391                         nvbo->placements[i].fpfn = fpfn;
 392                         nvbo->placements[i].lpfn = lpfn;
 393                 }
 394                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 395                         nvbo->busy_placements[i].fpfn = fpfn;
 396                         nvbo->busy_placements[i].lpfn = lpfn;
 397                 }
 398         }
 399 }
 400
 401 void
 402 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
 403                          uint32_t busy)
 404 {
 405         struct ttm_placement *pl = &nvbo->placement;
 406
 407         pl->placement = nvbo->placements;
 408         set_placement_list(nvbo->placements, &pl->num_placement, domain);
 409
 410         pl->busy_placement = nvbo->busy_placements;
 411         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 412                            domain | busy);
 413
 414         set_placement_range(nvbo, domain);
 415 }
 416
 417 int
 418 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig)
 419 {
 420         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 421         struct ttm_buffer_object *bo = &nvbo->bo;
 422         bool force = false, evict = false;
 423         int ret;
 424
 425         ret = ttm_bo_reserve(bo, false, false, NULL);
 426         if (ret)
 427                 return ret;
 428
 429         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 430             domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) {
 431                 if (!nvbo->contig) {
 432                         nvbo->contig = true;
 433                         force = true;
 434                         evict = true;
 435                 }
 436         }
 437
 438         if (nvbo->bo.pin_count) {
 439                 bool error = evict;
 440
 441                 switch (bo->mem.mem_type) {
 442                 case TTM_PL_VRAM:
 443                         error |= !(domain & NOUVEAU_GEM_DOMAIN_VRAM);
 444                         break;
 445                 case TTM_PL_TT:
 446                         error |= !(domain & NOUVEAU_GEM_DOMAIN_GART);
 447                 default:
 448                         break;
 449                 }
 450
 451                 if (error) {
 452                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 453                                       "0x%08x vs 0x%08x\n", bo,
 454                                  bo->mem.mem_type, domain);
 455                         ret = -EBUSY;
 456                 }
 457                 ttm_bo_pin(&nvbo->bo);
 458                 goto out;
 459         }
 460
 461         if (evict) {
 462                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 463                 ret = nouveau_bo_validate(nvbo, false, false);
 464                 if (ret)
 465                         goto out;
 466         }
 467
 468         nouveau_bo_placement_set(nvbo, domain, 0);
 469         ret = nouveau_bo_validate(nvbo, false, false);
 470         if (ret)
 471                 goto out;
 472
 473         ttm_bo_pin(&nvbo->bo);
 474
 475         switch (bo->mem.mem_type) {
 476         case TTM_PL_VRAM:
 477                 drm->gem.vram_available -= bo->mem.size;
 478                 break;
 479         case TTM_PL_TT:
 480                 drm->gem.gart_available -= bo->mem.size;
 481                 break;
 482         default:
 483                 break;
 484         }
 485
 486 out:
 487         if (force && ret)
 488                 nvbo->contig = false;
 489         ttm_bo_unreserve(bo);
 490         return ret;
 491 }
 492
 493 int
 494 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 495 {
 496         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 497         struct ttm_buffer_object *bo = &nvbo->bo;
 498         int ret;
 499
 500         ret = ttm_bo_reserve(bo, false, false, NULL);
 501         if (ret)
 502                 return ret;
 503
 504         ttm_bo_unpin(&nvbo->bo);
 505         if (!nvbo->bo.pin_count) {
 506                 switch (bo->mem.mem_type) {
 507                 case TTM_PL_VRAM:
 508                         drm->gem.vram_available += bo->mem.size;
 509                         break;
 510                 case TTM_PL_TT:
 511                         drm->gem.gart_available += bo->mem.size;
 512                         break;
 513                 default:
 514                         break;
 515                 }
 516         }
 517
 518         ttm_bo_unreserve(bo);
 519         return 0;
 520 }
 521
 522 int
 523 nouveau_bo_map(struct nouveau_bo *nvbo)
 524 {
 525         int ret;
 526
 527         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 528         if (ret)
 529                 return ret;
 530
 531         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 532
 533         ttm_bo_unreserve(&nvbo->bo);
 534         return ret;
 535 }
 536
 537 void
 538 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 539 {
 540         if (!nvbo)
 541                 return;
 542
 543         ttm_bo_kunmap(&nvbo->kmap);
 544 }
 545
 546 void
 547 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 548 {
 549         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 550         struct ttm_tt *ttm_dma = (struct ttm_tt *)nvbo->bo.ttm;
 551         int i;
 552
 553         if (!ttm_dma)
 554                 return;
 555
 556         /* Don't waste time looping if the object is coherent */
 557         if (nvbo->force_coherent)
 558                 return;
 559
 560         for (i = 0; i < ttm_dma->num_pages; i++)
 561                 dma_sync_single_for_device(drm->dev->dev,
 562                                            ttm_dma->dma_address[i],
 563                                            PAGE_SIZE, DMA_TO_DEVICE);
 564 }
 565
 566 void
 567 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 568 {
 569         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 570         struct ttm_tt *ttm_dma = (struct ttm_tt *)nvbo->bo.ttm;
 571         int i;
 572
 573         if (!ttm_dma)
 574                 return;
 575
 576         /* Don't waste time looping if the object is coherent */
 577         if (nvbo->force_coherent)
 578                 return;
 579
 580         for (i = 0; i < ttm_dma->num_pages; i++)
 581                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 582                                         PAGE_SIZE, DMA_FROM_DEVICE);
 583 }
 584
 585 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 586 {
 587         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 588         struct nouveau_bo *nvbo = nouveau_bo(bo);
 589
 590         mutex_lock(&drm->ttm.io_reserve_mutex);
 591         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 592         mutex_unlock(&drm->ttm.io_reserve_mutex);
 593 }
 594
 595 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 596 {
 597         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 598         struct nouveau_bo *nvbo = nouveau_bo(bo);
 599
 600         mutex_lock(&drm->ttm.io_reserve_mutex);
 601         list_del_init(&nvbo->io_reserve_lru);
 602         mutex_unlock(&drm->ttm.io_reserve_mutex);
 603 }
 604
 605 int
 606 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 607                     bool no_wait_gpu)
 608 {
 609         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 610         int ret;
 611
 612         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 613         if (ret)
 614                 return ret;
 615
 616         nouveau_bo_sync_for_device(nvbo);
 617
 618         return 0;
 619 }
 620
 621 void
 622 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 623 {
 624         bool is_iomem;
 625         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 626
 627         mem += index;
 628
 629         if (is_iomem)
 630                 iowrite16_native(val, (void __force __iomem *)mem);
 631         else
 632                 *mem = val;
 633 }
 634
 635 u32
 636 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 637 {
 638         bool is_iomem;
 639         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 640
 641         mem += index;
 642
 643         if (is_iomem)
 644                 return ioread32_native((void __force __iomem *)mem);
 645         else
 646                 return *mem;
 647 }
 648
 649 void
 650 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 651 {
 652         bool is_iomem;
 653         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 654
 655         mem += index;
 656
 657         if (is_iomem)
 658                 iowrite32_native(val, (void __force __iomem *)mem);
 659         else
 660                 *mem = val;
 661 }
 662
 663 static struct ttm_tt *
 664 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 665 {
 666 #if IS_ENABLED(CONFIG_AGP)
 667         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 668
 669         if (drm->agp.bridge) {
 670                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 671         }
 672 #endif
 673
 674         return nouveau_sgdma_create_ttm(bo, page_flags);
 675 }
 676
 677 static int
 678 nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
 679                     struct ttm_resource *reg)
 680 {
 681 #if IS_ENABLED(CONFIG_AGP)
 682         struct nouveau_drm *drm = nouveau_bdev(bdev);
 683 #endif
 684         if (!reg)
 685                 return -EINVAL;
 686 #if IS_ENABLED(CONFIG_AGP)
 687         if (drm->agp.bridge)
 688                 return ttm_agp_bind(ttm, reg);
 689 #endif
 690         return nouveau_sgdma_bind(bdev, ttm, reg);
 691 }
 692
 693 static void
 694 nouveau_ttm_tt_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 695 {
 696 #if IS_ENABLED(CONFIG_AGP)
 697         struct nouveau_drm *drm = nouveau_bdev(bdev);
 698
 699         if (drm->agp.bridge) {
 700                 ttm_agp_unbind(ttm);
 701                 return;
 702         }
 703 #endif
 704         nouveau_sgdma_unbind(bdev, ttm);
 705 }
 706
 707 static void
 708 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 709 {
 710         struct nouveau_bo *nvbo = nouveau_bo(bo);
 711
 712         switch (bo->mem.mem_type) {
 713         case TTM_PL_VRAM:
 714                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
 715                                          NOUVEAU_GEM_DOMAIN_CPU);
 716                 break;
 717         default:
 718                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_CPU, 0);
 719                 break;
 720         }
 721
 722         *pl = nvbo->placement;
 723 }
 724
 725 static int
 726 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 727                      struct ttm_resource *reg)
 728 {
 729         struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
 730         struct nouveau_mem *new_mem = nouveau_mem(reg);
 731         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 732         int ret;
 733
 734         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 735                            old_mem->mem.size, &old_mem->vma[0]);
 736         if (ret)
 737                 return ret;
 738
 739         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 740                            new_mem->mem.size, &old_mem->vma[1]);
 741         if (ret)
 742                 goto done;
 743
 744         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 745         if (ret)
 746                 goto done;
 747
 748         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 749 done:
 750         if (ret) {
 751                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 752                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 753         }
 754         return 0;
 755 }
 756
 757 static int
 758 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict,
 759                      struct ttm_operation_ctx *ctx,
 760                      struct ttm_resource *new_reg)
 761 {
 762         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 763         struct nouveau_channel *chan = drm->ttm.chan;
 764         struct nouveau_cli *cli = (void *)chan->user.client;
 765         struct nouveau_fence *fence;
 766         int ret;
 767
 768         /* create temporary vmas for the transfer and attach them to the
 769          * old nvkm_mem node, these will get cleaned up after ttm has
 770          * destroyed the ttm_resource
 771          */
 772         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 773                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 774                 if (ret)
 775                         return ret;
 776         }
 777
 778         mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 779         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, ctx->interruptible);
 780         if (ret == 0) {
 781                 ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
 782                 if (ret == 0) {
 783                         ret = nouveau_fence_new(chan, false, &fence);
 784                         if (ret == 0) {
 785                                 ret = ttm_bo_move_accel_cleanup(bo,
 786                                                                 &fence->base,
 787                                                                 evict, false,
 788                                                                 new_reg);
 789                                 nouveau_fence_unref(&fence);
 790                         }
 791                 }
 792         }
 793         mutex_unlock(&cli->mutex);
 794         return ret;
 795 }
 796
 797 void
 798 nouveau_bo_move_init(struct nouveau_drm *drm)
 799 {
 800         static const struct _method_table {
 801                 const char *name;
 802                 int engine;
 803                 s32 oclass;
 804                 int (*exec)(struct nouveau_channel *,
 805                             struct ttm_buffer_object *,
 806                             struct ttm_resource *, struct ttm_resource *);
 807                 int (*init)(struct nouveau_channel *, u32 handle);
 808         } _methods[] = {
 809                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 810                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 811                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 812                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 813                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 814                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 815                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 816                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 817                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 818                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 819                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 820                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 821                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 822                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 823                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 824                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 825                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 826                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 827                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 828                 {},
 829         };
 830         const struct _method_table *mthd = _methods;
 831         const char *name = "CPU";
 832         int ret;
 833
 834         do {
 835                 struct nouveau_channel *chan;
 836
 837                 if (mthd->engine)
 838                         chan = drm->cechan;
 839                 else
 840                         chan = drm->channel;
 841                 if (chan == NULL)
 842                         continue;
 843
 844                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 845                                        mthd->oclass | (mthd->engine << 16),
 846                                        mthd->oclass, NULL, 0,
 847                                        &drm->ttm.copy);
 848                 if (ret == 0) {
 849                         ret = mthd->init(chan, drm->ttm.copy.handle);
 850                         if (ret) {
 851                                 nvif_object_dtor(&drm->ttm.copy);
 852                                 continue;
 853                         }
 854
 855                         drm->ttm.move = mthd->exec;
 856                         drm->ttm.chan = chan;
 857                         name = mthd->name;
 858                         break;
 859                 }
 860         } while ((++mthd)->exec);
 861
 862         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 863 }
 864
 865 static int
 866 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict,
 867                       struct ttm_operation_ctx *ctx,
 868                       struct ttm_resource *new_reg)
 869 {
 870         struct ttm_place placement_memtype = {
 871                 .fpfn = 0,
 872                 .lpfn = 0,
 873                 .mem_type = TTM_PL_TT,
 874                 .flags = 0
 875         };
 876         struct ttm_placement placement;
 877         struct ttm_resource tmp_reg;
 878         int ret;
 879
 880         placement.num_placement = placement.num_busy_placement = 1;
 881         placement.placement = placement.busy_placement = &placement_memtype;
 882
 883         tmp_reg = *new_reg;
 884         tmp_reg.mm_node = NULL;
 885         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, ctx);
 886         if (ret)
 887                 return ret;
 888
 889         ret = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
 890         if (ret)
 891                 goto out;
 892
 893         ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_reg);
 894         if (ret)
 895                 goto out;
 896
 897         ret = nouveau_bo_move_m2mf(bo, true, ctx, &tmp_reg);
 898         if (ret)
 899                 goto out;
 900
 901         ret = ttm_bo_wait_ctx(bo, ctx);
 902         if (ret)
 903                 goto out;
 904
 905         nouveau_ttm_tt_unbind(bo->bdev, bo->ttm);
 906         ttm_resource_free(bo, &bo->mem);
 907         ttm_bo_assign_mem(bo, &tmp_reg);
 908 out:
 909         ttm_resource_free(bo, &tmp_reg);
 910         return ret;
 911 }
 912
 913 static int
 914 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict,
 915                       struct ttm_operation_ctx *ctx,
 916                       struct ttm_resource *new_reg)
 917 {
 918         struct ttm_place placement_memtype = {
 919                 .fpfn = 0,
 920                 .lpfn = 0,
 921                 .mem_type = TTM_PL_TT,
 922                 .flags = 0
 923         };
 924         struct ttm_placement placement;
 925         struct ttm_resource tmp_reg;
 926         int ret;
 927
 928         placement.num_placement = placement.num_busy_placement = 1;
 929         placement.placement = placement.busy_placement = &placement_memtype;
 930
 931         tmp_reg = *new_reg;
 932         tmp_reg.mm_node = NULL;
 933         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, ctx);
 934         if (ret)
 935                 return ret;
 936
 937         ret = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
 938         if (unlikely(ret != 0))
 939                 return ret;
 940
 941         ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_reg);
 942         if (unlikely(ret != 0))
 943                 return ret;
 944
 945         ttm_bo_assign_mem(bo, &tmp_reg);
 946         ret = nouveau_bo_move_m2mf(bo, true, ctx, new_reg);
 947         if (ret)
 948                 goto out;
 949
 950 out:
 951         ttm_resource_free(bo, &tmp_reg);
 952         return ret;
 953 }
 954
 955 static void
 956 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
 957                      struct ttm_resource *new_reg)
 958 {
 959         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 960         struct nouveau_bo *nvbo = nouveau_bo(bo);
 961         struct nouveau_vma *vma;
 962
 963         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 964         if (bo->destroy != nouveau_bo_del_ttm)
 965                 return;
 966
 967         nouveau_bo_del_io_reserve_lru(bo);
 968
 969         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 970             mem->mem.page == nvbo->page) {
 971                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 972                         nouveau_vma_map(vma, mem);
 973                 }
 974         } else {
 975                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 976                         WARN_ON(ttm_bo_wait(bo, false, false));
 977                         nouveau_vma_unmap(vma);
 978                 }
 979         }
 980
 981         if (new_reg) {
 982                 if (new_reg->mm_node)
 983                         nvbo->offset = (new_reg->start << PAGE_SHIFT);
 984                 else
 985                         nvbo->offset = 0;
 986         }
 987
 988 }
 989
 990 static int
 991 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
 992                    struct nouveau_drm_tile **new_tile)
 993 {
 994         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 995         struct drm_device *dev = drm->dev;
 996         struct nouveau_bo *nvbo = nouveau_bo(bo);
 997         u64 offset = new_reg->start << PAGE_SHIFT;
 998
 999         *new_tile = NULL;
1000         if (new_reg->mem_type != TTM_PL_VRAM)
1001                 return 0;
1002
1003         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
1004                 *new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size,
1005                                                nvbo->mode, nvbo->zeta);
1006         }
1007
1008         return 0;
1009 }
1010
1011 static void
1012 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
1013                       struct nouveau_drm_tile *new_tile,
1014                       struct nouveau_drm_tile **old_tile)
1015 {
1016         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1017         struct drm_device *dev = drm->dev;
1018         struct dma_fence *fence = dma_resv_get_excl(bo->base.resv);
1019
1020         nv10_bo_put_tile_region(dev, *old_tile, fence);
1021         *old_tile = new_tile;
1022 }
1023
1024 static int
1025 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
1026                 struct ttm_operation_ctx *ctx,
1027                 struct ttm_resource *new_reg)
1028 {
1029         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1030         struct nouveau_bo *nvbo = nouveau_bo(bo);
1031         struct ttm_resource *old_reg = &bo->mem;
1032         struct nouveau_drm_tile *new_tile = NULL;
1033         int ret = 0;
1034
1035         if (new_reg->mem_type == TTM_PL_TT) {
1036                 ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, new_reg);
1037                 if (ret)
1038                         return ret;
1039         }
1040
1041         nouveau_bo_move_ntfy(bo, evict, new_reg);
1042         ret = ttm_bo_wait_ctx(bo, ctx);
1043         if (ret)
1044                 goto out_ntfy;
1045
1046         if (nvbo->bo.pin_count)
1047                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
1048
1049         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1050                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1051                 if (ret)
1052                         goto out_ntfy;
1053         }
1054
1055         /* Fake bo copy. */
1056         if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
1057                 ttm_bo_move_null(bo, new_reg);
1058                 goto out;
1059         }
1060
1061         if (old_reg->mem_type == TTM_PL_SYSTEM &&
1062             new_reg->mem_type == TTM_PL_TT) {
1063                 ttm_bo_move_null(bo, new_reg);
1064                 goto out;
1065         }
1066
1067         if (old_reg->mem_type == TTM_PL_TT &&
1068             new_reg->mem_type == TTM_PL_SYSTEM) {
1069                 nouveau_ttm_tt_unbind(bo->bdev, bo->ttm);
1070                 ttm_resource_free(bo, &bo->mem);
1071                 ttm_bo_assign_mem(bo, new_reg);
1072                 goto out;
1073         }
1074
1075         /* Hardware assisted copy. */
1076         if (drm->ttm.move) {
1077                 if (new_reg->mem_type == TTM_PL_SYSTEM)
1078                         ret = nouveau_bo_move_flipd(bo, evict, ctx,
1079                                                     new_reg);
1080                 else if (old_reg->mem_type == TTM_PL_SYSTEM)
1081                         ret = nouveau_bo_move_flips(bo, evict, ctx,
1082                                                     new_reg);
1083                 else
1084                         ret = nouveau_bo_move_m2mf(bo, evict, ctx,
1085                                                    new_reg);
1086                 if (!ret)
1087                         goto out;
1088         }
1089
1090         /* Fallback to software copy. */
1091         ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1092
1093 out:
1094         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1095                 if (ret)
1096                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1097                 else
1098                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1099         }
1100 out_ntfy:
1101         if (ret) {
1102                 swap(*new_reg, bo->mem);
1103                 nouveau_bo_move_ntfy(bo, false, new_reg);
1104                 swap(*new_reg, bo->mem);
1105         }
1106         return ret;
1107 }
1108
1109 static int
1110 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
1111 {
1112         struct nouveau_bo *nvbo = nouveau_bo(bo);
1113
1114         return drm_vma_node_verify_access(&nvbo->bo.base.vma_node,
1115                                           filp->private_data);
1116 }
1117
1118 static void
1119 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1120                                struct ttm_resource *reg)
1121 {
1122         struct nouveau_mem *mem = nouveau_mem(reg);
1123
1124         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1125                 switch (reg->mem_type) {
1126                 case TTM_PL_TT:
1127                         if (mem->kind)
1128                                 nvif_object_unmap_handle(&mem->mem.object);
1129                         break;
1130                 case TTM_PL_VRAM:
1131                         nvif_object_unmap_handle(&mem->mem.object);
1132                         break;
1133                 default:
1134                         break;
1135                 }
1136         }
1137 }
1138
1139 static int
1140 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1141 {
1142         struct nouveau_drm *drm = nouveau_bdev(bdev);
1143         struct nvkm_device *device = nvxx_device(&drm->client.device);
1144         struct nouveau_mem *mem = nouveau_mem(reg);
1145         struct nvif_mmu *mmu = &drm->client.mmu;
1146         const u8 type = mmu->type[drm->ttm.type_vram].type;
1147         int ret;
1148
1149         mutex_lock(&drm->ttm.io_reserve_mutex);
1150 retry:
1151         switch (reg->mem_type) {
1152         case TTM_PL_SYSTEM:
1153                 /* System memory */
1154                 ret = 0;
1155                 goto out;
1156         case TTM_PL_TT:
1157 #if IS_ENABLED(CONFIG_AGP)
1158                 if (drm->agp.bridge) {
1159                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1160                                 drm->agp.base;
1161                         reg->bus.is_iomem = !drm->agp.cma;
1162                         reg->bus.caching = ttm_write_combined;
1163                 }
1164 #endif
1165                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1166                     !mem->kind) {
1167                         /* untiled */
1168                         ret = 0;
1169                         break;
1170                 }
1171                 fallthrough;    /* tiled memory */
1172         case TTM_PL_VRAM:
1173                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1174                         device->func->resource_addr(device, 1);
1175                 reg->bus.is_iomem = true;
1176
1177                 /* Some BARs do not support being ioremapped WC */
1178                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
1179                     type & NVIF_MEM_UNCACHED)
1180                         reg->bus.caching = ttm_uncached;
1181                 else
1182                         reg->bus.caching = ttm_write_combined;
1183
1184                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1185                         union {
1186                                 struct nv50_mem_map_v0 nv50;
1187                                 struct gf100_mem_map_v0 gf100;
1188                         } args;
1189                         u64 handle, length;
1190                         u32 argc = 0;
1191
1192                         switch (mem->mem.object.oclass) {
1193                         case NVIF_CLASS_MEM_NV50:
1194                                 args.nv50.version = 0;
1195                                 args.nv50.ro = 0;
1196                                 args.nv50.kind = mem->kind;
1197                                 args.nv50.comp = mem->comp;
1198                                 argc = sizeof(args.nv50);
1199                                 break;
1200                         case NVIF_CLASS_MEM_GF100:
1201                                 args.gf100.version = 0;
1202                                 args.gf100.ro = 0;
1203                                 args.gf100.kind = mem->kind;
1204                                 argc = sizeof(args.gf100);
1205                                 break;
1206                         default:
1207                                 WARN_ON(1);
1208                                 break;
1209                         }
1210
1211                         ret = nvif_object_map_handle(&mem->mem.object,
1212                                                      &args, argc,
1213                                                      &handle, &length);
1214                         if (ret != 1) {
1215                                 if (WARN_ON(ret == 0))
1216                                         ret = -EINVAL;
1217                                 goto out;
1218                         }
1219
1220                         reg->bus.offset = handle;
1221                         ret = 0;
1222                 }
1223                 break;
1224         default:
1225                 ret = -EINVAL;
1226         }
1227
1228 out:
1229         if (ret == -ENOSPC) {
1230                 struct nouveau_bo *nvbo;
1231
1232                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1233                                                 typeof(*nvbo),
1234                                                 io_reserve_lru);
1235                 if (nvbo) {
1236                         list_del_init(&nvbo->io_reserve_lru);
1237                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1238                                            bdev->dev_mapping);
1239                         nouveau_ttm_io_mem_free_locked(drm, &nvbo->bo.mem);
1240                         goto retry;
1241                 }
1242
1243         }
1244         mutex_unlock(&drm->ttm.io_reserve_mutex);
1245         return ret;
1246 }
1247
1248 static void
1249 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1250 {
1251         struct nouveau_drm *drm = nouveau_bdev(bdev);
1252
1253         mutex_lock(&drm->ttm.io_reserve_mutex);
1254         nouveau_ttm_io_mem_free_locked(drm, reg);
1255         mutex_unlock(&drm->ttm.io_reserve_mutex);
1256 }
1257
1258 vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1259 {
1260         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1261         struct nouveau_bo *nvbo = nouveau_bo(bo);
1262         struct nvkm_device *device = nvxx_device(&drm->client.device);
1263         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1264         int i, ret;
1265
1266         /* as long as the bo isn't in vram, and isn't tiled, we've got
1267          * nothing to do here.
1268          */
1269         if (bo->mem.mem_type != TTM_PL_VRAM) {
1270                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1271                     !nvbo->kind)
1272                         return 0;
1273
1274                 if (bo->mem.mem_type != TTM_PL_SYSTEM)
1275                         return 0;
1276
1277                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
1278
1279         } else {
1280                 /* make sure bo is in mappable vram */
1281                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1282                     bo->mem.start + bo->mem.num_pages < mappable)
1283                         return 0;
1284
1285                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
1286                         nvbo->placements[i].fpfn = 0;
1287                         nvbo->placements[i].lpfn = mappable;
1288                 }
1289
1290                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1291                         nvbo->busy_placements[i].fpfn = 0;
1292                         nvbo->busy_placements[i].lpfn = mappable;
1293                 }
1294
1295                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
1296         }
1297
1298         ret = nouveau_bo_validate(nvbo, false, false);
1299         if (unlikely(ret == -EBUSY || ret == -ERESTARTSYS))
1300                 return VM_FAULT_NOPAGE;
1301         else if (unlikely(ret))
1302                 return VM_FAULT_SIGBUS;
1303
1304         ttm_bo_move_to_lru_tail_unlocked(bo);
1305         return 0;
1306 }
1307
1308 static int
1309 nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
1310                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1311 {
1312         struct ttm_tt *ttm_dma = (void *)ttm;
1313         struct nouveau_drm *drm;
1314         struct device *dev;
1315         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1316
1317         if (ttm_tt_is_populated(ttm))
1318                 return 0;
1319
1320         if (slave && ttm->sg) {
1321                 /* make userspace faulting work */
1322                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
1323                                                  ttm_dma->dma_address, ttm->num_pages);
1324                 return 0;
1325         }
1326
1327         drm = nouveau_bdev(bdev);
1328         dev = drm->dev->dev;
1329
1330 #if IS_ENABLED(CONFIG_AGP)
1331         if (drm->agp.bridge) {
1332                 return ttm_pool_populate(ttm, ctx);
1333         }
1334 #endif
1335
1336 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1337         if (swiotlb_nr_tbl()) {
1338                 return ttm_dma_populate((void *)ttm, dev, ctx);
1339         }
1340 #endif
1341         return ttm_populate_and_map_pages(dev, ttm_dma, ctx);
1342 }
1343
1344 static void
1345 nouveau_ttm_tt_unpopulate(struct ttm_bo_device *bdev,
1346                           struct ttm_tt *ttm)
1347 {
1348         struct ttm_tt *ttm_dma = (void *)ttm;
1349         struct nouveau_drm *drm;
1350         struct device *dev;
1351         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1352
1353         if (slave)
1354                 return;
1355
1356         drm = nouveau_bdev(bdev);
1357         dev = drm->dev->dev;
1358
1359 #if IS_ENABLED(CONFIG_AGP)
1360         if (drm->agp.bridge) {
1361                 ttm_pool_unpopulate(ttm);
1362                 return;
1363         }
1364 #endif
1365
1366 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1367         if (swiotlb_nr_tbl()) {
1368                 ttm_dma_unpopulate((void *)ttm, dev);
1369                 return;
1370         }
1371 #endif
1372
1373         ttm_unmap_and_unpopulate_pages(dev, ttm_dma);
1374 }
1375
1376 static void
1377 nouveau_ttm_tt_destroy(struct ttm_bo_device *bdev,
1378                        struct ttm_tt *ttm)
1379 {
1380 #if IS_ENABLED(CONFIG_AGP)
1381         struct nouveau_drm *drm = nouveau_bdev(bdev);
1382         if (drm->agp.bridge) {
1383                 ttm_agp_unbind(ttm);
1384                 ttm_tt_destroy_common(bdev, ttm);
1385                 ttm_agp_destroy(ttm);
1386                 return;
1387         }
1388 #endif
1389         nouveau_sgdma_destroy(bdev, ttm);
1390 }
1391
1392 void
1393 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1394 {
1395         struct dma_resv *resv = nvbo->bo.base.resv;
1396
1397         if (exclusive)
1398                 dma_resv_add_excl_fence(resv, &fence->base);
1399         else if (fence)
1400                 dma_resv_add_shared_fence(resv, &fence->base);
1401 }
1402
1403 static void
1404 nouveau_bo_delete_mem_notify(struct ttm_buffer_object *bo)
1405 {
1406         nouveau_bo_move_ntfy(bo, false, NULL);
1407 }
1408
1409 struct ttm_bo_driver nouveau_bo_driver = {
1410         .ttm_tt_create = &nouveau_ttm_tt_create,
1411         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1412         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1413         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1414         .eviction_valuable = ttm_bo_eviction_valuable,
1415         .evict_flags = nouveau_bo_evict_flags,
1416         .delete_mem_notify = nouveau_bo_delete_mem_notify,
1417         .move = nouveau_bo_move,
1418         .verify_access = nouveau_bo_verify_access,
1419         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1420         .io_mem_free = &nouveau_ttm_io_mem_free,
1421 };