drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31 #include <linux/swiotlb.h>
  32
  33 #include "nouveau_drv.h"
  34 #include "nouveau_chan.h"
  35 #include "nouveau_fence.h"
  36
  37 #include "nouveau_bo.h"
  38 #include "nouveau_ttm.h"
  39 #include "nouveau_gem.h"
  40 #include "nouveau_mem.h"
  41 #include "nouveau_vmm.h"
  42
  43 #include <nvif/class.h>
  44 #include <nvif/if500b.h>
  45 #include <nvif/if900b.h>
  46
  47 static int nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
  48                                struct ttm_resource *reg);
  49
  50 /*
  51  * NV10-NV40 tiling helpers
  52  */
  53
  54 static void
  55 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  56                            u32 addr, u32 size, u32 pitch, u32 flags)
  57 {
  58         struct nouveau_drm *drm = nouveau_drm(dev);
  59         int i = reg - drm->tile.reg;
  60         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  61         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  62
  63         nouveau_fence_unref(&reg->fence);
  64
  65         if (tile->pitch)
  66                 nvkm_fb_tile_fini(fb, i, tile);
  67
  68         if (pitch)
  69                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  70
  71         nvkm_fb_tile_prog(fb, i, tile);
  72 }
  73
  74 static struct nouveau_drm_tile *
  75 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  76 {
  77         struct nouveau_drm *drm = nouveau_drm(dev);
  78         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  79
  80         spin_lock(&drm->tile.lock);
  81
  82         if (!tile->used &&
  83             (!tile->fence || nouveau_fence_done(tile->fence)))
  84                 tile->used = true;
  85         else
  86                 tile = NULL;
  87
  88         spin_unlock(&drm->tile.lock);
  89         return tile;
  90 }
  91
  92 static void
  93 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  94                         struct dma_fence *fence)
  95 {
  96         struct nouveau_drm *drm = nouveau_drm(dev);
  97
  98         if (tile) {
  99                 spin_lock(&drm->tile.lock);
 100                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
 101                 tile->used = false;
 102                 spin_unlock(&drm->tile.lock);
 103         }
 104 }
 105
 106 static struct nouveau_drm_tile *
 107 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 108                    u32 size, u32 pitch, u32 zeta)
 109 {
 110         struct nouveau_drm *drm = nouveau_drm(dev);
 111         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 112         struct nouveau_drm_tile *tile, *found = NULL;
 113         int i;
 114
 115         for (i = 0; i < fb->tile.regions; i++) {
 116                 tile = nv10_bo_get_tile_region(dev, i);
 117
 118                 if (pitch && !found) {
 119                         found = tile;
 120                         continue;
 121
 122                 } else if (tile && fb->tile.region[i].pitch) {
 123                         /* Kill an unused tile region. */
 124                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 125                 }
 126
 127                 nv10_bo_put_tile_region(dev, tile, NULL);
 128         }
 129
 130         if (found)
 131                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 132         return found;
 133 }
 134
 135 static void
 136 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 137 {
 138         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 139         struct drm_device *dev = drm->dev;
 140         struct nouveau_bo *nvbo = nouveau_bo(bo);
 141
 142         WARN_ON(nvbo->pin_refcnt > 0);
 143         nouveau_bo_del_io_reserve_lru(bo);
 144         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 145
 146         /*
 147          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 148          * initialized, so don't attempt to release it.
 149          */
 150         if (bo->base.dev)
 151                 drm_gem_object_release(&bo->base);
 152
 153         kfree(nvbo);
 154 }
 155
 156 static inline u64
 157 roundup_64(u64 x, u32 y)
 158 {
 159         x += y - 1;
 160         do_div(x, y);
 161         return x * y;
 162 }
 163
 164 static void
 165 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, u64 *size)
 166 {
 167         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 168         struct nvif_device *device = &drm->client.device;
 169
 170         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 171                 if (nvbo->mode) {
 172                         if (device->info.chipset >= 0x40) {
 173                                 *align = 65536;
 174                                 *size = roundup_64(*size, 64 * nvbo->mode);
 175
 176                         } else if (device->info.chipset >= 0x30) {
 177                                 *align = 32768;
 178                                 *size = roundup_64(*size, 64 * nvbo->mode);
 179
 180                         } else if (device->info.chipset >= 0x20) {
 181                                 *align = 16384;
 182                                 *size = roundup_64(*size, 64 * nvbo->mode);
 183
 184                         } else if (device->info.chipset >= 0x10) {
 185                                 *align = 16384;
 186                                 *size = roundup_64(*size, 32 * nvbo->mode);
 187                         }
 188                 }
 189         } else {
 190                 *size = roundup_64(*size, (1 << nvbo->page));
 191                 *align = max((1 <<  nvbo->page), *align);
 192         }
 193
 194         *size = roundup_64(*size, PAGE_SIZE);
 195 }
 196
 197 struct nouveau_bo *
 198 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain,
 199                  u32 tile_mode, u32 tile_flags)
 200 {
 201         struct nouveau_drm *drm = cli->drm;
 202         struct nouveau_bo *nvbo;
 203         struct nvif_mmu *mmu = &cli->mmu;
 204         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 205         int i, pi = -1;
 206
 207         if (!*size) {
 208                 NV_WARN(drm, "skipped size %016llx\n", *size);
 209                 return ERR_PTR(-EINVAL);
 210         }
 211
 212         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 213         if (!nvbo)
 214                 return ERR_PTR(-ENOMEM);
 215         INIT_LIST_HEAD(&nvbo->head);
 216         INIT_LIST_HEAD(&nvbo->entry);
 217         INIT_LIST_HEAD(&nvbo->vma_list);
 218         nvbo->bo.bdev = &drm->ttm.bdev;
 219
 220         /* This is confusing, and doesn't actually mean we want an uncached
 221          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 222          * into in nouveau_gem_new().
 223          */
 224         if (domain & NOUVEAU_GEM_DOMAIN_COHERENT) {
 225                 /* Determine if we can get a cache-coherent map, forcing
 226                  * uncached mapping if we can't.
 227                  */
 228                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 229                         nvbo->force_coherent = true;
 230         }
 231
 232         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 233                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 234                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 235                         kfree(nvbo);
 236                         return ERR_PTR(-EINVAL);
 237                 }
 238
 239                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 240         } else
 241         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 242                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 243                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 244                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 245                         kfree(nvbo);
 246                         return ERR_PTR(-EINVAL);
 247                 }
 248         } else {
 249                 nvbo->zeta = (tile_flags & 0x00000007);
 250         }
 251         nvbo->mode = tile_mode;
 252         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 253
 254         /* Determine the desirable target GPU page size for the buffer. */
 255         for (i = 0; i < vmm->page_nr; i++) {
 256                 /* Because we cannot currently allow VMM maps to fail
 257                  * during buffer migration, we need to determine page
 258                  * size for the buffer up-front, and pre-allocate its
 259                  * page tables.
 260                  *
 261                  * Skip page sizes that can't support needed domains.
 262                  */
 263                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 264                     (domain & NOUVEAU_GEM_DOMAIN_VRAM) && !vmm->page[i].vram)
 265                         continue;
 266                 if ((domain & NOUVEAU_GEM_DOMAIN_GART) &&
 267                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 268                         continue;
 269
 270                 /* Select this page size if it's the first that supports
 271                  * the potential memory domains, or when it's compatible
 272                  * with the requested compression settings.
 273                  */
 274                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 275                         pi = i;
 276
 277                 /* Stop once the buffer is larger than the current page size. */
 278                 if (*size >= 1ULL << vmm->page[i].shift)
 279                         break;
 280         }
 281
 282         if (WARN_ON(pi < 0))
 283                 return ERR_PTR(-EINVAL);
 284
 285         /* Disable compression if suitable settings couldn't be found. */
 286         if (nvbo->comp && !vmm->page[pi].comp) {
 287                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 288                         nvbo->kind = mmu->kind[nvbo->kind];
 289                 nvbo->comp = 0;
 290         }
 291         nvbo->page = vmm->page[pi].shift;
 292
 293         nouveau_bo_fixup_align(nvbo, align, size);
 294
 295         return nvbo;
 296 }
 297
 298 int
 299 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 domain,
 300                 struct sg_table *sg, struct dma_resv *robj)
 301 {
 302         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 303         size_t acc_size;
 304         int ret;
 305
 306         acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo));
 307
 308         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 309         nouveau_bo_placement_set(nvbo, domain, 0);
 310         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 311
 312         ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type,
 313                           &nvbo->placement, align >> PAGE_SHIFT, false,
 314                           acc_size, sg, robj, nouveau_bo_del_ttm);
 315         if (ret) {
 316                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 317                 return ret;
 318         }
 319
 320         return 0;
 321 }
 322
 323 int
 324 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 325                uint32_t domain, uint32_t tile_mode, uint32_t tile_flags,
 326                struct sg_table *sg, struct dma_resv *robj,
 327                struct nouveau_bo **pnvbo)
 328 {
 329         struct nouveau_bo *nvbo;
 330         int ret;
 331
 332         nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode,
 333                                 tile_flags);
 334         if (IS_ERR(nvbo))
 335                 return PTR_ERR(nvbo);
 336
 337         ret = nouveau_bo_init(nvbo, size, align, domain, sg, robj);
 338         if (ret)
 339                 return ret;
 340
 341         *pnvbo = nvbo;
 342         return 0;
 343 }
 344
 345 static void
 346 set_placement_list(struct nouveau_drm *drm, struct ttm_place *pl, unsigned *n,
 347                    uint32_t domain, uint32_t flags)
 348 {
 349         *n = 0;
 350
 351         if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
 352                 struct nvif_mmu *mmu = &drm->client.mmu;
 353                 const u8 type = mmu->type[drm->ttm.type_vram].type;
 354
 355                 pl[*n].mem_type = TTM_PL_VRAM;
 356                 pl[*n].flags = flags & ~TTM_PL_FLAG_CACHED;
 357
 358                 /* Some BARs do not support being ioremapped WC */
 359                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 360                     type & NVIF_MEM_UNCACHED)
 361                         pl[*n].flags &= ~TTM_PL_FLAG_WC;
 362
 363                 (*n)++;
 364         }
 365         if (domain & NOUVEAU_GEM_DOMAIN_GART) {
 366                 pl[*n].mem_type = TTM_PL_TT;
 367                 pl[*n].flags = flags;
 368
 369                 if (drm->agp.bridge)
 370                         pl[*n].flags &= ~TTM_PL_FLAG_CACHED;
 371
 372                 (*n)++;
 373         }
 374         if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
 375                 pl[*n].mem_type = TTM_PL_SYSTEM;
 376                 pl[(*n)++].flags = flags;
 377         }
 378 }
 379
 380 static void
 381 set_placement_range(struct nouveau_bo *nvbo, uint32_t domain)
 382 {
 383         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 384         u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
 385         unsigned i, fpfn, lpfn;
 386
 387         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 388             nvbo->mode && (domain & NOUVEAU_GEM_DOMAIN_VRAM) &&
 389             nvbo->bo.mem.num_pages < vram_pages / 4) {
 390                 /*
 391                  * Make sure that the color and depth buffers are handled
 392                  * by independent memory controller units. Up to a 9x
 393                  * speed up when alpha-blending and depth-test are enabled
 394                  * at the same time.
 395                  */
 396                 if (nvbo->zeta) {
 397                         fpfn = vram_pages / 2;
 398                         lpfn = ~0;
 399                 } else {
 400                         fpfn = 0;
 401                         lpfn = vram_pages / 2;
 402                 }
 403                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 404                         nvbo->placements[i].fpfn = fpfn;
 405                         nvbo->placements[i].lpfn = lpfn;
 406                 }
 407                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 408                         nvbo->busy_placements[i].fpfn = fpfn;
 409                         nvbo->busy_placements[i].lpfn = lpfn;
 410                 }
 411         }
 412 }
 413
 414 void
 415 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
 416                          uint32_t busy)
 417 {
 418         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 419         struct ttm_placement *pl = &nvbo->placement;
 420         uint32_t flags = (nvbo->force_coherent ? TTM_PL_FLAG_UNCACHED :
 421                                                  TTM_PL_MASK_CACHING) |
 422                          (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
 423
 424         pl->placement = nvbo->placements;
 425         set_placement_list(drm, nvbo->placements, &pl->num_placement,
 426                            domain, flags);
 427
 428         pl->busy_placement = nvbo->busy_placements;
 429         set_placement_list(drm, nvbo->busy_placements, &pl->num_busy_placement,
 430                            domain | busy, flags);
 431
 432         set_placement_range(nvbo, domain);
 433 }
 434
 435 int
 436 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig)
 437 {
 438         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 439         struct ttm_buffer_object *bo = &nvbo->bo;
 440         bool force = false, evict = false;
 441         int ret;
 442
 443         ret = ttm_bo_reserve(bo, false, false, NULL);
 444         if (ret)
 445                 return ret;
 446
 447         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 448             domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) {
 449                 if (!nvbo->contig) {
 450                         nvbo->contig = true;
 451                         force = true;
 452                         evict = true;
 453                 }
 454         }
 455
 456         if (nvbo->pin_refcnt) {
 457                 bool error = evict;
 458
 459                 switch (bo->mem.mem_type) {
 460                 case TTM_PL_VRAM:
 461                         error |= !(domain & NOUVEAU_GEM_DOMAIN_VRAM);
 462                         break;
 463                 case TTM_PL_TT:
 464                         error |= !(domain & NOUVEAU_GEM_DOMAIN_GART);
 465                 default:
 466                         break;
 467                 }
 468
 469                 if (error) {
 470                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 471                                       "0x%08x vs 0x%08x\n", bo,
 472                                  bo->mem.mem_type, domain);
 473                         ret = -EBUSY;
 474                 }
 475                 nvbo->pin_refcnt++;
 476                 goto out;
 477         }
 478
 479         if (evict) {
 480                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 481                 ret = nouveau_bo_validate(nvbo, false, false);
 482                 if (ret)
 483                         goto out;
 484         }
 485
 486         nvbo->pin_refcnt++;
 487         nouveau_bo_placement_set(nvbo, domain, 0);
 488
 489         /* drop pin_refcnt temporarily, so we don't trip the assertion
 490          * in nouveau_bo_move() that makes sure we're not trying to
 491          * move a pinned buffer
 492          */
 493         nvbo->pin_refcnt--;
 494         ret = nouveau_bo_validate(nvbo, false, false);
 495         if (ret)
 496                 goto out;
 497         nvbo->pin_refcnt++;
 498
 499         switch (bo->mem.mem_type) {
 500         case TTM_PL_VRAM:
 501                 drm->gem.vram_available -= bo->mem.size;
 502                 break;
 503         case TTM_PL_TT:
 504                 drm->gem.gart_available -= bo->mem.size;
 505                 break;
 506         default:
 507                 break;
 508         }
 509
 510 out:
 511         if (force && ret)
 512                 nvbo->contig = false;
 513         ttm_bo_unreserve(bo);
 514         return ret;
 515 }
 516
 517 int
 518 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 519 {
 520         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 521         struct ttm_buffer_object *bo = &nvbo->bo;
 522         int ret, ref;
 523
 524         ret = ttm_bo_reserve(bo, false, false, NULL);
 525         if (ret)
 526                 return ret;
 527
 528         ref = --nvbo->pin_refcnt;
 529         WARN_ON_ONCE(ref < 0);
 530         if (ref)
 531                 goto out;
 532
 533         switch (bo->mem.mem_type) {
 534         case TTM_PL_VRAM:
 535                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
 536                 break;
 537         case TTM_PL_TT:
 538                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 539                 break;
 540         default:
 541                 break;
 542         }
 543
 544         ret = nouveau_bo_validate(nvbo, false, false);
 545         if (ret == 0) {
 546                 switch (bo->mem.mem_type) {
 547                 case TTM_PL_VRAM:
 548                         drm->gem.vram_available += bo->mem.size;
 549                         break;
 550                 case TTM_PL_TT:
 551                         drm->gem.gart_available += bo->mem.size;
 552                         break;
 553                 default:
 554                         break;
 555                 }
 556         }
 557
 558 out:
 559         ttm_bo_unreserve(bo);
 560         return ret;
 561 }
 562
 563 int
 564 nouveau_bo_map(struct nouveau_bo *nvbo)
 565 {
 566         int ret;
 567
 568         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 569         if (ret)
 570                 return ret;
 571
 572         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 573
 574         ttm_bo_unreserve(&nvbo->bo);
 575         return ret;
 576 }
 577
 578 void
 579 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 580 {
 581         if (!nvbo)
 582                 return;
 583
 584         ttm_bo_kunmap(&nvbo->kmap);
 585 }
 586
 587 void
 588 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 589 {
 590         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 591         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 592         int i;
 593
 594         if (!ttm_dma)
 595                 return;
 596
 597         /* Don't waste time looping if the object is coherent */
 598         if (nvbo->force_coherent)
 599                 return;
 600
 601         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 602                 dma_sync_single_for_device(drm->dev->dev,
 603                                            ttm_dma->dma_address[i],
 604                                            PAGE_SIZE, DMA_TO_DEVICE);
 605 }
 606
 607 void
 608 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 609 {
 610         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 611         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 612         int i;
 613
 614         if (!ttm_dma)
 615                 return;
 616
 617         /* Don't waste time looping if the object is coherent */
 618         if (nvbo->force_coherent)
 619                 return;
 620
 621         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 622                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 623                                         PAGE_SIZE, DMA_FROM_DEVICE);
 624 }
 625
 626 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 627 {
 628         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 629         struct nouveau_bo *nvbo = nouveau_bo(bo);
 630
 631         mutex_lock(&drm->ttm.io_reserve_mutex);
 632         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 633         mutex_unlock(&drm->ttm.io_reserve_mutex);
 634 }
 635
 636 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 637 {
 638         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 639         struct nouveau_bo *nvbo = nouveau_bo(bo);
 640
 641         mutex_lock(&drm->ttm.io_reserve_mutex);
 642         list_del_init(&nvbo->io_reserve_lru);
 643         mutex_unlock(&drm->ttm.io_reserve_mutex);
 644 }
 645
 646 int
 647 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 648                     bool no_wait_gpu)
 649 {
 650         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 651         int ret;
 652
 653         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 654         if (ret)
 655                 return ret;
 656
 657         nouveau_bo_sync_for_device(nvbo);
 658
 659         return 0;
 660 }
 661
 662 void
 663 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 664 {
 665         bool is_iomem;
 666         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 667
 668         mem += index;
 669
 670         if (is_iomem)
 671                 iowrite16_native(val, (void __force __iomem *)mem);
 672         else
 673                 *mem = val;
 674 }
 675
 676 u32
 677 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 678 {
 679         bool is_iomem;
 680         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 681
 682         mem += index;
 683
 684         if (is_iomem)
 685                 return ioread32_native((void __force __iomem *)mem);
 686         else
 687                 return *mem;
 688 }
 689
 690 void
 691 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 692 {
 693         bool is_iomem;
 694         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 695
 696         mem += index;
 697
 698         if (is_iomem)
 699                 iowrite32_native(val, (void __force __iomem *)mem);
 700         else
 701                 *mem = val;
 702 }
 703
 704 static struct ttm_tt *
 705 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 706 {
 707 #if IS_ENABLED(CONFIG_AGP)
 708         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 709
 710         if (drm->agp.bridge) {
 711                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 712         }
 713 #endif
 714
 715         return nouveau_sgdma_create_ttm(bo, page_flags);
 716 }
 717
 718 static int
 719 nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
 720                     struct ttm_resource *reg)
 721 {
 722 #if IS_ENABLED(CONFIG_AGP)
 723         struct nouveau_drm *drm = nouveau_bdev(bdev);
 724 #endif
 725         if (!reg)
 726                 return -EINVAL;
 727 #if IS_ENABLED(CONFIG_AGP)
 728         if (drm->agp.bridge)
 729                 return ttm_agp_bind(ttm, reg);
 730 #endif
 731         return nouveau_sgdma_bind(bdev, ttm, reg);
 732 }
 733
 734 static void
 735 nouveau_ttm_tt_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 736 {
 737 #if IS_ENABLED(CONFIG_AGP)
 738         struct nouveau_drm *drm = nouveau_bdev(bdev);
 739
 740         if (drm->agp.bridge) {
 741                 ttm_agp_unbind(ttm);
 742                 return;
 743         }
 744 #endif
 745         nouveau_sgdma_unbind(bdev, ttm);
 746 }
 747
 748 static void
 749 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 750 {
 751         struct nouveau_bo *nvbo = nouveau_bo(bo);
 752
 753         switch (bo->mem.mem_type) {
 754         case TTM_PL_VRAM:
 755                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
 756                                          NOUVEAU_GEM_DOMAIN_CPU);
 757                 break;
 758         default:
 759                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_CPU, 0);
 760                 break;
 761         }
 762
 763         *pl = nvbo->placement;
 764 }
 765
 766 static int
 767 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 768                      struct ttm_resource *reg)
 769 {
 770         struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
 771         struct nouveau_mem *new_mem = nouveau_mem(reg);
 772         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 773         int ret;
 774
 775         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 776                            old_mem->mem.size, &old_mem->vma[0]);
 777         if (ret)
 778                 return ret;
 779
 780         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 781                            new_mem->mem.size, &old_mem->vma[1]);
 782         if (ret)
 783                 goto done;
 784
 785         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 786         if (ret)
 787                 goto done;
 788
 789         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 790 done:
 791         if (ret) {
 792                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 793                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 794         }
 795         return 0;
 796 }
 797
 798 static int
 799 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
 800                      bool no_wait_gpu, struct ttm_resource *new_reg)
 801 {
 802         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 803         struct nouveau_channel *chan = drm->ttm.chan;
 804         struct nouveau_cli *cli = (void *)chan->user.client;
 805         struct nouveau_fence *fence;
 806         int ret;
 807
 808         /* create temporary vmas for the transfer and attach them to the
 809          * old nvkm_mem node, these will get cleaned up after ttm has
 810          * destroyed the ttm_resource
 811          */
 812         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 813                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 814                 if (ret)
 815                         return ret;
 816         }
 817
 818         mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 819         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr);
 820         if (ret == 0) {
 821                 ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
 822                 if (ret == 0) {
 823                         ret = nouveau_fence_new(chan, false, &fence);
 824                         if (ret == 0) {
 825                                 ret = ttm_bo_move_accel_cleanup(bo,
 826                                                                 &fence->base,
 827                                                                 evict,
 828                                                                 new_reg);
 829                                 nouveau_fence_unref(&fence);
 830                         }
 831                 }
 832         }
 833         mutex_unlock(&cli->mutex);
 834         return ret;
 835 }
 836
 837 void
 838 nouveau_bo_move_init(struct nouveau_drm *drm)
 839 {
 840         static const struct _method_table {
 841                 const char *name;
 842                 int engine;
 843                 s32 oclass;
 844                 int (*exec)(struct nouveau_channel *,
 845                             struct ttm_buffer_object *,
 846                             struct ttm_resource *, struct ttm_resource *);
 847                 int (*init)(struct nouveau_channel *, u32 handle);
 848         } _methods[] = {
 849                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 850                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 851                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 852                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 853                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 854                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 855                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 856                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 857                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 858                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 859                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 860                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 861                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 862                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 863                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 864                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 865                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 866                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 867                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 868                 {},
 869         };
 870         const struct _method_table *mthd = _methods;
 871         const char *name = "CPU";
 872         int ret;
 873
 874         do {
 875                 struct nouveau_channel *chan;
 876
 877                 if (mthd->engine)
 878                         chan = drm->cechan;
 879                 else
 880                         chan = drm->channel;
 881                 if (chan == NULL)
 882                         continue;
 883
 884                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 885                                        mthd->oclass | (mthd->engine << 16),
 886                                        mthd->oclass, NULL, 0,
 887                                        &drm->ttm.copy);
 888                 if (ret == 0) {
 889                         ret = mthd->init(chan, drm->ttm.copy.handle);
 890                         if (ret) {
 891                                 nvif_object_dtor(&drm->ttm.copy);
 892                                 continue;
 893                         }
 894
 895                         drm->ttm.move = mthd->exec;
 896                         drm->ttm.chan = chan;
 897                         name = mthd->name;
 898                         break;
 899                 }
 900         } while ((++mthd)->exec);
 901
 902         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 903 }
 904
 905 static int
 906 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
 907                       bool no_wait_gpu, struct ttm_resource *new_reg)
 908 {
 909         struct ttm_operation_ctx ctx = { intr, no_wait_gpu };
 910         struct ttm_place placement_memtype = {
 911                 .fpfn = 0,
 912                 .lpfn = 0,
 913                 .mem_type = TTM_PL_TT,
 914                 .flags = TTM_PL_MASK_CACHING
 915         };
 916         struct ttm_placement placement;
 917         struct ttm_resource tmp_reg;
 918         int ret;
 919
 920         placement.num_placement = placement.num_busy_placement = 1;
 921         placement.placement = placement.busy_placement = &placement_memtype;
 922
 923         tmp_reg = *new_reg;
 924         tmp_reg.mm_node = NULL;
 925         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, &ctx);
 926         if (ret)
 927                 return ret;
 928
 929         ret = ttm_tt_populate(bo->bdev, bo->ttm, &ctx);
 930         if (ret)
 931                 goto out;
 932
 933         ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_reg);
 934         if (ret)
 935                 goto out;
 936
 937         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, &tmp_reg);
 938         if (ret)
 939                 goto out;
 940
 941         ret = ttm_bo_move_ttm(bo, &ctx, new_reg);
 942 out:
 943         ttm_resource_free(bo, &tmp_reg);
 944         return ret;
 945 }
 946
 947 static int
 948 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
 949                       bool no_wait_gpu, struct ttm_resource *new_reg)
 950 {
 951         struct ttm_operation_ctx ctx = { intr, no_wait_gpu };
 952         struct ttm_place placement_memtype = {
 953                 .fpfn = 0,
 954                 .lpfn = 0,
 955                 .mem_type = TTM_PL_TT,
 956                 .flags = TTM_PL_MASK_CACHING
 957         };
 958         struct ttm_placement placement;
 959         struct ttm_resource tmp_reg;
 960         int ret;
 961
 962         placement.num_placement = placement.num_busy_placement = 1;
 963         placement.placement = placement.busy_placement = &placement_memtype;
 964
 965         tmp_reg = *new_reg;
 966         tmp_reg.mm_node = NULL;
 967         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, &ctx);
 968         if (ret)
 969                 return ret;
 970
 971         ret = ttm_bo_move_ttm(bo, &ctx, &tmp_reg);
 972         if (ret)
 973                 goto out;
 974
 975         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, new_reg);
 976         if (ret)
 977                 goto out;
 978
 979 out:
 980         ttm_resource_free(bo, &tmp_reg);
 981         return ret;
 982 }
 983
 984 static void
 985 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
 986                      struct ttm_resource *new_reg)
 987 {
 988         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 989         struct nouveau_bo *nvbo = nouveau_bo(bo);
 990         struct nouveau_vma *vma;
 991
 992         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 993         if (bo->destroy != nouveau_bo_del_ttm)
 994                 return;
 995
 996         nouveau_bo_del_io_reserve_lru(bo);
 997
 998         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 999             mem->mem.page == nvbo->page) {
1000                 list_for_each_entry(vma, &nvbo->vma_list, head) {
1001                         nouveau_vma_map(vma, mem);
1002                 }
1003         } else {
1004                 list_for_each_entry(vma, &nvbo->vma_list, head) {
1005                         WARN_ON(ttm_bo_wait(bo, false, false));
1006                         nouveau_vma_unmap(vma);
1007                 }
1008         }
1009
1010         if (new_reg) {
1011                 if (new_reg->mm_node)
1012                         nvbo->offset = (new_reg->start << PAGE_SHIFT);
1013                 else
1014                         nvbo->offset = 0;
1015         }
1016
1017 }
1018
1019 static int
1020 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
1021                    struct nouveau_drm_tile **new_tile)
1022 {
1023         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1024         struct drm_device *dev = drm->dev;
1025         struct nouveau_bo *nvbo = nouveau_bo(bo);
1026         u64 offset = new_reg->start << PAGE_SHIFT;
1027
1028         *new_tile = NULL;
1029         if (new_reg->mem_type != TTM_PL_VRAM)
1030                 return 0;
1031
1032         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
1033                 *new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size,
1034                                                nvbo->mode, nvbo->zeta);
1035         }
1036
1037         return 0;
1038 }
1039
1040 static void
1041 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
1042                       struct nouveau_drm_tile *new_tile,
1043                       struct nouveau_drm_tile **old_tile)
1044 {
1045         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1046         struct drm_device *dev = drm->dev;
1047         struct dma_fence *fence = dma_resv_get_excl(bo->base.resv);
1048
1049         nv10_bo_put_tile_region(dev, *old_tile, fence);
1050         *old_tile = new_tile;
1051 }
1052
1053 static int
1054 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
1055                 struct ttm_operation_ctx *ctx,
1056                 struct ttm_resource *new_reg)
1057 {
1058         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1059         struct nouveau_bo *nvbo = nouveau_bo(bo);
1060         struct ttm_resource *old_reg = &bo->mem;
1061         struct nouveau_drm_tile *new_tile = NULL;
1062         int ret = 0;
1063
1064         ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
1065         if (ret)
1066                 return ret;
1067
1068         if (nvbo->pin_refcnt)
1069                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
1070
1071         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1072                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1073                 if (ret)
1074                         return ret;
1075         }
1076
1077         /* Fake bo copy. */
1078         if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
1079                 ttm_bo_move_null(bo, new_reg);
1080                 goto out;
1081         }
1082
1083         /* Hardware assisted copy. */
1084         if (drm->ttm.move) {
1085                 if (new_reg->mem_type == TTM_PL_SYSTEM)
1086                         ret = nouveau_bo_move_flipd(bo, evict,
1087                                                     ctx->interruptible,
1088                                                     ctx->no_wait_gpu, new_reg);
1089                 else if (old_reg->mem_type == TTM_PL_SYSTEM)
1090                         ret = nouveau_bo_move_flips(bo, evict,
1091                                                     ctx->interruptible,
1092                                                     ctx->no_wait_gpu, new_reg);
1093                 else
1094                         ret = nouveau_bo_move_m2mf(bo, evict,
1095                                                    ctx->interruptible,
1096                                                    ctx->no_wait_gpu, new_reg);
1097                 if (!ret)
1098                         goto out;
1099         }
1100
1101         /* Fallback to software copy. */
1102         ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
1103         if (ret == 0)
1104                 ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1105
1106 out:
1107         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1108                 if (ret)
1109                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1110                 else
1111                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1112         }
1113
1114         return ret;
1115 }
1116
1117 static int
1118 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
1119 {
1120         struct nouveau_bo *nvbo = nouveau_bo(bo);
1121
1122         return drm_vma_node_verify_access(&nvbo->bo.base.vma_node,
1123                                           filp->private_data);
1124 }
1125
1126 static void
1127 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1128                                struct ttm_resource *reg)
1129 {
1130         struct nouveau_mem *mem = nouveau_mem(reg);
1131
1132         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1133                 switch (reg->mem_type) {
1134                 case TTM_PL_TT:
1135                         if (mem->kind)
1136                                 nvif_object_unmap_handle(&mem->mem.object);
1137                         break;
1138                 case TTM_PL_VRAM:
1139                         nvif_object_unmap_handle(&mem->mem.object);
1140                         break;
1141                 default:
1142                         break;
1143                 }
1144         }
1145 }
1146
1147 static int
1148 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1149 {
1150         struct nouveau_drm *drm = nouveau_bdev(bdev);
1151         struct nvkm_device *device = nvxx_device(&drm->client.device);
1152         struct nouveau_mem *mem = nouveau_mem(reg);
1153         int ret;
1154
1155         mutex_lock(&drm->ttm.io_reserve_mutex);
1156 retry:
1157         switch (reg->mem_type) {
1158         case TTM_PL_SYSTEM:
1159                 /* System memory */
1160                 ret = 0;
1161                 goto out;
1162         case TTM_PL_TT:
1163 #if IS_ENABLED(CONFIG_AGP)
1164                 if (drm->agp.bridge) {
1165                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1166                                 drm->agp.base;
1167                         reg->bus.is_iomem = !drm->agp.cma;
1168                 }
1169 #endif
1170                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1171                     !mem->kind) {
1172                         /* untiled */
1173                         ret = 0;
1174                         break;
1175                 }
1176                 fallthrough;    /* tiled memory */
1177         case TTM_PL_VRAM:
1178                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1179                         device->func->resource_addr(device, 1);
1180                 reg->bus.is_iomem = true;
1181                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1182                         union {
1183                                 struct nv50_mem_map_v0 nv50;
1184                                 struct gf100_mem_map_v0 gf100;
1185                         } args;
1186                         u64 handle, length;
1187                         u32 argc = 0;
1188
1189                         switch (mem->mem.object.oclass) {
1190                         case NVIF_CLASS_MEM_NV50:
1191                                 args.nv50.version = 0;
1192                                 args.nv50.ro = 0;
1193                                 args.nv50.kind = mem->kind;
1194                                 args.nv50.comp = mem->comp;
1195                                 argc = sizeof(args.nv50);
1196                                 break;
1197                         case NVIF_CLASS_MEM_GF100:
1198                                 args.gf100.version = 0;
1199                                 args.gf100.ro = 0;
1200                                 args.gf100.kind = mem->kind;
1201                                 argc = sizeof(args.gf100);
1202                                 break;
1203                         default:
1204                                 WARN_ON(1);
1205                                 break;
1206                         }
1207
1208                         ret = nvif_object_map_handle(&mem->mem.object,
1209                                                      &args, argc,
1210                                                      &handle, &length);
1211                         if (ret != 1) {
1212                                 if (WARN_ON(ret == 0))
1213                                         ret = -EINVAL;
1214                                 goto out;
1215                         }
1216
1217                         reg->bus.offset = handle;
1218                         ret = 0;
1219                 }
1220                 break;
1221         default:
1222                 ret = -EINVAL;
1223         }
1224
1225 out:
1226         if (ret == -ENOSPC) {
1227                 struct nouveau_bo *nvbo;
1228
1229                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1230                                                 typeof(*nvbo),
1231                                                 io_reserve_lru);
1232                 if (nvbo) {
1233                         list_del_init(&nvbo->io_reserve_lru);
1234                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1235                                            bdev->dev_mapping);
1236                         nouveau_ttm_io_mem_free_locked(drm, &nvbo->bo.mem);
1237                         goto retry;
1238                 }
1239
1240         }
1241         mutex_unlock(&drm->ttm.io_reserve_mutex);
1242         return ret;
1243 }
1244
1245 static void
1246 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1247 {
1248         struct nouveau_drm *drm = nouveau_bdev(bdev);
1249
1250         mutex_lock(&drm->ttm.io_reserve_mutex);
1251         nouveau_ttm_io_mem_free_locked(drm, reg);
1252         mutex_unlock(&drm->ttm.io_reserve_mutex);
1253 }
1254
1255 static int
1256 nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1257 {
1258         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1259         struct nouveau_bo *nvbo = nouveau_bo(bo);
1260         struct nvkm_device *device = nvxx_device(&drm->client.device);
1261         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1262         int i, ret;
1263
1264         /* as long as the bo isn't in vram, and isn't tiled, we've got
1265          * nothing to do here.
1266          */
1267         if (bo->mem.mem_type != TTM_PL_VRAM) {
1268                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1269                     !nvbo->kind)
1270                         return 0;
1271
1272                 if (bo->mem.mem_type == TTM_PL_SYSTEM) {
1273                         nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
1274                                                  0);
1275
1276                         ret = nouveau_bo_validate(nvbo, false, false);
1277                         if (ret)
1278                                 return ret;
1279                 }
1280                 return 0;
1281         }
1282
1283         /* make sure bo is in mappable vram */
1284         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1285             bo->mem.start + bo->mem.num_pages < mappable)
1286                 return 0;
1287
1288         for (i = 0; i < nvbo->placement.num_placement; ++i) {
1289                 nvbo->placements[i].fpfn = 0;
1290                 nvbo->placements[i].lpfn = mappable;
1291         }
1292
1293         for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1294                 nvbo->busy_placements[i].fpfn = 0;
1295                 nvbo->busy_placements[i].lpfn = mappable;
1296         }
1297
1298         nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
1299         return nouveau_bo_validate(nvbo, false, false);
1300 }
1301
1302 static int
1303 nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
1304                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1305 {
1306         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1307         struct nouveau_drm *drm;
1308         struct device *dev;
1309         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1310
1311         if (ttm_tt_is_populated(ttm))
1312                 return 0;
1313
1314         if (slave && ttm->sg) {
1315                 /* make userspace faulting work */
1316                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
1317                                                  ttm_dma->dma_address, ttm->num_pages);
1318                 ttm_tt_set_populated(ttm);
1319                 return 0;
1320         }
1321
1322         drm = nouveau_bdev(bdev);
1323         dev = drm->dev->dev;
1324
1325 #if IS_ENABLED(CONFIG_AGP)
1326         if (drm->agp.bridge) {
1327                 return ttm_pool_populate(ttm, ctx);
1328         }
1329 #endif
1330
1331 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1332         if (swiotlb_nr_tbl()) {
1333                 return ttm_dma_populate((void *)ttm, dev, ctx);
1334         }
1335 #endif
1336         return ttm_populate_and_map_pages(dev, ttm_dma, ctx);
1337 }
1338
1339 static void
1340 nouveau_ttm_tt_unpopulate(struct ttm_bo_device *bdev,
1341                           struct ttm_tt *ttm)
1342 {
1343         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1344         struct nouveau_drm *drm;
1345         struct device *dev;
1346         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1347
1348         if (slave)
1349                 return;
1350
1351         drm = nouveau_bdev(bdev);
1352         dev = drm->dev->dev;
1353
1354 #if IS_ENABLED(CONFIG_AGP)
1355         if (drm->agp.bridge) {
1356                 ttm_pool_unpopulate(ttm);
1357                 return;
1358         }
1359 #endif
1360
1361 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1362         if (swiotlb_nr_tbl()) {
1363                 ttm_dma_unpopulate((void *)ttm, dev);
1364                 return;
1365         }
1366 #endif
1367
1368         ttm_unmap_and_unpopulate_pages(dev, ttm_dma);
1369 }
1370
1371 static void
1372 nouveau_ttm_tt_destroy(struct ttm_bo_device *bdev,
1373                        struct ttm_tt *ttm)
1374 {
1375 #if IS_ENABLED(CONFIG_AGP)
1376         struct nouveau_drm *drm = nouveau_bdev(bdev);
1377         if (drm->agp.bridge) {
1378                 ttm_agp_unbind(ttm);
1379                 ttm_tt_destroy_common(bdev, ttm);
1380                 ttm_agp_destroy(ttm);
1381                 return;
1382         }
1383 #endif
1384         nouveau_sgdma_destroy(bdev, ttm);
1385 }
1386
1387 void
1388 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1389 {
1390         struct dma_resv *resv = nvbo->bo.base.resv;
1391
1392         if (exclusive)
1393                 dma_resv_add_excl_fence(resv, &fence->base);
1394         else if (fence)
1395                 dma_resv_add_shared_fence(resv, &fence->base);
1396 }
1397
1398 struct ttm_bo_driver nouveau_bo_driver = {
1399         .ttm_tt_create = &nouveau_ttm_tt_create,
1400         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1401         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1402         .ttm_tt_bind = &nouveau_ttm_tt_bind,
1403         .ttm_tt_unbind = &nouveau_ttm_tt_unbind,
1404         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1405         .eviction_valuable = ttm_bo_eviction_valuable,
1406         .evict_flags = nouveau_bo_evict_flags,
1407         .move_notify = nouveau_bo_move_ntfy,
1408         .move = nouveau_bo_move,
1409         .verify_access = nouveau_bo_verify_access,
1410         .fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
1411         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1412         .io_mem_free = &nouveau_ttm_io_mem_free,
1413 };