2 * Copyright 2018 Red Hat Inc.
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11 * The above copyright notice and this permission notice shall be included in
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15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 #include <drm/drm_atomic_helper.h>
26 #include <drm/drm_plane_helper.h>
27 #include <nouveau_bo.h>
29 #include <nvif/clc37e.h>
30 #include <nvif/pushc37b.h>
33 wndwc37e_csc_clr(struct nv50_wndw *wndw)
38 wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
41 if ((push = evo_wait(&wndw->wndw, 13))) {
42 evo_mthd(push, 0x02bc, 12);
43 for (i = 0; i < 12; i++)
44 evo_data(push, asyw->csc.matrix[i]);
45 evo_kick(push, &wndw->wndw);
50 wndwc37e_ilut_clr(struct nv50_wndw *wndw)
53 if ((push = evo_wait(&wndw->wndw, 2))) {
54 evo_mthd(push, 0x02b8, 1);
55 evo_data(push, 0x00000000);
56 evo_kick(push, &wndw->wndw);
61 wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
64 if ((push = evo_wait(&wndw->wndw, 4))) {
65 evo_mthd(push, 0x02b0, 3);
66 evo_data(push, asyw->xlut.i.output_mode << 8 |
67 asyw->xlut.i.range << 4 |
69 evo_data(push, asyw->xlut.i.offset >> 8);
70 evo_data(push, asyw->xlut.handle);
71 evo_kick(push, &wndw->wndw);
76 wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
78 if (size != 256 && size != 1024)
81 asyw->xlut.i.mode = 2;
82 asyw->xlut.i.size = size == 1024 ? 2 : 0;
83 asyw->xlut.i.range = 0;
84 asyw->xlut.i.output_mode = 1;
85 asyw->xlut.i.load = head907d_olut_load;
90 wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
93 if ((push = evo_wait(&wndw->wndw, 8))) {
94 evo_mthd(push, 0x02ec, 7);
95 evo_data(push, asyw->blend.depth << 4);
96 evo_data(push, asyw->blend.k1);
97 evo_data(push, asyw->blend.dst_color << 12 |
98 asyw->blend.dst_color << 8 |
99 asyw->blend.src_color << 4 |
100 asyw->blend.src_color);
101 evo_data(push, 0xffff0000);
102 evo_data(push, 0xffff0000);
103 evo_data(push, 0xffff0000);
104 evo_data(push, 0xffff0000);
105 evo_kick(push, &wndw->wndw);
110 wndwc37e_image_clr(struct nv50_wndw *wndw)
113 if ((push = evo_wait(&wndw->wndw, 4))) {
114 evo_mthd(push, 0x0308, 1);
115 evo_data(push, 0x00000000);
116 evo_mthd(push, 0x0240, 1);
117 evo_data(push, 0x00000000);
118 evo_kick(push, &wndw->wndw);
123 wndwc37e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
127 if (!(push = evo_wait(&wndw->wndw, 17)))
130 evo_mthd(push, 0x0308, 1);
131 evo_data(push, asyw->image.mode << 4 | asyw->image.interval);
132 evo_mthd(push, 0x0224, 4);
133 evo_data(push, asyw->image.h << 16 | asyw->image.w);
134 evo_data(push, asyw->image.layout << 4 | asyw->image.blockh);
135 evo_data(push, asyw->csc.valid << 17 |
136 asyw->image.colorspace << 8 |
138 evo_data(push, asyw->image.blocks[0] | (asyw->image.pitch[0] >> 6));
139 evo_mthd(push, 0x0240, 1);
140 evo_data(push, asyw->image.handle[0]);
141 evo_mthd(push, 0x0260, 1);
142 evo_data(push, asyw->image.offset[0] >> 8);
143 evo_mthd(push, 0x0290, 1);
144 evo_data(push, (asyw->state.src_y >> 16) << 16 |
145 (asyw->state.src_x >> 16));
146 evo_mthd(push, 0x0298, 1);
147 evo_data(push, (asyw->state.src_h >> 16) << 16 |
148 (asyw->state.src_w >> 16));
149 evo_mthd(push, 0x02a4, 1);
150 evo_data(push, asyw->state.crtc_h << 16 |
152 evo_kick(push, &wndw->wndw);
156 wndwc37e_ntfy_clr(struct nv50_wndw *wndw)
159 if ((push = evo_wait(&wndw->wndw, 2))) {
160 evo_mthd(push, 0x021c, 1);
161 evo_data(push, 0x00000000);
162 evo_kick(push, &wndw->wndw);
167 wndwc37e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
170 if ((push = evo_wait(&wndw->wndw, 3))) {
171 evo_mthd(push, 0x021c, 2);
172 evo_data(push, asyw->ntfy.handle);
173 evo_data(push, asyw->ntfy.offset | asyw->ntfy.awaken);
174 evo_kick(push, &wndw->wndw);
179 wndwc37e_sema_clr(struct nv50_wndw *wndw)
181 struct nvif_push *push = wndw->wndw.push;
184 if ((ret = PUSH_WAIT(push, 2)))
187 PUSH_NVSQ(push, NVC37E, 0x0218, 0x00000000);
192 wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
194 struct nvif_push *push = wndw->wndw.push;
197 if ((ret = PUSH_WAIT(push, 5)))
200 PUSH_NVSQ(push, NVC37E, 0x020c, asyw->sema.offset,
201 0x0210, asyw->sema.acquire,
202 0x0214, asyw->sema.release,
203 0x0218, asyw->sema.handle);
208 wndwc37e_update(struct nv50_wndw *wndw, u32 *interlock)
211 if ((push = evo_wait(&wndw->wndw, 5))) {
212 evo_mthd(push, 0x0370, 2);
213 evo_data(push, interlock[NV50_DISP_INTERLOCK_CURS] << 1 |
214 interlock[NV50_DISP_INTERLOCK_CORE]);
215 evo_data(push, interlock[NV50_DISP_INTERLOCK_WNDW]);
216 evo_mthd(push, 0x0200, 1);
217 if (interlock[NV50_DISP_INTERLOCK_WIMM] & wndw->interlock.data)
218 evo_data(push, 0x00001001);
220 evo_data(push, 0x00000001);
221 evo_kick(push, &wndw->wndw);
226 wndwc37e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
227 struct nv50_head_atom *asyh)
232 wndwc37e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
233 struct nv50_head_atom *asyh)
235 return drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
236 DRM_PLANE_HELPER_NO_SCALING,
237 DRM_PLANE_HELPER_NO_SCALING,
242 wndwc37e_format[] = {
251 DRM_FORMAT_XBGR2101010,
252 DRM_FORMAT_ABGR2101010,
255 DRM_FORMAT_XRGB2101010,
256 DRM_FORMAT_ARGB2101010,
257 DRM_FORMAT_XBGR16161616F,
258 DRM_FORMAT_ABGR16161616F,
262 static const struct nv50_wndw_func
264 .acquire = wndwc37e_acquire,
265 .release = wndwc37e_release,
266 .sema_set = wndwc37e_sema_set,
267 .sema_clr = wndwc37e_sema_clr,
268 .ntfy_set = wndwc37e_ntfy_set,
269 .ntfy_clr = wndwc37e_ntfy_clr,
270 .ntfy_reset = corec37d_ntfy_init,
271 .ntfy_wait_begun = base507c_ntfy_wait_begun,
272 .ilut = wndwc37e_ilut,
274 .xlut_set = wndwc37e_ilut_set,
275 .xlut_clr = wndwc37e_ilut_clr,
277 .csc_set = wndwc37e_csc_set,
278 .csc_clr = wndwc37e_csc_clr,
279 .image_set = wndwc37e_image_set,
280 .image_clr = wndwc37e_image_clr,
281 .blend_set = wndwc37e_blend_set,
282 .update = wndwc37e_update,
286 wndwc37e_new_(const struct nv50_wndw_func *func, struct nouveau_drm *drm,
287 enum drm_plane_type type, int index, s32 oclass, u32 heads,
288 struct nv50_wndw **pwndw)
290 struct nvc37e_window_channel_dma_v0 args = {
291 .pushbuf = 0xb0007e00 | index,
294 struct nv50_disp *disp = nv50_disp(drm->dev);
295 struct nv50_wndw *wndw;
298 ret = nv50_wndw_new_(func, drm->dev, type, "wndw", index,
299 wndwc37e_format, heads, NV50_DISP_INTERLOCK_WNDW,
301 if (*pwndw = wndw, ret)
304 ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
305 &oclass, 0, &args, sizeof(args),
306 disp->sync->offset, &wndw->wndw);
308 NV_ERROR(drm, "qndw%04x allocation failed: %d\n", oclass, ret);
312 wndw->ntfy = NV50_DISP_WNDW_NTFY(wndw->id);
313 wndw->sema = NV50_DISP_WNDW_SEM0(wndw->id);
314 wndw->data = 0x00000000;
319 wndwc37e_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
320 s32 oclass, struct nv50_wndw **pwndw)
322 return wndwc37e_new_(&wndwc37e, drm, type, index, oclass,
323 BIT(index >> 1), pwndw);