drm/nouveau/kms/nv50-: convert core head_dither() to new push macros
[linux-2.6-microblaze.git] / drivers / gpu / drm / nouveau / dispnv50 / head507d.c
1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "head.h"
23 #include "core.h"
24
25 #include <nvif/push507c.h>
26
27 void
28 head507d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
29 {
30         struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
31         u32 *push;
32         if ((push = evo_wait(core, 2))) {
33                 evo_mthd(push, 0x08a8 + (head->base.index * 0x400), 1);
34                 evo_data(push, asyh->procamp.sat.sin << 20 |
35                                asyh->procamp.sat.cos << 8);
36                 evo_kick(push, core);
37         }
38 }
39
40 int
41 head507d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
42 {
43         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
44         const int i = head->base.index;
45         int ret;
46
47         if ((ret = PUSH_WAIT(push, 2)))
48                 return ret;
49
50         PUSH_NVSQ(push, NV507D, 0x08a0 + (i * 0x400), asyh->dither.mode << 3 |
51                                                       asyh->dither.bits << 1 |
52                                                       asyh->dither.enable);
53         return 0;
54 }
55
56 int
57 head507d_ovly(struct nv50_head *head, struct nv50_head_atom *asyh)
58 {
59         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
60         const int i = head->base.index;
61         u32 bounds = 0;
62         int ret;
63
64         if (asyh->ovly.cpp) {
65                 switch (asyh->ovly.cpp) {
66                 case 4: bounds |= 0x00000300; break;
67                 case 2: bounds |= 0x00000100; break;
68                 default:
69                         WARN_ON(1);
70                         break;
71                 }
72                 bounds |= 0x00000001;
73         } else {
74                 bounds |= 0x00000100;
75         }
76
77         if ((ret = PUSH_WAIT(push, 2)))
78                 return ret;
79
80         PUSH_NVSQ(push, NV507D, 0x0904 + (i * 0x400), bounds);
81         return 0;
82 }
83
84 int
85 head507d_base(struct nv50_head *head, struct nv50_head_atom *asyh)
86 {
87         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
88         const int i = head->base.index;
89         u32 bounds = 0;
90         int ret;
91
92         if (asyh->base.cpp) {
93                 switch (asyh->base.cpp) {
94                 case 8: bounds |= 0x00000500; break;
95                 case 4: bounds |= 0x00000300; break;
96                 case 2: bounds |= 0x00000100; break;
97                 case 1: bounds |= 0x00000000; break;
98                 default:
99                         WARN_ON(1);
100                         break;
101                 }
102                 bounds |= 0x00000001;
103         }
104
105         if ((ret = PUSH_WAIT(push, 2)))
106                 return ret;
107
108         PUSH_NVSQ(push, NV507D, 0x0900 + (i * 0x400), bounds);
109         return 0;
110 }
111
112 static int
113 head507d_curs_clr(struct nv50_head *head)
114 {
115         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
116         const int i = head->base.index;
117         int ret;
118
119         if ((ret = PUSH_WAIT(push, 2)))
120                 return ret;
121
122         PUSH_NVSQ(push, NV507D, 0x0880 + (i * 0x400), 0x05000000);
123         return 0;
124 }
125
126 static int
127 head507d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
128 {
129         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
130         const int i = head->base.index;
131         int ret;
132
133         if ((ret = PUSH_WAIT(push, 3)))
134                 return ret;
135
136         PUSH_NVSQ(push, NV507D, 0x0880 + (i * 0x400), 0x80000000 |
137                                                       asyh->curs.layout << 26 |
138                                                       asyh->curs.format << 24,
139                                 0x0884 + (i * 0x400), asyh->curs.offset >> 8);
140         return 0;
141 }
142
143 int
144 head507d_curs_format(struct nv50_head *head, struct nv50_wndw_atom *asyw,
145                      struct nv50_head_atom *asyh)
146 {
147         switch (asyw->image.format) {
148         case 0xcf: asyh->curs.format = 1; break;
149         default:
150                 WARN_ON(1);
151                 return -EINVAL;
152         }
153         return 0;
154 }
155
156 int
157 head507d_curs_layout(struct nv50_head *head, struct nv50_wndw_atom *asyw,
158                      struct nv50_head_atom *asyh)
159 {
160         switch (asyw->image.w) {
161         case 32: asyh->curs.layout = 0; break;
162         case 64: asyh->curs.layout = 1; break;
163         default:
164                 return -EINVAL;
165         }
166         return 0;
167 }
168
169 int
170 head507d_core_clr(struct nv50_head *head)
171 {
172         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
173         const int i = head->base.index;
174         int ret;
175
176         if ((ret = PUSH_WAIT(push, 2)))
177                 return ret;
178
179         PUSH_NVSQ(push, NV507D, 0x0874 + (i * 0x400), 0x00000000);
180         return 0;
181 }
182
183 static int
184 head507d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
185 {
186         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
187         const int i = head->base.index;
188         int ret;
189
190         if ((ret = PUSH_WAIT(push, 9)))
191                 return ret;
192
193         PUSH_NVSQ(push, NV507D, 0x0860 + (i * 0x400), asyh->core.offset >> 8);
194         PUSH_NVSQ(push, NV507D, 0x0868 + (i * 0x400), asyh->core.h << 16 | asyh->core.w,
195                                 0x086c + (i * 0x400), asyh->core.layout << 20 |
196                                                      (asyh->core.pitch >> 8) << 8 |
197                                                       asyh->core.blocks << 8 |
198                                                       asyh->core.blockh,
199                                 0x0870 + (i * 0x400), asyh->core.kind << 16 |
200                                                       asyh->core.format << 8,
201                                 0x0874 + (i * 0x400), asyh->core.handle);
202         PUSH_NVSQ(push, NV507D, 0x08c0 + (i * 0x400), asyh->core.y << 16 | asyh->core.x);
203
204         /* EVO will complain with INVALID_STATE if we have an
205          * active cursor and (re)specify HeadSetContextDmaIso
206          * without also updating HeadSetOffsetCursor.
207          */
208         asyh->set.curs = asyh->curs.visible;
209         asyh->set.olut = asyh->olut.handle != 0;
210         return 0;
211 }
212
213 void
214 head507d_core_calc(struct nv50_head *head, struct nv50_head_atom *asyh)
215 {
216         struct nv50_disp *disp = nv50_disp(head->base.base.dev);
217         if ((asyh->core.visible = (asyh->base.cpp != 0))) {
218                 asyh->core.x = asyh->base.x;
219                 asyh->core.y = asyh->base.y;
220                 asyh->core.w = asyh->base.w;
221                 asyh->core.h = asyh->base.h;
222         } else
223         if ((asyh->core.visible = (asyh->ovly.cpp != 0)) ||
224             (asyh->core.visible = asyh->curs.visible)) {
225                 /*XXX: We need to either find some way of having the
226                  *     primary base layer appear black, while still
227                  *     being able to display the other layers, or we
228                  *     need to allocate a dummy black surface here.
229                  */
230                 asyh->core.x = 0;
231                 asyh->core.y = 0;
232                 asyh->core.w = asyh->state.mode.hdisplay;
233                 asyh->core.h = asyh->state.mode.vdisplay;
234         }
235         asyh->core.handle = disp->core->chan.vram.handle;
236         asyh->core.offset = 0;
237         asyh->core.format = 0xcf;
238         asyh->core.kind = 0;
239         asyh->core.layout = 1;
240         asyh->core.blockh = 0;
241         asyh->core.blocks = 0;
242         asyh->core.pitch = ALIGN(asyh->core.w, 64) * 4;
243 }
244
245 static int
246 head507d_olut_clr(struct nv50_head *head)
247 {
248         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
249         const int i = head->base.index;
250         int ret;
251
252         if ((ret = PUSH_WAIT(push, 2)))
253                 return ret;
254
255         PUSH_NVSQ(push, NV507D, 0x0840 + (i * 0x400), 0x00000000);
256         return 0;
257 }
258
259 static int
260 head507d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
261 {
262         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
263         const int i = head->base.index;
264         int ret;
265
266         if ((ret = PUSH_WAIT(push, 3)))
267                 return ret;
268
269         PUSH_NVSQ(push, NV507D, 0x0840 + (i * 0x400), 0x80000000 | asyh->olut.mode << 30,
270                                 0x0844 + (i * 0x400), asyh->olut.offset >> 8);
271         return 0;
272 }
273
274 static void
275 head507d_olut_load(struct drm_color_lut *in, int size, void __iomem *mem)
276 {
277         for (; size--; in++, mem += 8) {
278                 writew(drm_color_lut_extract(in->  red, 11) << 3, mem + 0);
279                 writew(drm_color_lut_extract(in->green, 11) << 3, mem + 2);
280                 writew(drm_color_lut_extract(in-> blue, 11) << 3, mem + 4);
281         }
282
283         /* INTERPOLATE modes require a "next" entry to interpolate with,
284          * so we replicate the last entry to deal with this for now.
285          */
286         writew(readw(mem - 8), mem + 0);
287         writew(readw(mem - 6), mem + 2);
288         writew(readw(mem - 4), mem + 4);
289 }
290
291 bool
292 head507d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
293 {
294         if (size != 256)
295                 return false;
296
297         if (asyh->base.cpp == 1)
298                 asyh->olut.mode = 0;
299         else
300                 asyh->olut.mode = 1;
301
302         asyh->olut.load = head507d_olut_load;
303         return true;
304 }
305
306 int
307 head507d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
308 {
309         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
310         struct nv50_head_mode *m = &asyh->mode;
311         const int i = head->base.index;
312         int ret;
313
314         if ((ret = PUSH_WAIT(push, 13)))
315                 return ret;
316
317         PUSH_NVSQ(push, NV507D, 0x0804 + (i * 0x400), 0x00800000 | m->clock,
318                                 0x0808 + (i * 0x400), m->interlace ? 0x00000002 : 0x00000000);
319         PUSH_NVSQ(push, NV507D, 0x0810 + (i * 0x400), 0x00000000,
320                                 0x0814 + (i * 0x400), m->v.active  << 16 | m->h.active,
321                                 0x0818 + (i * 0x400), m->v.synce   << 16 | m->h.synce,
322                                 0x081c + (i * 0x400), m->v.blanke  << 16 | m->h.blanke,
323                                 0x0820 + (i * 0x400), m->v.blanks  << 16 | m->h.blanks,
324                                 0x0824 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s,
325                                 0x0828 + (i * 0x400), asyh->mode.v.blankus);
326         PUSH_NVSQ(push, NV507D, 0x082c + (i * 0x400), 0x00000000);
327         return 0;
328 }
329
330 int
331 head507d_view(struct nv50_head *head, struct nv50_head_atom *asyh)
332 {
333         struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
334         const int i = head->base.index;
335         int ret;
336
337         if ((ret = PUSH_WAIT(push, 7)))
338                 return ret;
339
340         PUSH_NVSQ(push, NV507D, 0x08a4 + (i * 0x400), 0x00000000);
341         PUSH_NVSQ(push, NV507D, 0x08c8 + (i * 0x400), asyh->view.iH << 16 | asyh->view.iW);
342         PUSH_NVSQ(push, NV507D, 0x08d8 + (i * 0x400), asyh->view.oH << 16 | asyh->view.oW,
343                                 0x08dc + (i * 0x400), asyh->view.oH << 16 | asyh->view.oW);
344         return 0;
345 }
346
347 const struct nv50_head_func
348 head507d = {
349         .view = head507d_view,
350         .mode = head507d_mode,
351         .olut = head507d_olut,
352         .olut_size = 256,
353         .olut_set = head507d_olut_set,
354         .olut_clr = head507d_olut_clr,
355         .core_calc = head507d_core_calc,
356         .core_set = head507d_core_set,
357         .core_clr = head507d_core_clr,
358         .curs_layout = head507d_curs_layout,
359         .curs_format = head507d_curs_format,
360         .curs_set = head507d_curs_set,
361         .curs_clr = head507d_curs_clr,
362         .base = head507d_base,
363         .ovly = head507d_ovly,
364         .dither = head507d_dither,
365         .procamp = head507d_procamp,
366 };