2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
28 struct nv50_therm_priv {
29 struct nouveau_therm_priv base;
33 pwm_info(struct nouveau_therm *therm, int *line, int *ctrl, int *indx)
50 nv_error(therm, "unknown pwm ctrl for gpio %d\n", *line);
58 nv50_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable)
60 u32 data = enable ? 0x00000001 : 0x00000000;
61 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
63 nv_mask(therm, ctrl, 0x00010001 << line, data << line);
68 nv50_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty)
70 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
74 if (nv_rd32(therm, ctrl) & (1 << line)) {
75 *divs = nv_rd32(therm, 0x00e114 + (id * 8));
76 *duty = nv_rd32(therm, 0x00e118 + (id * 8));
84 nv50_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty)
86 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
90 nv_wr32(therm, 0x00e114 + (id * 8), divs);
91 nv_wr32(therm, 0x00e118 + (id * 8), duty | 0x80000000);
96 nv50_fan_pwm_clock(struct nouveau_therm *therm)
98 int chipset = nv_device(therm)->chipset;
99 int crystal = nv_device(therm)->crystal;
102 /* determine the PWM source clock */
103 if (chipset > 0x50 && chipset < 0x94) {
104 u8 pwm_div = nv_rd32(therm, 0x410c);
105 if (nv_rd32(therm, 0xc040) & 0x800000) {
106 /* Use the HOST clock (100 MHz)
107 * Where does this constant(2.4) comes from? */
108 pwm_clock = (100000000 >> pwm_div) * 10 / 24;
110 /* Where does this constant(20) comes from? */
111 pwm_clock = (crystal * 1000) >> pwm_div;
115 pwm_clock = (crystal * 1000) / 20;
122 nv50_sensor_setup(struct nouveau_therm *therm)
124 nv_mask(therm, 0x20010, 0x40000000, 0x0);
125 mdelay(20); /* wait for the temperature to stabilize */
129 nv50_temp_get(struct nouveau_therm *therm)
131 struct nouveau_therm_priv *priv = (void *)therm;
132 struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
135 core_temp = nv_rd32(therm, 0x20014) & 0x3fff;
137 /* if the slope or the offset is unset, do no use the sensor */
138 if (!sensor->slope_div || !sensor->slope_mult ||
139 !sensor->offset_num || !sensor->offset_den)
142 core_temp = core_temp * sensor->slope_mult / sensor->slope_div;
143 core_temp = core_temp + sensor->offset_num / sensor->offset_den;
144 core_temp = core_temp + sensor->offset_constant - 8;
146 /* reserve negative temperatures for errors */
154 nv50_therm_ctor(struct nouveau_object *parent,
155 struct nouveau_object *engine,
156 struct nouveau_oclass *oclass, void *data, u32 size,
157 struct nouveau_object **pobject)
159 struct nv50_therm_priv *priv;
162 ret = nouveau_therm_create(parent, engine, oclass, &priv);
163 *pobject = nv_object(priv);
167 priv->base.base.pwm_ctrl = nv50_fan_pwm_ctrl;
168 priv->base.base.pwm_get = nv50_fan_pwm_get;
169 priv->base.base.pwm_set = nv50_fan_pwm_set;
170 priv->base.base.pwm_clock = nv50_fan_pwm_clock;
171 priv->base.base.temp_get = nv50_temp_get;
172 priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
173 nv_subdev(priv)->intr = nv40_therm_intr;
175 return nouveau_therm_preinit(&priv->base.base);
179 nv50_therm_init(struct nouveau_object *object)
181 struct nouveau_therm *therm = (void *)object;
183 nv50_sensor_setup(therm);
185 return _nouveau_therm_init(object);
188 struct nouveau_oclass
189 nv50_therm_oclass = {
190 .handle = NV_SUBDEV(THERM, 0x50),
191 .ofuncs = &(struct nouveau_ofuncs) {
192 .ctor = nv50_therm_ctor,
193 .dtor = _nouveau_therm_dtor,
194 .init = nv50_therm_init,
195 .fini = _nouveau_therm_fini,