2 * Copyright 2012 Red Hat Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 #include <subdev/ltcg.h>
26 #include <subdev/fb.h>
27 #include <subdev/timer.h>
29 struct nvc0_ltcg_priv {
30 struct nouveau_ltcg base;
34 struct nouveau_mm tags;
36 struct nouveau_mm_node *tag_ram;
40 nvc0_ltcg_subp_isr(struct nvc0_ltcg_priv *priv, int unit, int subp)
42 u32 subp_base = 0x141000 + (unit * 0x2000) + (subp * 0x400);
43 u32 stat = nv_rd32(priv, subp_base + 0x020);
46 nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", unit, subp, stat);
47 nv_wr32(priv, subp_base + 0x020, stat);
52 nvc0_ltcg_intr(struct nouveau_subdev *subdev)
54 struct nvc0_ltcg_priv *priv = (void *)subdev;
57 units = nv_rd32(priv, 0x00017c);
59 u32 subp, unit = ffs(units) - 1;
60 for (subp = 0; subp < priv->subp_nr; subp++)
61 nvc0_ltcg_subp_isr(priv, unit, subp);
62 units &= ~(1 << unit);
65 /* we do something horribly wrong and upset PMFB a lot, so mask off
66 * interrupts from it after the first one until it's fixed
68 nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
72 nvc0_ltcg_tags_alloc(struct nouveau_ltcg *ltcg, u32 n,
73 struct nouveau_mm_node **pnode)
75 struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
78 ret = nouveau_mm_head(&priv->tags, 1, n, n, 1, pnode);
86 nvc0_ltcg_tags_free(struct nouveau_ltcg *ltcg, struct nouveau_mm_node **pnode)
88 struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
90 nouveau_mm_free(&priv->tags, pnode);
94 nvc0_ltcg_tags_clear(struct nouveau_ltcg *ltcg, u32 first, u32 count)
96 struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
97 u32 last = first + count - 1;
100 BUG_ON((first > last) || (last >= priv->num_tags));
102 nv_wr32(priv, 0x17e8cc, first);
103 nv_wr32(priv, 0x17e8d0, last);
104 nv_wr32(priv, 0x17e8c8, 0x4); /* trigger clear */
106 /* wait until it's finished with clearing */
107 for (p = 0; p < priv->part_nr; ++p) {
108 if (!(priv->part_mask & (1 << p)))
110 for (i = 0; i < priv->subp_nr; ++i)
111 nv_wait(priv, 0x1410c8 + p * 0x2000 + i * 0x400, ~0, 0);
115 /* TODO: Figure out tag memory details and drop the over-cautious allocation.
118 nvc0_ltcg_init_tag_ram(struct nouveau_fb *pfb, struct nvc0_ltcg_priv *priv)
120 u32 tag_size, tag_margin, tag_align;
123 nv_wr32(priv, 0x17e8d8, priv->part_nr);
125 /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
126 priv->num_tags = (pfb->ram.size >> 17) / 4;
127 if (priv->num_tags > (1 << 17))
128 priv->num_tags = 1 << 17; /* we have 17 bits in PTE */
129 priv->num_tags = (priv->num_tags + 63) & ~63; /* round up to 64 */
131 tag_align = priv->part_nr * 0x800;
132 tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align;
134 /* 4 part 4 sub: 0x2000 bytes for 56 tags */
135 /* 3 part 4 sub: 0x6000 bytes for 168 tags */
137 * About 147 bytes per tag. Let's be safe and allocate x2, which makes
138 * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
140 * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
142 tag_size = (priv->num_tags / 64) * 0x6000 + tag_margin;
143 tag_size += tag_align;
144 tag_size = (tag_size + 0xfff) >> 12; /* round up */
146 ret = nouveau_mm_tail(&pfb->vram, 0, tag_size, tag_size, 1,
151 u64 tag_base = (priv->tag_ram->offset << 12) + tag_margin;
153 tag_base += tag_align - 1;
154 ret = do_div(tag_base, tag_align);
156 nv_wr32(priv, 0x17e8d4, tag_base);
158 ret = nouveau_mm_init(&priv->tags, 0, priv->num_tags, 1);
164 nvc0_ltcg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
165 struct nouveau_oclass *oclass, void *data, u32 size,
166 struct nouveau_object **pobject)
168 struct nvc0_ltcg_priv *priv;
169 struct nouveau_fb *pfb = nouveau_fb(parent);
172 ret = nouveau_ltcg_create(parent, engine, oclass, &priv);
173 *pobject = nv_object(priv);
177 priv->part_nr = nv_rd32(priv, 0x022438);
178 priv->part_mask = nv_rd32(priv, 0x022554);
180 priv->subp_nr = nv_rd32(priv, 0x17e8dc) >> 28;
182 nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
184 ret = nvc0_ltcg_init_tag_ram(pfb, priv);
188 priv->base.tags_alloc = nvc0_ltcg_tags_alloc;
189 priv->base.tags_free = nvc0_ltcg_tags_free;
190 priv->base.tags_clear = nvc0_ltcg_tags_clear;
192 nv_subdev(priv)->intr = nvc0_ltcg_intr;
197 nvc0_ltcg_dtor(struct nouveau_object *object)
199 struct nouveau_ltcg *ltcg = (struct nouveau_ltcg *)object;
200 struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
201 struct nouveau_fb *pfb = nouveau_fb(ltcg->base.base.parent);
203 nouveau_mm_fini(&priv->tags);
204 nouveau_mm_free(&pfb->vram, &priv->tag_ram);
206 nouveau_ltcg_destroy(ltcg);
209 struct nouveau_oclass
211 .handle = NV_SUBDEV(LTCG, 0xc0),
212 .ofuncs = &(struct nouveau_ofuncs) {
213 .ctor = nvc0_ltcg_ctor,
214 .dtor = nvc0_ltcg_dtor,
215 .init = _nouveau_ltcg_init,
216 .fini = _nouveau_ltcg_fini,