2 * Copyright 2014 Red Hat Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
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15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 #include <subdev/fb.h>
26 #include <subdev/timer.h>
31 gm107_ltcg_lts_isr(struct gf100_ltcg_priv *priv, int ltc, int lts)
33 u32 base = 0x140000 + (ltc * 0x2000) + (lts * 0x400);
34 u32 stat = nv_rd32(priv, base + 0x00c);
37 nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
38 nv_wr32(priv, base + 0x00c, stat);
43 gm107_ltcg_intr(struct nouveau_subdev *subdev)
45 struct gf100_ltcg_priv *priv = (void *)subdev;
48 mask = nv_rd32(priv, 0x00017c);
50 u32 lts, ltc = __ffs(mask);
51 for (lts = 0; lts < priv->lts_nr; lts++)
52 gm107_ltcg_lts_isr(priv, ltc, lts);
56 /* we do something horribly wrong and upset PMFB a lot, so mask off
57 * interrupts from it after the first one until it's fixed
59 nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
63 gm107_ltcg_tags_clear(struct nouveau_ltcg *ltcg, u32 first, u32 count)
65 struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
66 u32 last = first + count - 1;
69 BUG_ON((first > last) || (last >= priv->num_tags));
71 nv_wr32(priv, 0x17e270, first);
72 nv_wr32(priv, 0x17e274, last);
73 nv_wr32(priv, 0x17e26c, 0x4); /* trigger clear */
75 /* wait until it's finished with clearing */
76 for (p = 0; p < priv->ltc_nr; ++p) {
77 for (i = 0; i < priv->lts_nr; ++i)
78 nv_wait(priv, 0x14046c + p * 0x2000 + i * 0x200, ~0, 0);
83 gm107_ltcg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
84 struct nouveau_oclass *oclass, void *data, u32 size,
85 struct nouveau_object **pobject)
87 struct gf100_ltcg_priv *priv;
88 struct nouveau_fb *pfb = nouveau_fb(parent);
92 ret = nouveau_ltcg_create(parent, engine, oclass, &priv);
93 *pobject = nv_object(priv);
97 parts = nv_rd32(priv, 0x022438);
98 mask = nv_rd32(priv, 0x021c14);
99 for (i = 0; i < parts; i++) {
100 if (!(mask & (1 << i)))
103 priv->lts_nr = nv_rd32(priv, 0x17e280) >> 28;
105 ret = gf100_ltcg_init_tag_ram(pfb, priv);
109 priv->base.tags_alloc = gf100_ltcg_tags_alloc;
110 priv->base.tags_free = gf100_ltcg_tags_free;
111 priv->base.tags_clear = gm107_ltcg_tags_clear;
113 nv_subdev(priv)->intr = gm107_ltcg_intr;
118 gm107_ltcg_init(struct nouveau_object *object)
120 struct nouveau_ltcg *ltcg = (struct nouveau_ltcg *)object;
121 struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
124 ret = nouveau_ltcg_init(ltcg);
128 nv_wr32(priv, 0x17e27c, priv->ltc_nr);
129 nv_wr32(priv, 0x17e278, priv->tag_base);
133 struct nouveau_oclass *
134 gm107_ltcg_oclass = &(struct nouveau_oclass) {
135 .handle = NV_SUBDEV(LTCG, 0xff),
136 .ofuncs = &(struct nouveau_ofuncs) {
137 .ctor = gm107_ltcg_ctor,
138 .dtor = gf100_ltcg_dtor,
139 .init = gm107_ltcg_init,
140 .fini = _nouveau_ltcg_fini,