1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
6 #include <linux/delay.h>
7 #include <drm/drm_print.h>
12 #define DP_AUX_ENUM_STR(x) #x
14 struct dp_aux_private {
16 struct dp_catalog *catalog;
19 struct completion comp;
32 struct drm_dp_aux dp_aux;
35 static const char *dp_aux_get_error(u32 aux_error)
39 return DP_AUX_ENUM_STR(DP_AUX_ERR_NONE);
41 return DP_AUX_ENUM_STR(DP_AUX_ERR_ADDR);
43 return DP_AUX_ENUM_STR(DP_AUX_ERR_TOUT);
45 return DP_AUX_ENUM_STR(DP_AUX_ERR_NACK);
46 case DP_AUX_ERR_DEFER:
47 return DP_AUX_ENUM_STR(DP_AUX_ERR_DEFER);
48 case DP_AUX_ERR_NACK_DEFER:
49 return DP_AUX_ENUM_STR(DP_AUX_ERR_NACK_DEFER);
55 static u32 dp_aux_write(struct dp_aux_private *aux,
56 struct drm_dp_aux_msg *msg)
58 u32 data[4], reg, len;
59 u8 *msgdata = msg->buffer;
60 int const AUX_CMD_FIFO_LEN = 128;
69 * cmd fifo only has depth of 144 bytes
70 * limit buf length to 128 bytes here
72 if (len > AUX_CMD_FIFO_LEN) {
73 DRM_ERROR("buf size greater than allowed size of 128 bytes\n");
77 /* Pack cmd and write to HW */
78 data[0] = (msg->address >> 16) & 0xf; /* addr[19:16] */
80 data[0] |= BIT(4); /* R/W */
82 data[1] = (msg->address >> 8) & 0xff; /* addr[15:8] */
83 data[2] = msg->address & 0xff; /* addr[7:0] */
84 data[3] = (msg->size - 1) & 0xff; /* len[7:0] */
86 for (i = 0; i < len; i++) {
87 reg = (i < 4) ? data[i] : msgdata[i - 4];
88 /* index = 0, write */
89 reg = (((reg) << DP_AUX_DATA_OFFSET)
90 & DP_AUX_DATA_MASK) | DP_AUX_DATA_WRITE;
92 reg |= DP_AUX_DATA_INDEX_WRITE;
93 aux->catalog->aux_data = reg;
94 dp_catalog_aux_write_data(aux->catalog);
97 dp_catalog_aux_clear_trans(aux->catalog, false);
98 dp_catalog_aux_clear_hw_interrupts(aux->catalog);
100 reg = 0; /* Transaction number == 1 */
101 if (!aux->native) { /* i2c */
102 reg |= DP_AUX_TRANS_CTRL_I2C;
104 if (aux->no_send_addr)
105 reg |= DP_AUX_TRANS_CTRL_NO_SEND_ADDR;
107 if (aux->no_send_stop)
108 reg |= DP_AUX_TRANS_CTRL_NO_SEND_STOP;
111 reg |= DP_AUX_TRANS_CTRL_GO;
112 aux->catalog->aux_data = reg;
113 dp_catalog_aux_write_trans(aux->catalog);
118 static int dp_aux_cmd_fifo_tx(struct dp_aux_private *aux,
119 struct drm_dp_aux_msg *msg)
121 u32 ret, len, timeout;
122 int aux_timeout_ms = HZ/4;
124 reinit_completion(&aux->comp);
126 len = dp_aux_write(aux, msg);
128 DRM_ERROR("DP AUX write failed\n");
132 timeout = wait_for_completion_timeout(&aux->comp, aux_timeout_ms);
134 DRM_ERROR("aux %s timeout\n", (aux->read ? "read" : "write"));
138 if (aux->aux_error_num == DP_AUX_ERR_NONE) {
141 DRM_ERROR_RATELIMITED("aux err: %s\n",
142 dp_aux_get_error(aux->aux_error_num));
150 static void dp_aux_cmd_fifo_rx(struct dp_aux_private *aux,
151 struct drm_dp_aux_msg *msg)
158 dp_catalog_aux_clear_trans(aux->catalog, true);
160 data = DP_AUX_DATA_INDEX_WRITE; /* INDEX_WRITE */
161 data |= DP_AUX_DATA_READ; /* read */
163 aux->catalog->aux_data = data;
164 dp_catalog_aux_write_data(aux->catalog);
168 /* discard first byte */
169 data = dp_catalog_aux_read_data(aux->catalog);
171 for (i = 0; i < len; i++) {
172 data = dp_catalog_aux_read_data(aux->catalog);
173 *dp++ = (u8)((data >> DP_AUX_DATA_OFFSET) & 0xff);
175 actual_i = (data >> DP_AUX_DATA_INDEX_OFFSET) & 0xFF;
177 DRM_ERROR("Index mismatch: expected %d, found %d\n",
182 static void dp_aux_native_handler(struct dp_aux_private *aux)
186 if (isr & DP_INTR_AUX_I2C_DONE)
187 aux->aux_error_num = DP_AUX_ERR_NONE;
188 else if (isr & DP_INTR_WRONG_ADDR)
189 aux->aux_error_num = DP_AUX_ERR_ADDR;
190 else if (isr & DP_INTR_TIMEOUT)
191 aux->aux_error_num = DP_AUX_ERR_TOUT;
192 if (isr & DP_INTR_NACK_DEFER)
193 aux->aux_error_num = DP_AUX_ERR_NACK;
194 if (isr & DP_INTR_AUX_ERROR) {
195 aux->aux_error_num = DP_AUX_ERR_PHY;
196 dp_catalog_aux_clear_hw_interrupts(aux->catalog);
199 complete(&aux->comp);
202 static void dp_aux_i2c_handler(struct dp_aux_private *aux)
206 if (isr & DP_INTR_AUX_I2C_DONE) {
207 if (isr & (DP_INTR_I2C_NACK | DP_INTR_I2C_DEFER))
208 aux->aux_error_num = DP_AUX_ERR_NACK;
210 aux->aux_error_num = DP_AUX_ERR_NONE;
212 if (isr & DP_INTR_WRONG_ADDR)
213 aux->aux_error_num = DP_AUX_ERR_ADDR;
214 else if (isr & DP_INTR_TIMEOUT)
215 aux->aux_error_num = DP_AUX_ERR_TOUT;
216 if (isr & DP_INTR_NACK_DEFER)
217 aux->aux_error_num = DP_AUX_ERR_NACK_DEFER;
218 if (isr & DP_INTR_I2C_NACK)
219 aux->aux_error_num = DP_AUX_ERR_NACK;
220 if (isr & DP_INTR_I2C_DEFER)
221 aux->aux_error_num = DP_AUX_ERR_DEFER;
222 if (isr & DP_INTR_AUX_ERROR) {
223 aux->aux_error_num = DP_AUX_ERR_PHY;
224 dp_catalog_aux_clear_hw_interrupts(aux->catalog);
228 complete(&aux->comp);
231 static void dp_aux_update_offset_and_segment(struct dp_aux_private *aux,
232 struct drm_dp_aux_msg *input_msg)
234 u32 edid_address = 0x50;
235 u32 segment_address = 0x30;
236 bool i2c_read = input_msg->request &
237 (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
240 if (aux->native || i2c_read || ((input_msg->address != edid_address) &&
241 (input_msg->address != segment_address)))
245 data = input_msg->buffer;
246 if (input_msg->address == segment_address)
247 aux->segment = *data;
253 * dp_aux_transfer_helper() - helper function for EDID read transactions
255 * @aux: DP AUX private structure
256 * @input_msg: input message from DRM upstream APIs
257 * @send_seg: send the segment to sink
261 * This helper function is used to fix EDID reads for non-compliant
262 * sinks that do not handle the i2c middle-of-transaction flag correctly.
264 static void dp_aux_transfer_helper(struct dp_aux_private *aux,
265 struct drm_dp_aux_msg *input_msg,
268 struct drm_dp_aux_msg helper_msg;
269 u32 message_size = 0x10;
270 u32 segment_address = 0x30;
271 u32 const edid_block_length = 0x80;
272 bool i2c_mot = input_msg->request & DP_AUX_I2C_MOT;
273 bool i2c_read = input_msg->request &
274 (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
276 if (!i2c_mot || !i2c_read || (input_msg->size == 0))
280 * Sending the segment value and EDID offset will be performed
281 * from the DRM upstream EDID driver for each block. Avoid
282 * duplicate AUX transactions related to this while reading the
283 * first 16 bytes of each block.
285 if (!(aux->offset % edid_block_length) || !send_seg)
289 aux->cmd_busy = true;
290 aux->no_send_addr = true;
291 aux->no_send_stop = true;
294 * Send the segment address for every i2c read in which the
295 * middle-of-tranaction flag is set. This is required to support EDID
296 * reads of more than 2 blocks as the segment address is reset to 0
297 * since we are overriding the middle-of-transaction flag for read
302 memset(&helper_msg, 0, sizeof(helper_msg));
303 helper_msg.address = segment_address;
304 helper_msg.buffer = &aux->segment;
306 dp_aux_cmd_fifo_tx(aux, &helper_msg);
310 * Send the offset address for every i2c read in which the
311 * middle-of-transaction flag is set. This will ensure that the sink
312 * will update its read pointer and return the correct portion of the
313 * EDID buffer in the subsequent i2c read trasntion triggered in the
314 * native AUX transfer function.
316 memset(&helper_msg, 0, sizeof(helper_msg));
317 helper_msg.address = input_msg->address;
318 helper_msg.buffer = &aux->offset;
320 dp_aux_cmd_fifo_tx(aux, &helper_msg);
323 aux->offset += message_size;
324 if (aux->offset == 0x80 || aux->offset == 0x100)
325 aux->segment = 0x0; /* reset segment at end of block */
329 * This function does the real job to process an AUX transaction.
330 * It will call aux_reset() function to reset the AUX channel,
331 * if the waiting is timeout.
333 static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
334 struct drm_dp_aux_msg *msg)
337 int const aux_cmd_native_max = 16;
338 int const aux_cmd_i2c_max = 128;
339 struct dp_aux_private *aux = container_of(dp_aux,
340 struct dp_aux_private, dp_aux);
342 mutex_lock(&aux->mutex);
344 aux->native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ);
346 /* Ignore address only message */
347 if ((msg->size == 0) || (msg->buffer == NULL)) {
348 msg->reply = aux->native ?
349 DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK;
354 /* msg sanity check */
355 if ((aux->native && (msg->size > aux_cmd_native_max)) ||
356 (msg->size > aux_cmd_i2c_max)) {
357 DRM_ERROR("%s: invalid msg: size(%zu), request(%x)\n",
358 __func__, msg->size, msg->request);
363 dp_aux_update_offset_and_segment(aux, msg);
364 dp_aux_transfer_helper(aux, msg, true);
366 aux->read = msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
367 aux->cmd_busy = true;
370 aux->no_send_addr = true;
371 aux->no_send_stop = false;
373 aux->no_send_addr = true;
374 aux->no_send_stop = true;
377 ret = dp_aux_cmd_fifo_tx(aux, msg);
380 usleep_range(400, 500); /* at least 400us to next try */
384 if (aux->aux_error_num == DP_AUX_ERR_NONE) {
386 dp_aux_cmd_fifo_rx(aux, msg);
388 msg->reply = aux->native ?
389 DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK;
391 /* Reply defer to retry */
392 msg->reply = aux->native ?
393 DP_AUX_NATIVE_REPLY_DEFER : DP_AUX_I2C_REPLY_DEFER;
396 /* Return requested size for success or retry */
401 aux->cmd_busy = false;
402 mutex_unlock(&aux->mutex);
406 void dp_aux_isr(struct drm_dp_aux *dp_aux)
408 struct dp_aux_private *aux;
411 DRM_ERROR("invalid input\n");
415 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
417 aux->isr = dp_catalog_aux_get_irq(aux->catalog);
423 dp_aux_native_handler(aux);
425 dp_aux_i2c_handler(aux);
428 void dp_aux_reconfig(struct drm_dp_aux *dp_aux)
430 struct dp_aux_private *aux;
432 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
434 dp_catalog_aux_update_cfg(aux->catalog);
435 dp_catalog_aux_reset(aux->catalog);
438 void dp_aux_init(struct drm_dp_aux *dp_aux)
440 struct dp_aux_private *aux;
443 DRM_ERROR("invalid input\n");
447 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
449 dp_catalog_aux_enable(aux->catalog, true);
453 void dp_aux_deinit(struct drm_dp_aux *dp_aux)
455 struct dp_aux_private *aux;
457 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
459 dp_catalog_aux_enable(aux->catalog, false);
462 int dp_aux_register(struct drm_dp_aux *dp_aux)
464 struct dp_aux_private *aux;
468 DRM_ERROR("invalid input\n");
472 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
474 aux->dp_aux.name = "dpu_dp_aux";
475 aux->dp_aux.dev = aux->dev;
476 aux->dp_aux.transfer = dp_aux_transfer;
477 ret = drm_dp_aux_register(&aux->dp_aux);
479 DRM_ERROR("%s: failed to register drm aux: %d\n", __func__,
487 void dp_aux_unregister(struct drm_dp_aux *dp_aux)
489 drm_dp_aux_unregister(dp_aux);
492 struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog)
494 struct dp_aux_private *aux;
497 DRM_ERROR("invalid input\n");
498 return ERR_PTR(-ENODEV);
501 aux = devm_kzalloc(dev, sizeof(*aux), GFP_KERNEL);
503 return ERR_PTR(-ENOMEM);
505 init_completion(&aux->comp);
506 aux->cmd_busy = false;
507 mutex_init(&aux->mutex);
510 aux->catalog = catalog;
516 void dp_aux_put(struct drm_dp_aux *dp_aux)
518 struct dp_aux_private *aux;
523 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
525 mutex_destroy(&aux->mutex);
527 devm_kfree(aux->dev, aux);