1 /* SPDX-License-Identifier: GPL-2.0 */
3 * MGA Millennium (MGA2064W) functions
4 * MGA Mystique (MGA1064SG) functions
6 * Copyright 1996 The XFree86 Project, Inc.
14 * Guy DESBIEF, Aix-en-provence, France
15 * g.desbief@aix.pacwan.net
16 * MGA1064SG Mystique register file
22 #include <linux/bits.h>
24 #define MGAREG_DWGCTL 0x1c00
25 #define MGAREG_MACCESS 0x1c04
26 /* the following is a mystique only register */
27 #define MGAREG_MCTLWTST 0x1c08
28 #define MGAREG_ZORG 0x1c0c
30 #define MGAREG_PAT0 0x1c10
31 #define MGAREG_PAT1 0x1c14
32 #define MGAREG_PLNWT 0x1c1c
34 #define MGAREG_BCOL 0x1c20
35 #define MGAREG_FCOL 0x1c24
37 #define MGAREG_SRC0 0x1c30
38 #define MGAREG_SRC1 0x1c34
39 #define MGAREG_SRC2 0x1c38
40 #define MGAREG_SRC3 0x1c3c
42 #define MGAREG_XYSTRT 0x1c40
43 #define MGAREG_XYEND 0x1c44
45 #define MGAREG_SHIFT 0x1c50
46 /* the following is a mystique only register */
47 #define MGAREG_DMAPAD 0x1c54
48 #define MGAREG_SGN 0x1c58
49 #define MGAREG_LEN 0x1c5c
51 #define MGAREG_AR0 0x1c60
52 #define MGAREG_AR1 0x1c64
53 #define MGAREG_AR2 0x1c68
54 #define MGAREG_AR3 0x1c6c
55 #define MGAREG_AR4 0x1c70
56 #define MGAREG_AR5 0x1c74
57 #define MGAREG_AR6 0x1c78
59 #define MGAREG_CXBNDRY 0x1c80
60 #define MGAREG_FXBNDRY 0x1c84
61 #define MGAREG_YDSTLEN 0x1c88
62 #define MGAREG_PITCH 0x1c8c
64 #define MGAREG_YDST 0x1c90
65 #define MGAREG_YDSTORG 0x1c94
66 #define MGAREG_YTOP 0x1c98
67 #define MGAREG_YBOT 0x1c9c
69 #define MGAREG_CXLEFT 0x1ca0
70 #define MGAREG_CXRIGHT 0x1ca4
71 #define MGAREG_FXLEFT 0x1ca8
72 #define MGAREG_FXRIGHT 0x1cac
74 #define MGAREG_XDST 0x1cb0
76 #define MGAREG_DR0 0x1cc0
77 #define MGAREG_DR1 0x1cc4
78 #define MGAREG_DR2 0x1cc8
79 #define MGAREG_DR3 0x1ccc
81 #define MGAREG_DR4 0x1cd0
82 #define MGAREG_DR5 0x1cd4
83 #define MGAREG_DR6 0x1cd8
84 #define MGAREG_DR7 0x1cdc
86 #define MGAREG_DR8 0x1ce0
87 #define MGAREG_DR9 0x1ce4
88 #define MGAREG_DR10 0x1ce8
89 #define MGAREG_DR11 0x1cec
91 #define MGAREG_DR12 0x1cf0
92 #define MGAREG_DR13 0x1cf4
93 #define MGAREG_DR14 0x1cf8
94 #define MGAREG_DR15 0x1cfc
96 #define MGAREG_SRCORG 0x2cb4
97 #define MGAREG_DSTORG 0x2cb8
99 /* add or or this to one of the previous "power registers" to start
100 the drawing engine */
102 #define MGAREG_EXEC 0x0100
104 #define MGAREG_FIFOSTATUS 0x1e10
105 #define MGAREG_Status 0x1e14
106 #define MGAREG_CACHEFLUSH 0x1fff
107 #define MGAREG_ICLEAR 0x1e18
108 #define MGAREG_IEN 0x1e1c
110 #define MGAREG_VCOUNT 0x1e20
112 #define MGAREG_Reset 0x1e40
114 #define MGAREG_OPMODE 0x1e54
117 #define MGAREG_WIADDR 0x1dc0
118 #define MGAREG_WIADDR2 0x1dd8
119 #define MGAREG_WGETMSB 0x1dc8
120 #define MGAREG_WVRTXSZ 0x1dcc
121 #define MGAREG_WACCEPTSEQ 0x1dd4
122 #define MGAREG_WMISC 0x1e70
124 #define MGAREG_MEMCTL 0x2e08
126 /* OPMODE register additives */
128 #define MGAOPM_DMA_GENERAL (0x00 << 2)
129 #define MGAOPM_DMA_BLIT (0x01 << 2)
130 #define MGAOPM_DMA_VECTOR (0x10 << 2)
132 /* MACCESS register additives */
133 #define MGAMAC_PW8 0x00
134 #define MGAMAC_PW16 0x01
135 #define MGAMAC_PW24 0x03 /* not a typo */
136 #define MGAMAC_PW32 0x02 /* not a typo */
137 #define MGAMAC_BYPASS332 0x10000000
138 #define MGAMAC_NODITHER 0x40000000
139 #define MGAMAC_DIT555 0x80000000
141 /* DWGCTL register additives */
145 #define MGADWG_LINE_OPEN 0x00
146 #define MGADWG_AUTOLINE_OPEN 0x01
147 #define MGADWG_LINE_CLOSE 0x02
148 #define MGADWG_AUTOLINE_CLOSE 0x03
151 #define MGADWG_TRAP 0x04
152 #define MGADWG_TEXTURE_TRAP 0x06
156 #define MGADWG_BITBLT 0x08
157 #define MGADWG_FBITBLT 0x0c
158 #define MGADWG_ILOAD 0x09
159 #define MGADWG_ILOAD_SCALE 0x0d
160 #define MGADWG_ILOAD_FILTER 0x0f
161 #define MGADWG_ILOAD_HIQH 0x07
162 #define MGADWG_ILOAD_HIQHV 0x0e
163 #define MGADWG_IDUMP 0x0a
165 /* atype access to WRAM */
167 #define MGADWG_RPL ( 0x00 << 4 )
168 #define MGADWG_RSTR ( 0x01 << 4 )
169 #define MGADWG_ZI ( 0x03 << 4 )
170 #define MGADWG_BLK ( 0x04 << 4 )
171 #define MGADWG_I ( 0x07 << 4 )
173 /* specifies whether bit blits are linear or xy */
174 #define MGADWG_LINEAR ( 0x01 << 7 )
176 /* z drawing mode. use MGADWG_NOZCMP for always */
178 #define MGADWG_NOZCMP ( 0x00 << 8 )
179 #define MGADWG_ZE ( 0x02 << 8 )
180 #define MGADWG_ZNE ( 0x03 << 8 )
181 #define MGADWG_ZLT ( 0x04 << 8 )
182 #define MGADWG_ZLTE ( 0x05 << 8 )
183 #define MGADWG_GT ( 0x06 << 8 )
184 #define MGADWG_GTE ( 0x07 << 8 )
186 /* use this to force colour expansion circuitry to do its stuff */
188 #define MGADWG_SOLID ( 0x01 << 11 )
190 /* ar register at zero */
192 #define MGADWG_ARZERO ( 0x01 << 12 )
194 #define MGADWG_SGNZERO ( 0x01 << 13 )
196 #define MGADWG_SHIFTZERO ( 0x01 << 14 )
198 /* See table on 4-43 for bop ALU operations */
200 /* See table on 4-44 for translucidity masks */
202 #define MGADWG_BMONOLEF ( 0x00 << 25 )
203 #define MGADWG_BMONOWF ( 0x04 << 25 )
204 #define MGADWG_BPLAN ( 0x01 << 25 )
206 /* note that if bfcol is specified and you're doing a bitblt, it causes
207 a fbitblt to be performed, so check that you obey the fbitblt rules */
209 #define MGADWG_BFCOL ( 0x02 << 25 )
210 #define MGADWG_BUYUV ( 0x0e << 25 )
211 #define MGADWG_BU32BGR ( 0x03 << 25 )
212 #define MGADWG_BU32RGB ( 0x07 << 25 )
213 #define MGADWG_BU24BGR ( 0x0b << 25 )
214 #define MGADWG_BU24RGB ( 0x0f << 25 )
216 #define MGADWG_PATTERN ( 0x01 << 29 )
217 #define MGADWG_TRANSC ( 0x01 << 30 )
218 #define MGAREG_MISC_WRITE 0x3c2
219 #define MGAREG_MISC_READ 0x3cc
220 #define MGAREG_MEM_MISC_WRITE 0x1fc2
221 #define MGAREG_MEM_MISC_READ 0x1fcc
223 #define MGAREG_MISC_IOADSEL (0x1 << 0)
224 #define MGAREG_MISC_RAMMAPEN (0x1 << 1)
225 #define MGAREG_MISC_CLK_SEL_MASK GENMASK(3, 2)
226 #define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2)
227 #define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2)
228 #define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2)
229 #define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2)
230 #define MGAREG_MISC_VIDEO_DIS (0x1 << 4)
231 #define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5)
232 #define MGAREG_MISC_HSYNCPOL BIT(6)
233 #define MGAREG_MISC_VSYNCPOL BIT(7)
235 /* MMIO VGA registers */
236 #define MGAREG_SEQ_INDEX 0x1fc4
237 #define MGAREG_SEQ_DATA 0x1fc5
239 #define MGAREG_SEQ0_ASYNCRST BIT(0)
240 #define MGAREG_SEQ0_SYNCRST BIT(1)
242 #define MGAREG_SEQ1_SCROFF BIT(5)
244 #define MGAREG_CRTC_INDEX 0x1fd4
245 #define MGAREG_CRTC_DATA 0x1fd5
247 #define MGAREG_CRTC11_VINTCLR BIT(4)
248 #define MGAREG_CRTC11_VINTEN BIT(5)
249 #define MGAREG_CRTC11_CRTCPROTECT BIT(7)
251 #define MGAREG_CRTCEXT_INDEX 0x1fde
252 #define MGAREG_CRTCEXT_DATA 0x1fdf
254 #define MGAREG_CRTCEXT0_OFFSET_MASK GENMASK(5, 4)
256 #define MGAREG_CRTCEXT1_VSYNCOFF BIT(5)
257 #define MGAREG_CRTCEXT1_HSYNCOFF BIT(4)
259 /* Cursor X and Y position */
260 #define MGA_CURPOSXL 0x3c0c
261 #define MGA_CURPOSXH 0x3c0d
262 #define MGA_CURPOSYL 0x3c0e
263 #define MGA_CURPOSYH 0x3c0f
265 /* MGA bits for registers PCI_OPTION_REG */
266 #define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 )
267 #define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 )
268 #define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 )
269 #define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 )
271 #define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 )
272 #define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 )
273 #define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 )
275 #define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 )
276 #define MGA1064_OPT_VGA_ION ( 0x01 << 8 )
278 /* MGA registers in PCI config space */
279 #define PCI_MGA_INDEX 0x44
280 #define PCI_MGA_DATA 0x48
281 #define PCI_MGA_OPTION 0x40
282 #define PCI_MGA_OPTION2 0x50
283 #define PCI_MGA_OPTION3 0x54
285 #define RAMDAC_OFFSET 0x3c00
287 /* TVP3026 direct registers */
289 #define TVP3026_INDEX 0x00
290 #define TVP3026_WADR_PAL 0x00
291 #define TVP3026_COL_PAL 0x01
292 #define TVP3026_PIX_RD_MSK 0x02
293 #define TVP3026_RADR_PAL 0x03
294 #define TVP3026_CUR_COL_ADDR 0x04
295 #define TVP3026_CUR_COL_DATA 0x05
296 #define TVP3026_DATA 0x0a
297 #define TVP3026_CUR_RAM 0x0b
298 #define TVP3026_CUR_XLOW 0x0c
299 #define TVP3026_CUR_XHI 0x0d
300 #define TVP3026_CUR_YLOW 0x0e
301 #define TVP3026_CUR_YHI 0x0f
303 /* TVP3026 indirect registers */
305 #define TVP3026_SILICON_REV 0x01
306 #define TVP3026_CURSOR_CTL 0x06
307 #define TVP3026_LATCH_CTL 0x0f
308 #define TVP3026_TRUE_COLOR_CTL 0x18
309 #define TVP3026_MUX_CTL 0x19
310 #define TVP3026_CLK_SEL 0x1a
311 #define TVP3026_PAL_PAGE 0x1c
312 #define TVP3026_GEN_CTL 0x1d
313 #define TVP3026_MISC_CTL 0x1e
314 #define TVP3026_GEN_IO_CTL 0x2a
315 #define TVP3026_GEN_IO_DATA 0x2b
316 #define TVP3026_PLL_ADDR 0x2c
317 #define TVP3026_PIX_CLK_DATA 0x2d
318 #define TVP3026_MEM_CLK_DATA 0x2e
319 #define TVP3026_LOAD_CLK_DATA 0x2f
320 #define TVP3026_KEY_RED_LOW 0x32
321 #define TVP3026_KEY_RED_HI 0x33
322 #define TVP3026_KEY_GREEN_LOW 0x34
323 #define TVP3026_KEY_GREEN_HI 0x35
324 #define TVP3026_KEY_BLUE_LOW 0x36
325 #define TVP3026_KEY_BLUE_HI 0x37
326 #define TVP3026_KEY_CTL 0x38
327 #define TVP3026_MCLK_CTL 0x39
328 #define TVP3026_SENSE_TEST 0x3a
329 #define TVP3026_TEST_DATA 0x3b
330 #define TVP3026_CRC_LSB 0x3c
331 #define TVP3026_CRC_MSB 0x3d
332 #define TVP3026_CRC_CTL 0x3e
333 #define TVP3026_ID 0x3f
334 #define TVP3026_RESET 0xff
337 /* MGA1064 DAC Register file */
338 /* MGA1064 direct registers */
340 #define MGA1064_INDEX 0x00
341 #define MGA1064_WADR_PAL 0x00
342 #define MGA1064_SPAREREG 0x00
343 #define MGA1064_COL_PAL 0x01
344 #define MGA1064_PIX_RD_MSK 0x02
345 #define MGA1064_RADR_PAL 0x03
346 #define MGA1064_DATA 0x0a
348 #define MGA1064_CUR_XLOW 0x0c
349 #define MGA1064_CUR_XHI 0x0d
350 #define MGA1064_CUR_YLOW 0x0e
351 #define MGA1064_CUR_YHI 0x0f
353 /* MGA1064 indirect registers */
354 #define MGA1064_DVI_PIPE_CTL 0x03
355 #define MGA1064_CURSOR_BASE_ADR_LOW 0x04
356 #define MGA1064_CURSOR_BASE_ADR_HI 0x05
357 #define MGA1064_CURSOR_CTL 0x06
358 #define MGA1064_CURSOR_COL0_RED 0x08
359 #define MGA1064_CURSOR_COL0_GREEN 0x09
360 #define MGA1064_CURSOR_COL0_BLUE 0x0a
362 #define MGA1064_CURSOR_COL1_RED 0x0c
363 #define MGA1064_CURSOR_COL1_GREEN 0x0d
364 #define MGA1064_CURSOR_COL1_BLUE 0x0e
366 #define MGA1064_CURSOR_COL2_RED 0x010
367 #define MGA1064_CURSOR_COL2_GREEN 0x011
368 #define MGA1064_CURSOR_COL2_BLUE 0x012
370 #define MGA1064_VREF_CTL 0x018
372 #define MGA1064_MUL_CTL 0x19
373 #define MGA1064_MUL_CTL_8bits 0x0
374 #define MGA1064_MUL_CTL_15bits 0x01
375 #define MGA1064_MUL_CTL_16bits 0x02
376 #define MGA1064_MUL_CTL_24bits 0x03
377 #define MGA1064_MUL_CTL_32bits 0x04
378 #define MGA1064_MUL_CTL_2G8V16bits 0x05
379 #define MGA1064_MUL_CTL_G16V16bits 0x06
380 #define MGA1064_MUL_CTL_32_24bits 0x07
382 #define MGA1064_PIX_CLK_CTL 0x1a
383 #define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 )
384 #define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 )
385 #define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 )
386 #define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 )
387 #define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 )
388 #define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 )
390 #define MGA1064_GEN_CTL 0x1d
391 #define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS (0x01 << 5)
392 #define MGA1064_MISC_CTL 0x1e
393 #define MGA1064_MISC_CTL_DAC_EN ( 0x01 << 0 )
394 #define MGA1064_MISC_CTL_VGA ( 0x01 << 1 )
395 #define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 )
396 #define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 )
397 #define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 )
398 #define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 )
400 #define MGA1064_GEN_IO_CTL2 0x29
401 #define MGA1064_GEN_IO_CTL 0x2a
402 #define MGA1064_GEN_IO_DATA 0x2b
403 #define MGA1064_SYS_PLL_M 0x2c
404 #define MGA1064_SYS_PLL_N 0x2d
405 #define MGA1064_SYS_PLL_P 0x2e
406 #define MGA1064_SYS_PLL_STAT 0x2f
408 #define MGA1064_REMHEADCTL 0x30
409 #define MGA1064_REMHEADCTL_CLKDIS ( 0x01 << 0 )
410 #define MGA1064_REMHEADCTL_CLKSL_OFF ( 0x00 << 1 )
411 #define MGA1064_REMHEADCTL_CLKSL_PLL ( 0x01 << 1 )
412 #define MGA1064_REMHEADCTL_CLKSL_PCI ( 0x02 << 1 )
413 #define MGA1064_REMHEADCTL_CLKSL_MSK ( 0x03 << 1 )
415 #define MGA1064_REMHEADCTL2 0x31
417 #define MGA1064_ZOOM_CTL 0x38
418 #define MGA1064_SENSE_TST 0x3a
420 #define MGA1064_CRC_LSB 0x3c
421 #define MGA1064_CRC_MSB 0x3d
422 #define MGA1064_CRC_CTL 0x3e
423 #define MGA1064_COL_KEY_MSK_LSB 0x40
424 #define MGA1064_COL_KEY_MSK_MSB 0x41
425 #define MGA1064_COL_KEY_LSB 0x42
426 #define MGA1064_COL_KEY_MSB 0x43
427 #define MGA1064_PIX_PLLA_M 0x44
428 #define MGA1064_PIX_PLLA_N 0x45
429 #define MGA1064_PIX_PLLA_P 0x46
430 #define MGA1064_PIX_PLLB_M 0x48
431 #define MGA1064_PIX_PLLB_N 0x49
432 #define MGA1064_PIX_PLLB_P 0x4a
433 #define MGA1064_PIX_PLLC_M 0x4c
434 #define MGA1064_PIX_PLLC_N 0x4d
435 #define MGA1064_PIX_PLLC_P 0x4e
437 #define MGA1064_PIX_PLL_STAT 0x4f
439 /*Added for G450 dual head*/
441 #define MGA1064_VID_PLL_STAT 0x8c
442 #define MGA1064_VID_PLL_P 0x8D
443 #define MGA1064_VID_PLL_M 0x8E
444 #define MGA1064_VID_PLL_N 0x8F
446 /* Modified PLL for G200 Winbond (G200WB) */
447 #define MGA1064_WB_PIX_PLLC_M 0xb7
448 #define MGA1064_WB_PIX_PLLC_N 0xb6
449 #define MGA1064_WB_PIX_PLLC_P 0xb8
451 /* Modified PLL for G200 Maxim (G200EV) */
452 #define MGA1064_EV_PIX_PLLC_M 0xb6
453 #define MGA1064_EV_PIX_PLLC_N 0xb7
454 #define MGA1064_EV_PIX_PLLC_P 0xb8
456 /* Modified PLL for G200 EH */
457 #define MGA1064_EH_PIX_PLLC_M 0xb6
458 #define MGA1064_EH_PIX_PLLC_N 0xb7
459 #define MGA1064_EH_PIX_PLLC_P 0xb8
461 /* Modified PLL for G200 Maxim (G200ER) */
462 #define MGA1064_ER_PIX_PLLC_M 0xb7
463 #define MGA1064_ER_PIX_PLLC_N 0xb6
464 #define MGA1064_ER_PIX_PLLC_P 0xb8
466 #define MGA1064_DISP_CTL 0x8a
467 #define MGA1064_DISP_CTL_DAC1OUTSEL_MASK 0x01
468 #define MGA1064_DISP_CTL_DAC1OUTSEL_DIS 0x00
469 #define MGA1064_DISP_CTL_DAC1OUTSEL_EN 0x01
470 #define MGA1064_DISP_CTL_DAC2OUTSEL_MASK (0x03 << 2)
471 #define MGA1064_DISP_CTL_DAC2OUTSEL_DIS 0x00
472 #define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1 (0x01 << 2)
473 #define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2 (0x02 << 2)
474 #define MGA1064_DISP_CTL_DAC2OUTSEL_TVE (0x03 << 2)
475 #define MGA1064_DISP_CTL_PANOUTSEL_MASK (0x03 << 5)
476 #define MGA1064_DISP_CTL_PANOUTSEL_DIS 0x00
477 #define MGA1064_DISP_CTL_PANOUTSEL_CRTC1 (0x01 << 5)
478 #define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB (0x02 << 5)
479 #define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656 (0x03 << 5)
481 #define MGA1064_SYNC_CTL 0x8b
483 #define MGA1064_PWR_CTL 0xa0
484 #define MGA1064_PWR_CTL_DAC2_EN (0x01 << 0)
485 #define MGA1064_PWR_CTL_VID_PLL_EN (0x01 << 1)
486 #define MGA1064_PWR_CTL_PANEL_EN (0x01 << 2)
487 #define MGA1064_PWR_CTL_RFIFO_EN (0x01 << 3)
488 #define MGA1064_PWR_CTL_CFIFO_EN (0x01 << 4)
490 #define MGA1064_PAN_CTL 0xa2
493 #define MGAREG2_C2CTL 0x10
494 #define MGAREG2_C2HPARAM 0x14
495 #define MGAREG2_C2HSYNC 0x18
496 #define MGAREG2_C2VPARAM 0x1c
497 #define MGAREG2_C2VSYNC 0x20
498 #define MGAREG2_C2STARTADD0 0x28
500 #define MGAREG2_C2OFFSET 0x40
501 #define MGAREG2_C2DATACTL 0x4c
503 #define MGAREG_C2CTL 0x3c10
504 #define MGAREG_C2CTL_C2_EN 0x01
506 #define MGAREG_C2_HIPRILVL_M (0x07 << 4)
507 #define MGAREG_C2_MAXHIPRI_M (0x07 << 8)
509 #define MGAREG_C2CTL_PIXCLKSEL_MASK (0x03 << 1)
510 #define MGAREG_C2CTL_PIXCLKSELH_MASK (0x01 << 14)
511 #define MGAREG_C2CTL_PIXCLKSEL_PCICLK 0x00
512 #define MGAREG_C2CTL_PIXCLKSEL_VDOCLK (0x01 << 1)
513 #define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL (0x02 << 1)
514 #define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL (0x03 << 1)
515 #define MGAREG_C2CTL_PIXCLKSEL_VDCLK (0x01 << 14)
517 #define MGAREG_C2CTL_PIXCLKSEL_CRISTAL (0x01 << 1) | (0x01 << 14)
518 #define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL (0x02 << 1) | (0x01 << 14)
520 #define MGAREG_C2CTL_PIXCLKDIS_MASK (0x01 << 3)
521 #define MGAREG_C2CTL_PIXCLKDIS_DISABLE (0x01 << 3)
523 #define MGAREG_C2CTL_CRTCDACSEL_MASK (0x01 << 20)
524 #define MGAREG_C2CTL_CRTCDACSEL_CRTC1 0x00
525 #define MGAREG_C2CTL_CRTCDACSEL_CRTC2 (0x01 << 20)
527 #define MGAREG_C2HPARAM 0x3c14
528 #define MGAREG_C2HSYNC 0x3c18
529 #define MGAREG_C2VPARAM 0x3c1c
530 #define MGAREG_C2VSYNC 0x3c20
531 #define MGAREG_C2STARTADD0 0x3c28
533 #define MGAREG_C2OFFSET 0x3c40
534 #define MGAREG_C2DATACTL 0x3c4c
538 #define MGAREG_BESA1C3ORG 0x3d60
539 #define MGAREG_BESA1CORG 0x3d10
540 #define MGAREG_BESA1ORG 0x3d00
541 #define MGAREG_BESCTL 0x3d20
542 #define MGAREG_BESGLOBCTL 0x3dc0
543 #define MGAREG_BESHCOORD 0x3d28
544 #define MGAREG_BESHISCAL 0x3d30
545 #define MGAREG_BESHSRCEND 0x3d3c
546 #define MGAREG_BESHSRCLST 0x3d50
547 #define MGAREG_BESHSRCST 0x3d38
548 #define MGAREG_BESLUMACTL 0x3d40
549 #define MGAREG_BESPITCH 0x3d24
550 #define MGAREG_BESV1SRCLST 0x3d54
551 #define MGAREG_BESV1WGHT 0x3d48
552 #define MGAREG_BESVCOORD 0x3d2c
553 #define MGAREG_BESVISCAL 0x3d34
555 /* texture engine registers */
557 #define MGAREG_TMR0 0x2c00
558 #define MGAREG_TMR1 0x2c04
559 #define MGAREG_TMR2 0x2c08
560 #define MGAREG_TMR3 0x2c0c
561 #define MGAREG_TMR4 0x2c10
562 #define MGAREG_TMR5 0x2c14
563 #define MGAREG_TMR6 0x2c18
564 #define MGAREG_TMR7 0x2c1c
565 #define MGAREG_TMR8 0x2c20
566 #define MGAREG_TEXORG 0x2c24
567 #define MGAREG_TEXWIDTH 0x2c28
568 #define MGAREG_TEXHEIGHT 0x2c2c
569 #define MGAREG_TEXCTL 0x2c30
570 # define MGA_TW4 (0x00000000)
571 # define MGA_TW8 (0x00000001)
572 # define MGA_TW15 (0x00000002)
573 # define MGA_TW16 (0x00000003)
574 # define MGA_TW12 (0x00000004)
575 # define MGA_TW32 (0x00000006)
576 # define MGA_TW8A (0x00000007)
577 # define MGA_TW8AL (0x00000008)
578 # define MGA_TW422 (0x0000000A)
579 # define MGA_TW422UYVY (0x0000000B)
580 # define MGA_PITCHLIN (0x00000100)
581 # define MGA_NOPERSPECTIVE (0x00200000)
582 # define MGA_TAKEY (0x02000000)
583 # define MGA_TAMASK (0x04000000)
584 # define MGA_CLAMPUV (0x18000000)
585 # define MGA_TEXMODULATE (0x20000000)
586 #define MGAREG_TEXCTL2 0x2c3c
587 # define MGA_G400_TC2_MAGIC (0x00008000)
588 # define MGA_TC2_DECALBLEND (0x00000001)
589 # define MGA_TC2_IDECAL (0x00000002)
590 # define MGA_TC2_DECALDIS (0x00000004)
591 # define MGA_TC2_CKSTRANSDIS (0x00000010)
592 # define MGA_TC2_BORDEREN (0x00000020)
593 # define MGA_TC2_SPECEN (0x00000040)
594 # define MGA_TC2_DUALTEX (0x00000080)
595 # define MGA_TC2_TABLEFOG (0x00000100)
596 # define MGA_TC2_BUMPMAP (0x00000200)
597 # define MGA_TC2_SELECT_TMU1 (0x80000000)
598 #define MGAREG_TEXTRANS 0x2c34
599 #define MGAREG_TEXTRANSHIGH 0x2c38
600 #define MGAREG_TEXFILTER 0x2c58
601 # define MGA_MIN_NRST (0x00000000)
602 # define MGA_MIN_BILIN (0x00000002)
603 # define MGA_MIN_ANISO (0x0000000D)
604 # define MGA_MAG_NRST (0x00000000)
605 # define MGA_MAG_BILIN (0x00000020)
606 # define MGA_FILTERALPHA (0x00100000)
607 #define MGAREG_ALPHASTART 0x2c70
608 #define MGAREG_ALPHAXINC 0x2c74
609 #define MGAREG_ALPHAYINC 0x2c78
610 #define MGAREG_ALPHACTRL 0x2c7c
611 # define MGA_SRC_ZERO (0x00000000)
612 # define MGA_SRC_ONE (0x00000001)
613 # define MGA_SRC_DST_COLOR (0x00000002)
614 # define MGA_SRC_ONE_MINUS_DST_COLOR (0x00000003)
615 # define MGA_SRC_ALPHA (0x00000004)
616 # define MGA_SRC_ONE_MINUS_SRC_ALPHA (0x00000005)
617 # define MGA_SRC_DST_ALPHA (0x00000006)
618 # define MGA_SRC_ONE_MINUS_DST_ALPHA (0x00000007)
619 # define MGA_SRC_SRC_ALPHA_SATURATE (0x00000008)
620 # define MGA_SRC_BLEND_MASK (0x0000000f)
621 # define MGA_DST_ZERO (0x00000000)
622 # define MGA_DST_ONE (0x00000010)
623 # define MGA_DST_SRC_COLOR (0x00000020)
624 # define MGA_DST_ONE_MINUS_SRC_COLOR (0x00000030)
625 # define MGA_DST_SRC_ALPHA (0x00000040)
626 # define MGA_DST_ONE_MINUS_SRC_ALPHA (0x00000050)
627 # define MGA_DST_DST_ALPHA (0x00000060)
628 # define MGA_DST_ONE_MINUS_DST_ALPHA (0x00000070)
629 # define MGA_DST_BLEND_MASK (0x00000070)
630 # define MGA_ALPHACHANNEL (0x00000100)
631 # define MGA_VIDEOALPHA (0x00000200)
632 # define MGA_DIFFUSEDALPHA (0x01000000)
633 # define MGA_MODULATEDALPHA (0x02000000)
634 #define MGAREG_TDUALSTAGE0 (0x2CF8)
635 #define MGAREG_TDUALSTAGE1 (0x2CFC)
636 # define MGA_TDS_COLOR_ARG2_DIFFUSE (0x00000000)
637 # define MGA_TDS_COLOR_ARG2_SPECULAR (0x00000001)
638 # define MGA_TDS_COLOR_ARG2_FCOL (0x00000002)
639 # define MGA_TDS_COLOR_ARG2_PREVSTAGE (0x00000003)
640 # define MGA_TDS_COLOR_ALPHA_DIFFUSE (0x00000000)
641 # define MGA_TDS_COLOR_ALPHA_FCOL (0x00000004)
642 # define MGA_TDS_COLOR_ALPHA_CURRTEX (0x00000008)
643 # define MGA_TDS_COLOR_ALPHA_PREVTEX (0x0000000c)
644 # define MGA_TDS_COLOR_ALPHA_PREVSTAGE (0x00000010)
645 # define MGA_TDS_COLOR_ARG1_REPLICATEALPHA (0x00000020)
646 # define MGA_TDS_COLOR_ARG1_INV (0x00000040)
647 # define MGA_TDS_COLOR_ARG2_REPLICATEALPHA (0x00000080)
648 # define MGA_TDS_COLOR_ARG2_INV (0x00000100)
649 # define MGA_TDS_COLOR_ALPHA1INV (0x00000200)
650 # define MGA_TDS_COLOR_ALPHA2INV (0x00000400)
651 # define MGA_TDS_COLOR_ARG1MUL_ALPHA1 (0x00000800)
652 # define MGA_TDS_COLOR_ARG2MUL_ALPHA2 (0x00001000)
653 # define MGA_TDS_COLOR_ARG1ADD_MULOUT (0x00002000)
654 # define MGA_TDS_COLOR_ARG2ADD_MULOUT (0x00004000)
655 # define MGA_TDS_COLOR_MODBRIGHT_2X (0x00008000)
656 # define MGA_TDS_COLOR_MODBRIGHT_4X (0x00010000)
657 # define MGA_TDS_COLOR_ADD_SUB (0x00000000)
658 # define MGA_TDS_COLOR_ADD_ADD (0x00020000)
659 # define MGA_TDS_COLOR_ADD2X (0x00040000)
660 # define MGA_TDS_COLOR_ADDBIAS (0x00080000)
661 # define MGA_TDS_COLOR_BLEND (0x00100000)
662 # define MGA_TDS_COLOR_SEL_ARG1 (0x00000000)
663 # define MGA_TDS_COLOR_SEL_ARG2 (0x00200000)
664 # define MGA_TDS_COLOR_SEL_ADD (0x00400000)
665 # define MGA_TDS_COLOR_SEL_MUL (0x00600000)
666 # define MGA_TDS_ALPHA_ARG1_INV (0x00800000)
667 # define MGA_TDS_ALPHA_ARG2_DIFFUSE (0x00000000)
668 # define MGA_TDS_ALPHA_ARG2_FCOL (0x01000000)
669 # define MGA_TDS_ALPHA_ARG2_PREVTEX (0x02000000)
670 # define MGA_TDS_ALPHA_ARG2_PREVSTAGE (0x03000000)
671 # define MGA_TDS_ALPHA_ARG2_INV (0x04000000)
672 # define MGA_TDS_ALPHA_ADD (0x08000000)
673 # define MGA_TDS_ALPHA_ADDBIAS (0x10000000)
674 # define MGA_TDS_ALPHA_ADD2X (0x20000000)
675 # define MGA_TDS_ALPHA_SEL_ARG1 (0x00000000)
676 # define MGA_TDS_ALPHA_SEL_ARG2 (0x40000000)
677 # define MGA_TDS_ALPHA_SEL_ADD (0x80000000)
678 # define MGA_TDS_ALPHA_SEL_MUL (0xc0000000)
680 #define MGAREG_DWGSYNC 0x2c4c
682 #define MGAREG_AGP_PLL 0x1e4c
683 #define MGA_AGP2XPLL_ENABLE 0x1
684 #define MGA_AGP2XPLL_DISABLE 0x0