drivers/gpu/drm/mediatek/mtk_dpi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2014 MediaTek Inc.
   4  * Author: Jie Qiu <jie.qiu@mediatek.com>
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/component.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/kernel.h>
  11 #include <linux/of.h>
  12 #include <linux/of_device.h>
  13 #include <linux/of_gpio.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/pinctrl/consumer.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/types.h>
  18
  19 #include <video/videomode.h>
  20
  21 #include <drm/drm_atomic_helper.h>
  22 #include <drm/drm_bridge.h>
  23 #include <drm/drm_bridge_connector.h>
  24 #include <drm/drm_crtc.h>
  25 #include <drm/drm_of.h>
  26 #include <drm/drm_simple_kms_helper.h>
  27
  28 #include "mtk_disp_drv.h"
  29 #include "mtk_dpi_regs.h"
  30 #include "mtk_drm_ddp_comp.h"
  31
  32 enum mtk_dpi_out_bit_num {
  33         MTK_DPI_OUT_BIT_NUM_8BITS,
  34         MTK_DPI_OUT_BIT_NUM_10BITS,
  35         MTK_DPI_OUT_BIT_NUM_12BITS,
  36         MTK_DPI_OUT_BIT_NUM_16BITS
  37 };
  38
  39 enum mtk_dpi_out_yc_map {
  40         MTK_DPI_OUT_YC_MAP_RGB,
  41         MTK_DPI_OUT_YC_MAP_CYCY,
  42         MTK_DPI_OUT_YC_MAP_YCYC,
  43         MTK_DPI_OUT_YC_MAP_CY,
  44         MTK_DPI_OUT_YC_MAP_YC
  45 };
  46
  47 enum mtk_dpi_out_channel_swap {
  48         MTK_DPI_OUT_CHANNEL_SWAP_RGB,
  49         MTK_DPI_OUT_CHANNEL_SWAP_GBR,
  50         MTK_DPI_OUT_CHANNEL_SWAP_BRG,
  51         MTK_DPI_OUT_CHANNEL_SWAP_RBG,
  52         MTK_DPI_OUT_CHANNEL_SWAP_GRB,
  53         MTK_DPI_OUT_CHANNEL_SWAP_BGR
  54 };
  55
  56 enum mtk_dpi_out_color_format {
  57         MTK_DPI_COLOR_FORMAT_RGB,
  58         MTK_DPI_COLOR_FORMAT_RGB_FULL,
  59         MTK_DPI_COLOR_FORMAT_YCBCR_444,
  60         MTK_DPI_COLOR_FORMAT_YCBCR_422,
  61         MTK_DPI_COLOR_FORMAT_XV_YCC,
  62         MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL,
  63         MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL
  64 };
  65
  66 struct mtk_dpi {
  67         struct drm_encoder encoder;
  68         struct drm_bridge bridge;
  69         struct drm_bridge *next_bridge;
  70         struct drm_connector *connector;
  71         void __iomem *regs;
  72         struct device *dev;
  73         struct clk *engine_clk;
  74         struct clk *pixel_clk;
  75         struct clk *tvd_clk;
  76         int irq;
  77         struct drm_display_mode mode;
  78         const struct mtk_dpi_conf *conf;
  79         enum mtk_dpi_out_color_format color_format;
  80         enum mtk_dpi_out_yc_map yc_map;
  81         enum mtk_dpi_out_bit_num bit_num;
  82         enum mtk_dpi_out_channel_swap channel_swap;
  83         struct pinctrl *pinctrl;
  84         struct pinctrl_state *pins_gpio;
  85         struct pinctrl_state *pins_dpi;
  86         int refcount;
  87 };
  88
  89 static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b)
  90 {
  91         return container_of(b, struct mtk_dpi, bridge);
  92 }
  93
  94 enum mtk_dpi_polarity {
  95         MTK_DPI_POLARITY_RISING,
  96         MTK_DPI_POLARITY_FALLING,
  97 };
  98
  99 struct mtk_dpi_polarities {
 100         enum mtk_dpi_polarity de_pol;
 101         enum mtk_dpi_polarity ck_pol;
 102         enum mtk_dpi_polarity hsync_pol;
 103         enum mtk_dpi_polarity vsync_pol;
 104 };
 105
 106 struct mtk_dpi_sync_param {
 107         u32 sync_width;
 108         u32 front_porch;
 109         u32 back_porch;
 110         bool shift_half_line;
 111 };
 112
 113 struct mtk_dpi_yc_limit {
 114         u16 y_top;
 115         u16 y_bottom;
 116         u16 c_top;
 117         u16 c_bottom;
 118 };
 119
 120 struct mtk_dpi_conf {
 121         unsigned int (*cal_factor)(int clock);
 122         u32 reg_h_fre_con;
 123         bool edge_sel_en;
 124 };
 125
 126 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
 127 {
 128         u32 tmp = readl(dpi->regs + offset) & ~mask;
 129
 130         tmp |= (val & mask);
 131         writel(tmp, dpi->regs + offset);
 132 }
 133
 134 static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
 135 {
 136         mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
 137 }
 138
 139 static void mtk_dpi_enable(struct mtk_dpi *dpi)
 140 {
 141         mtk_dpi_mask(dpi, DPI_EN, EN, EN);
 142 }
 143
 144 static void mtk_dpi_disable(struct mtk_dpi *dpi)
 145 {
 146         mtk_dpi_mask(dpi, DPI_EN, 0, EN);
 147 }
 148
 149 static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
 150                                  struct mtk_dpi_sync_param *sync)
 151 {
 152         mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
 153                      sync->sync_width << HPW, HPW_MASK);
 154         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
 155                      sync->back_porch << HBP, HBP_MASK);
 156         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
 157                      HFP_MASK);
 158 }
 159
 160 static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
 161                                  struct mtk_dpi_sync_param *sync,
 162                                  u32 width_addr, u32 porch_addr)
 163 {
 164         mtk_dpi_mask(dpi, width_addr,
 165                      sync->sync_width << VSYNC_WIDTH_SHIFT,
 166                      VSYNC_WIDTH_MASK);
 167         mtk_dpi_mask(dpi, width_addr,
 168                      sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
 169                      VSYNC_HALF_LINE_MASK);
 170         mtk_dpi_mask(dpi, porch_addr,
 171                      sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
 172                      VSYNC_BACK_PORCH_MASK);
 173         mtk_dpi_mask(dpi, porch_addr,
 174                      sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
 175                      VSYNC_FRONT_PORCH_MASK);
 176 }
 177
 178 static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
 179                                       struct mtk_dpi_sync_param *sync)
 180 {
 181         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
 182 }
 183
 184 static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
 185                                        struct mtk_dpi_sync_param *sync)
 186 {
 187         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
 188                              DPI_TGEN_VPORCH_LEVEN);
 189 }
 190
 191 static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
 192                                       struct mtk_dpi_sync_param *sync)
 193 {
 194         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
 195                              DPI_TGEN_VPORCH_RODD);
 196 }
 197
 198 static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
 199                                        struct mtk_dpi_sync_param *sync)
 200 {
 201         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
 202                              DPI_TGEN_VPORCH_REVEN);
 203 }
 204
 205 static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
 206                                struct mtk_dpi_polarities *dpi_pol)
 207 {
 208         unsigned int pol;
 209
 210         pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
 211               (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
 212               (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
 213               (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
 214         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
 215                      CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
 216 }
 217
 218 static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
 219 {
 220         mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
 221 }
 222
 223 static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
 224 {
 225         mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
 226 }
 227
 228 static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
 229 {
 230         mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
 231         mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
 232 }
 233
 234 static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
 235                                          struct mtk_dpi_yc_limit *limit)
 236 {
 237         mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
 238                      Y_LIMINT_BOT_MASK);
 239         mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
 240                      Y_LIMINT_TOP_MASK);
 241         mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
 242                      C_LIMIT_BOT_MASK);
 243         mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
 244                      C_LIMIT_TOP_MASK);
 245 }
 246
 247 static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
 248                                    enum mtk_dpi_out_bit_num num)
 249 {
 250         u32 val;
 251
 252         switch (num) {
 253         case MTK_DPI_OUT_BIT_NUM_8BITS:
 254                 val = OUT_BIT_8;
 255                 break;
 256         case MTK_DPI_OUT_BIT_NUM_10BITS:
 257                 val = OUT_BIT_10;
 258                 break;
 259         case MTK_DPI_OUT_BIT_NUM_12BITS:
 260                 val = OUT_BIT_12;
 261                 break;
 262         case MTK_DPI_OUT_BIT_NUM_16BITS:
 263                 val = OUT_BIT_16;
 264                 break;
 265         default:
 266                 val = OUT_BIT_8;
 267                 break;
 268         }
 269         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
 270                      OUT_BIT_MASK);
 271 }
 272
 273 static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
 274                                   enum mtk_dpi_out_yc_map map)
 275 {
 276         u32 val;
 277
 278         switch (map) {
 279         case MTK_DPI_OUT_YC_MAP_RGB:
 280                 val = YC_MAP_RGB;
 281                 break;
 282         case MTK_DPI_OUT_YC_MAP_CYCY:
 283                 val = YC_MAP_CYCY;
 284                 break;
 285         case MTK_DPI_OUT_YC_MAP_YCYC:
 286                 val = YC_MAP_YCYC;
 287                 break;
 288         case MTK_DPI_OUT_YC_MAP_CY:
 289                 val = YC_MAP_CY;
 290                 break;
 291         case MTK_DPI_OUT_YC_MAP_YC:
 292                 val = YC_MAP_YC;
 293                 break;
 294         default:
 295                 val = YC_MAP_RGB;
 296                 break;
 297         }
 298
 299         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
 300 }
 301
 302 static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
 303                                         enum mtk_dpi_out_channel_swap swap)
 304 {
 305         u32 val;
 306
 307         switch (swap) {
 308         case MTK_DPI_OUT_CHANNEL_SWAP_RGB:
 309                 val = SWAP_RGB;
 310                 break;
 311         case MTK_DPI_OUT_CHANNEL_SWAP_GBR:
 312                 val = SWAP_GBR;
 313                 break;
 314         case MTK_DPI_OUT_CHANNEL_SWAP_BRG:
 315                 val = SWAP_BRG;
 316                 break;
 317         case MTK_DPI_OUT_CHANNEL_SWAP_RBG:
 318                 val = SWAP_RBG;
 319                 break;
 320         case MTK_DPI_OUT_CHANNEL_SWAP_GRB:
 321                 val = SWAP_GRB;
 322                 break;
 323         case MTK_DPI_OUT_CHANNEL_SWAP_BGR:
 324                 val = SWAP_BGR;
 325                 break;
 326         default:
 327                 val = SWAP_RGB;
 328                 break;
 329         }
 330
 331         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
 332 }
 333
 334 static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
 335 {
 336         mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
 337 }
 338
 339 static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
 340 {
 341         mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
 342 }
 343
 344 static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
 345 {
 346         mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
 347 }
 348
 349 static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
 350 {
 351         mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
 352 }
 353
 354 static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi)
 355 {
 356         if (dpi->conf->edge_sel_en)
 357                 mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);
 358 }
 359
 360 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
 361                                         enum mtk_dpi_out_color_format format)
 362 {
 363         if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_444) ||
 364             (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) {
 365                 mtk_dpi_config_yuv422_enable(dpi, false);
 366                 mtk_dpi_config_csc_enable(dpi, true);
 367                 mtk_dpi_config_swap_input(dpi, false);
 368                 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_BGR);
 369         } else if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_422) ||
 370                    (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) {
 371                 mtk_dpi_config_yuv422_enable(dpi, true);
 372                 mtk_dpi_config_csc_enable(dpi, true);
 373                 mtk_dpi_config_swap_input(dpi, true);
 374                 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
 375         } else {
 376                 mtk_dpi_config_yuv422_enable(dpi, false);
 377                 mtk_dpi_config_csc_enable(dpi, false);
 378                 mtk_dpi_config_swap_input(dpi, false);
 379                 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
 380         }
 381 }
 382
 383 static void mtk_dpi_power_off(struct mtk_dpi *dpi)
 384 {
 385         if (WARN_ON(dpi->refcount == 0))
 386                 return;
 387
 388         if (--dpi->refcount != 0)
 389                 return;
 390
 391         if (dpi->pinctrl && dpi->pins_gpio)
 392                 pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio);
 393
 394         mtk_dpi_disable(dpi);
 395         clk_disable_unprepare(dpi->pixel_clk);
 396         clk_disable_unprepare(dpi->engine_clk);
 397 }
 398
 399 static int mtk_dpi_power_on(struct mtk_dpi *dpi)
 400 {
 401         int ret;
 402
 403         if (++dpi->refcount != 1)
 404                 return 0;
 405
 406         ret = clk_prepare_enable(dpi->engine_clk);
 407         if (ret) {
 408                 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
 409                 goto err_refcount;
 410         }
 411
 412         ret = clk_prepare_enable(dpi->pixel_clk);
 413         if (ret) {
 414                 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
 415                 goto err_pixel;
 416         }
 417
 418         if (dpi->pinctrl && dpi->pins_dpi)
 419                 pinctrl_select_state(dpi->pinctrl, dpi->pins_dpi);
 420
 421         mtk_dpi_enable(dpi);
 422         return 0;
 423
 424 err_pixel:
 425         clk_disable_unprepare(dpi->engine_clk);
 426 err_refcount:
 427         dpi->refcount--;
 428         return ret;
 429 }
 430
 431 static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
 432                                     struct drm_display_mode *mode)
 433 {
 434         struct mtk_dpi_yc_limit limit;
 435         struct mtk_dpi_polarities dpi_pol;
 436         struct mtk_dpi_sync_param hsync;
 437         struct mtk_dpi_sync_param vsync_lodd = { 0 };
 438         struct mtk_dpi_sync_param vsync_leven = { 0 };
 439         struct mtk_dpi_sync_param vsync_rodd = { 0 };
 440         struct mtk_dpi_sync_param vsync_reven = { 0 };
 441         struct videomode vm = { 0 };
 442         unsigned long pll_rate;
 443         unsigned int factor;
 444
 445         /* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
 446         factor = dpi->conf->cal_factor(mode->clock);
 447         drm_display_mode_to_videomode(mode, &vm);
 448         pll_rate = vm.pixelclock * factor;
 449
 450         dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
 451                 pll_rate, vm.pixelclock);
 452
 453         clk_set_rate(dpi->tvd_clk, pll_rate);
 454         pll_rate = clk_get_rate(dpi->tvd_clk);
 455
 456         vm.pixelclock = pll_rate / factor;
 457         clk_set_rate(dpi->pixel_clk, vm.pixelclock);
 458         vm.pixelclock = clk_get_rate(dpi->pixel_clk);
 459
 460         dev_dbg(dpi->dev, "Got  PLL %lu Hz, pixel clock %lu Hz\n",
 461                 pll_rate, vm.pixelclock);
 462
 463         limit.c_bottom = 0x0010;
 464         limit.c_top = 0x0FE0;
 465         limit.y_bottom = 0x0010;
 466         limit.y_top = 0x0FE0;
 467
 468         dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING;
 469         dpi_pol.de_pol = MTK_DPI_POLARITY_RISING;
 470         dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ?
 471                             MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
 472         dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ?
 473                             MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
 474         hsync.sync_width = vm.hsync_len;
 475         hsync.back_porch = vm.hback_porch;
 476         hsync.front_porch = vm.hfront_porch;
 477         hsync.shift_half_line = false;
 478         vsync_lodd.sync_width = vm.vsync_len;
 479         vsync_lodd.back_porch = vm.vback_porch;
 480         vsync_lodd.front_porch = vm.vfront_porch;
 481         vsync_lodd.shift_half_line = false;
 482
 483         if (vm.flags & DISPLAY_FLAGS_INTERLACED &&
 484             mode->flags & DRM_MODE_FLAG_3D_MASK) {
 485                 vsync_leven = vsync_lodd;
 486                 vsync_rodd = vsync_lodd;
 487                 vsync_reven = vsync_lodd;
 488                 vsync_leven.shift_half_line = true;
 489                 vsync_reven.shift_half_line = true;
 490         } else if (vm.flags & DISPLAY_FLAGS_INTERLACED &&
 491                    !(mode->flags & DRM_MODE_FLAG_3D_MASK)) {
 492                 vsync_leven = vsync_lodd;
 493                 vsync_leven.shift_half_line = true;
 494         } else if (!(vm.flags & DISPLAY_FLAGS_INTERLACED) &&
 495                    mode->flags & DRM_MODE_FLAG_3D_MASK) {
 496                 vsync_rodd = vsync_lodd;
 497         }
 498         mtk_dpi_sw_reset(dpi, true);
 499         mtk_dpi_config_pol(dpi, &dpi_pol);
 500
 501         mtk_dpi_config_hsync(dpi, &hsync);
 502         mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
 503         mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
 504         mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
 505         mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
 506
 507         mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
 508         mtk_dpi_config_interface(dpi, !!(vm.flags &
 509                                          DISPLAY_FLAGS_INTERLACED));
 510         if (vm.flags & DISPLAY_FLAGS_INTERLACED)
 511                 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive >> 1);
 512         else
 513                 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
 514
 515         mtk_dpi_config_channel_limit(dpi, &limit);
 516         mtk_dpi_config_bit_num(dpi, dpi->bit_num);
 517         mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
 518         mtk_dpi_config_yc_map(dpi, dpi->yc_map);
 519         mtk_dpi_config_color_format(dpi, dpi->color_format);
 520         mtk_dpi_config_2n_h_fre(dpi);
 521         mtk_dpi_config_disable_edge(dpi);
 522         mtk_dpi_sw_reset(dpi, false);
 523
 524         return 0;
 525 }
 526
 527 static int mtk_dpi_bridge_attach(struct drm_bridge *bridge,
 528                                  enum drm_bridge_attach_flags flags)
 529 {
 530         struct mtk_dpi *dpi = bridge_to_dpi(bridge);
 531
 532         return drm_bridge_attach(bridge->encoder, dpi->next_bridge,
 533                                  &dpi->bridge, flags);
 534 }
 535
 536 static void mtk_dpi_bridge_mode_set(struct drm_bridge *bridge,
 537                                 const struct drm_display_mode *mode,
 538                                 const struct drm_display_mode *adjusted_mode)
 539 {
 540         struct mtk_dpi *dpi = bridge_to_dpi(bridge);
 541
 542         drm_mode_copy(&dpi->mode, adjusted_mode);
 543 }
 544
 545 static void mtk_dpi_bridge_disable(struct drm_bridge *bridge)
 546 {
 547         struct mtk_dpi *dpi = bridge_to_dpi(bridge);
 548
 549         mtk_dpi_power_off(dpi);
 550 }
 551
 552 static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
 553 {
 554         struct mtk_dpi *dpi = bridge_to_dpi(bridge);
 555
 556         mtk_dpi_power_on(dpi);
 557         mtk_dpi_set_display_mode(dpi, &dpi->mode);
 558 }
 559
 560 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
 561         .attach = mtk_dpi_bridge_attach,
 562         .mode_set = mtk_dpi_bridge_mode_set,
 563         .disable = mtk_dpi_bridge_disable,
 564         .enable = mtk_dpi_bridge_enable,
 565 };
 566
 567 void mtk_dpi_start(struct device *dev)
 568 {
 569         struct mtk_dpi *dpi = dev_get_drvdata(dev);
 570
 571         mtk_dpi_power_on(dpi);
 572 }
 573
 574 void mtk_dpi_stop(struct device *dev)
 575 {
 576         struct mtk_dpi *dpi = dev_get_drvdata(dev);
 577
 578         mtk_dpi_power_off(dpi);
 579 }
 580
 581 static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
 582 {
 583         struct mtk_dpi *dpi = dev_get_drvdata(dev);
 584         struct drm_device *drm_dev = data;
 585         int ret;
 586
 587         ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
 588                                       DRM_MODE_ENCODER_TMDS);
 589         if (ret) {
 590                 dev_err(dev, "Failed to initialize decoder: %d\n", ret);
 591                 return ret;
 592         }
 593
 594         dpi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->dev);
 595
 596         ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL,
 597                                 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
 598         if (ret) {
 599                 dev_err(dev, "Failed to attach bridge: %d\n", ret);
 600                 goto err_cleanup;
 601         }
 602
 603         dpi->connector = drm_bridge_connector_init(drm_dev, &dpi->encoder);
 604         if (IS_ERR(dpi->connector)) {
 605                 dev_err(dev, "Unable to create bridge connector\n");
 606                 ret = PTR_ERR(dpi->connector);
 607                 goto err_cleanup;
 608         }
 609         drm_connector_attach_encoder(dpi->connector, &dpi->encoder);
 610
 611         dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
 612         dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
 613         dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
 614         dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
 615
 616         return 0;
 617
 618 err_cleanup:
 619         drm_encoder_cleanup(&dpi->encoder);
 620         return ret;
 621 }
 622
 623 static void mtk_dpi_unbind(struct device *dev, struct device *master,
 624                            void *data)
 625 {
 626         struct mtk_dpi *dpi = dev_get_drvdata(dev);
 627
 628         drm_encoder_cleanup(&dpi->encoder);
 629 }
 630
 631 static const struct component_ops mtk_dpi_component_ops = {
 632         .bind = mtk_dpi_bind,
 633         .unbind = mtk_dpi_unbind,
 634 };
 635
 636 static unsigned int mt8173_calculate_factor(int clock)
 637 {
 638         if (clock <= 27000)
 639                 return 3 << 4;
 640         else if (clock <= 84000)
 641                 return 3 << 3;
 642         else if (clock <= 167000)
 643                 return 3 << 2;
 644         else
 645                 return 3 << 1;
 646 }
 647
 648 static unsigned int mt2701_calculate_factor(int clock)
 649 {
 650         if (clock <= 64000)
 651                 return 4;
 652         else if (clock <= 128000)
 653                 return 2;
 654         else
 655                 return 1;
 656 }
 657
 658 static unsigned int mt8183_calculate_factor(int clock)
 659 {
 660         if (clock <= 27000)
 661                 return 8;
 662         else if (clock <= 167000)
 663                 return 4;
 664         else
 665                 return 2;
 666 }
 667
 668 static const struct mtk_dpi_conf mt8173_conf = {
 669         .cal_factor = mt8173_calculate_factor,
 670         .reg_h_fre_con = 0xe0,
 671 };
 672
 673 static const struct mtk_dpi_conf mt2701_conf = {
 674         .cal_factor = mt2701_calculate_factor,
 675         .reg_h_fre_con = 0xb0,
 676         .edge_sel_en = true,
 677 };
 678
 679 static const struct mtk_dpi_conf mt8183_conf = {
 680         .cal_factor = mt8183_calculate_factor,
 681         .reg_h_fre_con = 0xe0,
 682 };
 683
 684 static int mtk_dpi_probe(struct platform_device *pdev)
 685 {
 686         struct device *dev = &pdev->dev;
 687         struct mtk_dpi *dpi;
 688         struct resource *mem;
 689         int ret;
 690
 691         dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
 692         if (!dpi)
 693                 return -ENOMEM;
 694
 695         dpi->dev = dev;
 696         dpi->conf = (struct mtk_dpi_conf *)of_device_get_match_data(dev);
 697
 698         dpi->pinctrl = devm_pinctrl_get(&pdev->dev);
 699         if (IS_ERR(dpi->pinctrl)) {
 700                 dpi->pinctrl = NULL;
 701                 dev_dbg(&pdev->dev, "Cannot find pinctrl!\n");
 702         }
 703         if (dpi->pinctrl) {
 704                 dpi->pins_gpio = pinctrl_lookup_state(dpi->pinctrl, "sleep");
 705                 if (IS_ERR(dpi->pins_gpio)) {
 706                         dpi->pins_gpio = NULL;
 707                         dev_dbg(&pdev->dev, "Cannot find pinctrl idle!\n");
 708                 }
 709                 if (dpi->pins_gpio)
 710                         pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio);
 711
 712                 dpi->pins_dpi = pinctrl_lookup_state(dpi->pinctrl, "default");
 713                 if (IS_ERR(dpi->pins_dpi)) {
 714                         dpi->pins_dpi = NULL;
 715                         dev_dbg(&pdev->dev, "Cannot find pinctrl active!\n");
 716                 }
 717         }
 718         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 719         dpi->regs = devm_ioremap_resource(dev, mem);
 720         if (IS_ERR(dpi->regs)) {
 721                 ret = PTR_ERR(dpi->regs);
 722                 dev_err(dev, "Failed to ioremap mem resource: %d\n", ret);
 723                 return ret;
 724         }
 725
 726         dpi->engine_clk = devm_clk_get(dev, "engine");
 727         if (IS_ERR(dpi->engine_clk)) {
 728                 ret = PTR_ERR(dpi->engine_clk);
 729                 if (ret != -EPROBE_DEFER)
 730                         dev_err(dev, "Failed to get engine clock: %d\n", ret);
 731
 732                 return ret;
 733         }
 734
 735         dpi->pixel_clk = devm_clk_get(dev, "pixel");
 736         if (IS_ERR(dpi->pixel_clk)) {
 737                 ret = PTR_ERR(dpi->pixel_clk);
 738                 if (ret != -EPROBE_DEFER)
 739                         dev_err(dev, "Failed to get pixel clock: %d\n", ret);
 740
 741                 return ret;
 742         }
 743
 744         dpi->tvd_clk = devm_clk_get(dev, "pll");
 745         if (IS_ERR(dpi->tvd_clk)) {
 746                 ret = PTR_ERR(dpi->tvd_clk);
 747                 if (ret != -EPROBE_DEFER)
 748                         dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
 749
 750                 return ret;
 751         }
 752
 753         dpi->irq = platform_get_irq(pdev, 0);
 754         if (dpi->irq <= 0) {
 755                 dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
 756                 return -EINVAL;
 757         }
 758
 759         ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
 760                                           NULL, &dpi->next_bridge);
 761         if (ret)
 762                 return ret;
 763
 764         dev_info(dev, "Found bridge node: %pOF\n", dpi->next_bridge->of_node);
 765
 766         platform_set_drvdata(pdev, dpi);
 767
 768         dpi->bridge.funcs = &mtk_dpi_bridge_funcs;
 769         dpi->bridge.of_node = dev->of_node;
 770         dpi->bridge.type = DRM_MODE_CONNECTOR_DPI;
 771
 772         drm_bridge_add(&dpi->bridge);
 773
 774         ret = component_add(dev, &mtk_dpi_component_ops);
 775         if (ret) {
 776                 drm_bridge_remove(&dpi->bridge);
 777                 dev_err(dev, "Failed to add component: %d\n", ret);
 778                 return ret;
 779         }
 780
 781         return 0;
 782 }
 783
 784 static int mtk_dpi_remove(struct platform_device *pdev)
 785 {
 786         struct mtk_dpi *dpi = platform_get_drvdata(pdev);
 787
 788         component_del(&pdev->dev, &mtk_dpi_component_ops);
 789         drm_bridge_remove(&dpi->bridge);
 790
 791         return 0;
 792 }
 793
 794 static const struct of_device_id mtk_dpi_of_ids[] = {
 795         { .compatible = "mediatek,mt2701-dpi",
 796           .data = &mt2701_conf,
 797         },
 798         { .compatible = "mediatek,mt8173-dpi",
 799           .data = &mt8173_conf,
 800         },
 801         { .compatible = "mediatek,mt8183-dpi",
 802           .data = &mt8183_conf,
 803         },
 804         { },
 805 };
 806
 807 struct platform_driver mtk_dpi_driver = {
 808         .probe = mtk_dpi_probe,
 809         .remove = mtk_dpi_remove,
 810         .driver = {
 811                 .name = "mediatek-dpi",
 812                 .of_match_table = mtk_dpi_of_ids,
 813         },
 814 };