drivers/gpu/drm/imx/ipuv3-plane.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX IPUv3 DP Overlay Planes
   4  *
   5  * Copyright (C) 2013 Philipp Zabel, Pengutronix
   6  */
   7
   8 #include <drm/drm_atomic.h>
   9 #include <drm/drm_atomic_helper.h>
  10 #include <drm/drm_fb_cma_helper.h>
  11 #include <drm/drm_fourcc.h>
  12 #include <drm/drm_gem_atomic_helper.h>
  13 #include <drm/drm_gem_cma_helper.h>
  14 #include <drm/drm_managed.h>
  15 #include <drm/drm_plane_helper.h>
  16
  17 #include <video/imx-ipu-v3.h>
  18
  19 #include "imx-drm.h"
  20 #include "ipuv3-plane.h"
  21
  22 struct ipu_plane_state {
  23         struct drm_plane_state base;
  24         bool use_pre;
  25 };
  26
  27 static inline struct ipu_plane_state *
  28 to_ipu_plane_state(struct drm_plane_state *p)
  29 {
  30         return container_of(p, struct ipu_plane_state, base);
  31 }
  32
  33 static unsigned int ipu_src_rect_width(const struct drm_plane_state *state)
  34 {
  35         return ALIGN(drm_rect_width(&state->src) >> 16, 8);
  36 }
  37
  38 static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
  39 {
  40         return container_of(p, struct ipu_plane, base);
  41 }
  42
  43 static const uint32_t ipu_plane_all_formats[] = {
  44         DRM_FORMAT_ARGB1555,
  45         DRM_FORMAT_XRGB1555,
  46         DRM_FORMAT_ABGR1555,
  47         DRM_FORMAT_XBGR1555,
  48         DRM_FORMAT_RGBA5551,
  49         DRM_FORMAT_BGRA5551,
  50         DRM_FORMAT_ARGB4444,
  51         DRM_FORMAT_ARGB8888,
  52         DRM_FORMAT_XRGB8888,
  53         DRM_FORMAT_ABGR8888,
  54         DRM_FORMAT_XBGR8888,
  55         DRM_FORMAT_RGBA8888,
  56         DRM_FORMAT_RGBX8888,
  57         DRM_FORMAT_BGRA8888,
  58         DRM_FORMAT_BGRX8888,
  59         DRM_FORMAT_UYVY,
  60         DRM_FORMAT_VYUY,
  61         DRM_FORMAT_YUYV,
  62         DRM_FORMAT_YVYU,
  63         DRM_FORMAT_YUV420,
  64         DRM_FORMAT_YVU420,
  65         DRM_FORMAT_YUV422,
  66         DRM_FORMAT_YVU422,
  67         DRM_FORMAT_YUV444,
  68         DRM_FORMAT_YVU444,
  69         DRM_FORMAT_NV12,
  70         DRM_FORMAT_NV16,
  71         DRM_FORMAT_RGB565,
  72         DRM_FORMAT_RGB565_A8,
  73         DRM_FORMAT_BGR565_A8,
  74         DRM_FORMAT_RGB888_A8,
  75         DRM_FORMAT_BGR888_A8,
  76         DRM_FORMAT_RGBX8888_A8,
  77         DRM_FORMAT_BGRX8888_A8,
  78 };
  79
  80 static const uint32_t ipu_plane_rgb_formats[] = {
  81         DRM_FORMAT_ARGB1555,
  82         DRM_FORMAT_XRGB1555,
  83         DRM_FORMAT_ABGR1555,
  84         DRM_FORMAT_XBGR1555,
  85         DRM_FORMAT_RGBA5551,
  86         DRM_FORMAT_BGRA5551,
  87         DRM_FORMAT_ARGB4444,
  88         DRM_FORMAT_ARGB8888,
  89         DRM_FORMAT_XRGB8888,
  90         DRM_FORMAT_ABGR8888,
  91         DRM_FORMAT_XBGR8888,
  92         DRM_FORMAT_RGBA8888,
  93         DRM_FORMAT_RGBX8888,
  94         DRM_FORMAT_BGRA8888,
  95         DRM_FORMAT_BGRX8888,
  96         DRM_FORMAT_RGB565,
  97         DRM_FORMAT_RGB565_A8,
  98         DRM_FORMAT_BGR565_A8,
  99         DRM_FORMAT_RGB888_A8,
 100         DRM_FORMAT_BGR888_A8,
 101         DRM_FORMAT_RGBX8888_A8,
 102         DRM_FORMAT_BGRX8888_A8,
 103 };
 104
 105 static const uint64_t ipu_format_modifiers[] = {
 106         DRM_FORMAT_MOD_LINEAR,
 107         DRM_FORMAT_MOD_INVALID
 108 };
 109
 110 static const uint64_t pre_format_modifiers[] = {
 111         DRM_FORMAT_MOD_LINEAR,
 112         DRM_FORMAT_MOD_VIVANTE_TILED,
 113         DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
 114         DRM_FORMAT_MOD_INVALID
 115 };
 116
 117 int ipu_plane_irq(struct ipu_plane *ipu_plane)
 118 {
 119         return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
 120                                      IPU_IRQ_EOF);
 121 }
 122
 123 static inline unsigned long
 124 drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
 125 {
 126         struct drm_framebuffer *fb = state->fb;
 127         struct drm_gem_cma_object *cma_obj;
 128         int x = state->src.x1 >> 16;
 129         int y = state->src.y1 >> 16;
 130
 131         cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
 132         BUG_ON(!cma_obj);
 133
 134         return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
 135                fb->format->cpp[plane] * x;
 136 }
 137
 138 static inline unsigned long
 139 drm_plane_state_to_ubo(struct drm_plane_state *state)
 140 {
 141         struct drm_framebuffer *fb = state->fb;
 142         struct drm_gem_cma_object *cma_obj;
 143         unsigned long eba = drm_plane_state_to_eba(state, 0);
 144         int x = state->src.x1 >> 16;
 145         int y = state->src.y1 >> 16;
 146
 147         cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
 148         BUG_ON(!cma_obj);
 149
 150         x /= fb->format->hsub;
 151         y /= fb->format->vsub;
 152
 153         return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
 154                fb->format->cpp[1] * x - eba;
 155 }
 156
 157 static inline unsigned long
 158 drm_plane_state_to_vbo(struct drm_plane_state *state)
 159 {
 160         struct drm_framebuffer *fb = state->fb;
 161         struct drm_gem_cma_object *cma_obj;
 162         unsigned long eba = drm_plane_state_to_eba(state, 0);
 163         int x = state->src.x1 >> 16;
 164         int y = state->src.y1 >> 16;
 165
 166         cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
 167         BUG_ON(!cma_obj);
 168
 169         x /= fb->format->hsub;
 170         y /= fb->format->vsub;
 171
 172         return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
 173                fb->format->cpp[2] * x - eba;
 174 }
 175
 176 static void ipu_plane_put_resources(struct drm_device *dev, void *ptr)
 177 {
 178         struct ipu_plane *ipu_plane = ptr;
 179
 180         if (!IS_ERR_OR_NULL(ipu_plane->dp))
 181                 ipu_dp_put(ipu_plane->dp);
 182         if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
 183                 ipu_dmfc_put(ipu_plane->dmfc);
 184         if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
 185                 ipu_idmac_put(ipu_plane->ipu_ch);
 186         if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
 187                 ipu_idmac_put(ipu_plane->alpha_ch);
 188 }
 189
 190 static int ipu_plane_get_resources(struct drm_device *dev,
 191                                    struct ipu_plane *ipu_plane)
 192 {
 193         int ret;
 194         int alpha_ch;
 195
 196         ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
 197         if (IS_ERR(ipu_plane->ipu_ch)) {
 198                 ret = PTR_ERR(ipu_plane->ipu_ch);
 199                 DRM_ERROR("failed to get idmac channel: %d\n", ret);
 200                 return ret;
 201         }
 202
 203         ret = drmm_add_action_or_reset(dev, ipu_plane_put_resources, ipu_plane);
 204         if (ret)
 205                 return ret;
 206
 207         alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
 208         if (alpha_ch >= 0) {
 209                 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
 210                 if (IS_ERR(ipu_plane->alpha_ch)) {
 211                         ret = PTR_ERR(ipu_plane->alpha_ch);
 212                         DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
 213                                   alpha_ch, ret);
 214                         return ret;
 215                 }
 216         }
 217
 218         ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
 219         if (IS_ERR(ipu_plane->dmfc)) {
 220                 ret = PTR_ERR(ipu_plane->dmfc);
 221                 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
 222                 return ret;
 223         }
 224
 225         if (ipu_plane->dp_flow >= 0) {
 226                 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
 227                 if (IS_ERR(ipu_plane->dp)) {
 228                         ret = PTR_ERR(ipu_plane->dp);
 229                         DRM_ERROR("failed to get dp flow: %d\n", ret);
 230                         return ret;
 231                 }
 232         }
 233
 234         return 0;
 235 }
 236
 237 static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
 238 {
 239         switch (ipu_plane->base.state->fb->format->format) {
 240         case DRM_FORMAT_RGB565_A8:
 241         case DRM_FORMAT_BGR565_A8:
 242         case DRM_FORMAT_RGB888_A8:
 243         case DRM_FORMAT_BGR888_A8:
 244         case DRM_FORMAT_RGBX8888_A8:
 245         case DRM_FORMAT_BGRX8888_A8:
 246                 return true;
 247         default:
 248                 return false;
 249         }
 250 }
 251
 252 static void ipu_plane_enable(struct ipu_plane *ipu_plane)
 253 {
 254         if (ipu_plane->dp)
 255                 ipu_dp_enable(ipu_plane->ipu);
 256         ipu_dmfc_enable_channel(ipu_plane->dmfc);
 257         ipu_idmac_enable_channel(ipu_plane->ipu_ch);
 258         if (ipu_plane_separate_alpha(ipu_plane))
 259                 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
 260         if (ipu_plane->dp)
 261                 ipu_dp_enable_channel(ipu_plane->dp);
 262 }
 263
 264 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
 265 {
 266         int ret;
 267
 268         DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
 269
 270         ret = ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
 271         if (ret == -ETIMEDOUT) {
 272                 DRM_ERROR("[PLANE:%d] IDMAC timeout\n",
 273                           ipu_plane->base.base.id);
 274         }
 275
 276         if (ipu_plane->dp && disable_dp_channel)
 277                 ipu_dp_disable_channel(ipu_plane->dp, false);
 278         ipu_idmac_disable_channel(ipu_plane->ipu_ch);
 279         if (ipu_plane->alpha_ch)
 280                 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
 281         ipu_dmfc_disable_channel(ipu_plane->dmfc);
 282         if (ipu_plane->dp)
 283                 ipu_dp_disable(ipu_plane->ipu);
 284         if (ipu_prg_present(ipu_plane->ipu))
 285                 ipu_prg_channel_disable(ipu_plane->ipu_ch);
 286 }
 287
 288 void ipu_plane_disable_deferred(struct drm_plane *plane)
 289 {
 290         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 291
 292         if (ipu_plane->disabling) {
 293                 ipu_plane->disabling = false;
 294                 ipu_plane_disable(ipu_plane, false);
 295         }
 296 }
 297
 298 static void ipu_plane_state_reset(struct drm_plane *plane)
 299 {
 300         unsigned int zpos = (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
 301         struct ipu_plane_state *ipu_state;
 302
 303         if (plane->state) {
 304                 ipu_state = to_ipu_plane_state(plane->state);
 305                 __drm_atomic_helper_plane_destroy_state(plane->state);
 306                 kfree(ipu_state);
 307                 plane->state = NULL;
 308         }
 309
 310         ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
 311
 312         if (ipu_state) {
 313                 __drm_atomic_helper_plane_reset(plane, &ipu_state->base);
 314                 ipu_state->base.zpos = zpos;
 315                 ipu_state->base.normalized_zpos = zpos;
 316         }
 317 }
 318
 319 static struct drm_plane_state *
 320 ipu_plane_duplicate_state(struct drm_plane *plane)
 321 {
 322         struct ipu_plane_state *state;
 323
 324         if (WARN_ON(!plane->state))
 325                 return NULL;
 326
 327         state = kmalloc(sizeof(*state), GFP_KERNEL);
 328         if (state)
 329                 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
 330
 331         return &state->base;
 332 }
 333
 334 static void ipu_plane_destroy_state(struct drm_plane *plane,
 335                                     struct drm_plane_state *state)
 336 {
 337         struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
 338
 339         __drm_atomic_helper_plane_destroy_state(state);
 340         kfree(ipu_state);
 341 }
 342
 343 static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
 344                                            uint32_t format, uint64_t modifier)
 345 {
 346         struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
 347
 348         /* linear is supported for all planes and formats */
 349         if (modifier == DRM_FORMAT_MOD_LINEAR)
 350                 return true;
 351
 352         /*
 353          * Without a PRG the possible modifiers list only includes the linear
 354          * modifier, so we always take the early return from this function and
 355          * only end up here if the PRG is present.
 356          */
 357         return ipu_prg_format_supported(ipu, format, modifier);
 358 }
 359
 360 static const struct drm_plane_funcs ipu_plane_funcs = {
 361         .update_plane   = drm_atomic_helper_update_plane,
 362         .disable_plane  = drm_atomic_helper_disable_plane,
 363         .reset          = ipu_plane_state_reset,
 364         .atomic_duplicate_state = ipu_plane_duplicate_state,
 365         .atomic_destroy_state   = ipu_plane_destroy_state,
 366         .format_mod_supported = ipu_plane_format_mod_supported,
 367 };
 368
 369 static int ipu_plane_atomic_check(struct drm_plane *plane,
 370                                   struct drm_atomic_state *state)
 371 {
 372         struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 373                                                                            plane);
 374         struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
 375                                                                            plane);
 376         struct drm_crtc_state *crtc_state;
 377         struct device *dev = plane->dev->dev;
 378         struct drm_framebuffer *fb = new_state->fb;
 379         struct drm_framebuffer *old_fb = old_state->fb;
 380         unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
 381         bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
 382         int ret;
 383
 384         /* Ok to disable */
 385         if (!fb)
 386                 return 0;
 387
 388         if (WARN_ON(!new_state->crtc))
 389                 return -EINVAL;
 390
 391         crtc_state =
 392                 drm_atomic_get_existing_crtc_state(state,
 393                                                    new_state->crtc);
 394         if (WARN_ON(!crtc_state))
 395                 return -EINVAL;
 396
 397         ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
 398                                                   DRM_PLANE_HELPER_NO_SCALING,
 399                                                   DRM_PLANE_HELPER_NO_SCALING,
 400                                                   can_position, true);
 401         if (ret)
 402                 return ret;
 403
 404         /* nothing to check when disabling or disabled */
 405         if (!crtc_state->enable)
 406                 return 0;
 407
 408         switch (plane->type) {
 409         case DRM_PLANE_TYPE_PRIMARY:
 410                 /* full plane minimum width is 13 pixels */
 411                 if (drm_rect_width(&new_state->dst) < 13)
 412                         return -EINVAL;
 413                 break;
 414         case DRM_PLANE_TYPE_OVERLAY:
 415                 break;
 416         default:
 417                 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
 418                 return -EINVAL;
 419         }
 420
 421         if (drm_rect_height(&new_state->dst) < 2)
 422                 return -EINVAL;
 423
 424         /*
 425          * We support resizing active plane or changing its format by
 426          * forcing CRTC mode change in plane's ->atomic_check callback
 427          * and disabling all affected active planes in CRTC's ->atomic_disable
 428          * callback.  The planes will be reenabled in plane's ->atomic_update
 429          * callback.
 430          */
 431         if (old_fb &&
 432             (drm_rect_width(&new_state->dst) != drm_rect_width(&old_state->dst) ||
 433              drm_rect_height(&new_state->dst) != drm_rect_height(&old_state->dst) ||
 434              fb->format != old_fb->format))
 435                 crtc_state->mode_changed = true;
 436
 437         eba = drm_plane_state_to_eba(new_state, 0);
 438
 439         if (eba & 0x7)
 440                 return -EINVAL;
 441
 442         if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
 443                 return -EINVAL;
 444
 445         if (old_fb && fb->pitches[0] != old_fb->pitches[0])
 446                 crtc_state->mode_changed = true;
 447
 448         if (ALIGN(fb->width, 8) * fb->format->cpp[0] >
 449             fb->pitches[0] + fb->offsets[0]) {
 450                 dev_warn(dev, "pitch is not big enough for 8 pixels alignment");
 451                 return -EINVAL;
 452         }
 453
 454         switch (fb->format->format) {
 455         case DRM_FORMAT_YUV420:
 456         case DRM_FORMAT_YVU420:
 457         case DRM_FORMAT_YUV422:
 458         case DRM_FORMAT_YVU422:
 459         case DRM_FORMAT_YUV444:
 460         case DRM_FORMAT_YVU444:
 461                 /*
 462                  * Multiplanar formats have to meet the following restrictions:
 463                  * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
 464                  * - EBA, UBO and VBO are a multiple of 8
 465                  * - UBO and VBO are unsigned and not larger than 0xfffff8
 466                  * - Only EBA may be changed while scanout is active
 467                  * - The strides of U and V planes must be identical.
 468                  */
 469                 vbo = drm_plane_state_to_vbo(new_state);
 470
 471                 if (vbo & 0x7 || vbo > 0xfffff8)
 472                         return -EINVAL;
 473
 474                 if (old_fb && (fb->format == old_fb->format)) {
 475                         old_vbo = drm_plane_state_to_vbo(old_state);
 476                         if (vbo != old_vbo)
 477                                 crtc_state->mode_changed = true;
 478                 }
 479
 480                 if (fb->pitches[1] != fb->pitches[2])
 481                         return -EINVAL;
 482
 483                 fallthrough;
 484         case DRM_FORMAT_NV12:
 485         case DRM_FORMAT_NV16:
 486                 ubo = drm_plane_state_to_ubo(new_state);
 487
 488                 if (ubo & 0x7 || ubo > 0xfffff8)
 489                         return -EINVAL;
 490
 491                 if (old_fb && (fb->format == old_fb->format)) {
 492                         old_ubo = drm_plane_state_to_ubo(old_state);
 493                         if (ubo != old_ubo)
 494                                 crtc_state->mode_changed = true;
 495                 }
 496
 497                 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
 498                         return -EINVAL;
 499
 500                 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
 501                         crtc_state->mode_changed = true;
 502
 503                 /*
 504                  * The x/y offsets must be even in case of horizontal/vertical
 505                  * chroma subsampling.
 506                  */
 507                 if (((new_state->src.x1 >> 16) & (fb->format->hsub - 1)) ||
 508                     ((new_state->src.y1 >> 16) & (fb->format->vsub - 1)))
 509                         return -EINVAL;
 510                 break;
 511         case DRM_FORMAT_RGB565_A8:
 512         case DRM_FORMAT_BGR565_A8:
 513         case DRM_FORMAT_RGB888_A8:
 514         case DRM_FORMAT_BGR888_A8:
 515         case DRM_FORMAT_RGBX8888_A8:
 516         case DRM_FORMAT_BGRX8888_A8:
 517                 alpha_eba = drm_plane_state_to_eba(new_state, 1);
 518                 if (alpha_eba & 0x7)
 519                         return -EINVAL;
 520
 521                 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
 522                         return -EINVAL;
 523
 524                 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
 525                         crtc_state->mode_changed = true;
 526                 break;
 527         }
 528
 529         return 0;
 530 }
 531
 532 static void ipu_plane_atomic_disable(struct drm_plane *plane,
 533                                      struct drm_atomic_state *state)
 534 {
 535         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 536
 537         if (ipu_plane->dp)
 538                 ipu_dp_disable_channel(ipu_plane->dp, true);
 539         ipu_plane->disabling = true;
 540 }
 541
 542 static int ipu_chan_assign_axi_id(int ipu_chan)
 543 {
 544         switch (ipu_chan) {
 545         case IPUV3_CHANNEL_MEM_BG_SYNC:
 546                 return 1;
 547         case IPUV3_CHANNEL_MEM_FG_SYNC:
 548                 return 2;
 549         case IPUV3_CHANNEL_MEM_DC_SYNC:
 550                 return 3;
 551         default:
 552                 return 0;
 553         }
 554 }
 555
 556 static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
 557                                  u8 *burstsize, u8 *num_bursts)
 558 {
 559         const unsigned int width_bytes = width * cpp;
 560         unsigned int npb, bursts;
 561
 562         /* Maximum number of pixels per burst without overshooting stride */
 563         for (npb = 64 / cpp; npb > 0; --npb) {
 564                 if (round_up(width_bytes, npb * cpp) <= stride)
 565                         break;
 566         }
 567         *burstsize = npb;
 568
 569         /* Maximum number of consecutive bursts without overshooting stride */
 570         for (bursts = 8; bursts > 1; bursts /= 2) {
 571                 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
 572                         break;
 573         }
 574         *num_bursts = bursts;
 575 }
 576
 577 static void ipu_plane_atomic_update(struct drm_plane *plane,
 578                                     struct drm_atomic_state *state)
 579 {
 580         struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
 581                                                                            plane);
 582         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 583         struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 584                                                                            plane);
 585         struct ipu_plane_state *ipu_state = to_ipu_plane_state(new_state);
 586         struct drm_crtc_state *crtc_state = new_state->crtc->state;
 587         struct drm_framebuffer *fb = new_state->fb;
 588         struct drm_rect *dst = &new_state->dst;
 589         unsigned long eba, ubo, vbo;
 590         unsigned long alpha_eba = 0;
 591         enum ipu_color_space ics;
 592         unsigned int axi_id = 0;
 593         const struct drm_format_info *info;
 594         u8 burstsize, num_bursts;
 595         u32 width, height;
 596         int active;
 597
 598         if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
 599                 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
 600
 601         switch (ipu_plane->dp_flow) {
 602         case IPU_DP_FLOW_SYNC_BG:
 603                 if (new_state->normalized_zpos == 1) {
 604                         ipu_dp_set_global_alpha(ipu_plane->dp,
 605                                                 !fb->format->has_alpha, 0xff,
 606                                                 true);
 607                 } else {
 608                         ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
 609                 }
 610                 break;
 611         case IPU_DP_FLOW_SYNC_FG:
 612                 if (new_state->normalized_zpos == 1) {
 613                         ipu_dp_set_global_alpha(ipu_plane->dp,
 614                                                 !fb->format->has_alpha, 0xff,
 615                                                 false);
 616                 }
 617                 break;
 618         }
 619
 620         eba = drm_plane_state_to_eba(new_state, 0);
 621
 622         /*
 623          * Configure PRG channel and attached PRE, this changes the EBA to an
 624          * internal SRAM location.
 625          */
 626         if (ipu_state->use_pre) {
 627                 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
 628                 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
 629                                           ipu_src_rect_width(new_state),
 630                                           drm_rect_height(&new_state->src) >> 16,
 631                                           fb->pitches[0], fb->format->format,
 632                                           fb->modifier, &eba);
 633         }
 634
 635         if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
 636                 /* nothing to do if PRE is used */
 637                 if (ipu_state->use_pre)
 638                         return;
 639                 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
 640                 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
 641                 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
 642                 if (ipu_plane_separate_alpha(ipu_plane)) {
 643                         active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
 644                         ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
 645                                              alpha_eba);
 646                         ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
 647                 }
 648                 return;
 649         }
 650
 651         ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
 652         switch (ipu_plane->dp_flow) {
 653         case IPU_DP_FLOW_SYNC_BG:
 654                 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
 655                 break;
 656         case IPU_DP_FLOW_SYNC_FG:
 657                 ipu_dp_setup_channel(ipu_plane->dp, ics,
 658                                         IPUV3_COLORSPACE_UNKNOWN);
 659                 break;
 660         }
 661
 662         ipu_dmfc_config_wait4eot(ipu_plane->dmfc, ALIGN(drm_rect_width(dst), 8));
 663
 664         width = ipu_src_rect_width(new_state);
 665         height = drm_rect_height(&new_state->src) >> 16;
 666         info = drm_format_info(fb->format->format);
 667         ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
 668                              &burstsize, &num_bursts);
 669
 670         ipu_cpmem_zero(ipu_plane->ipu_ch);
 671         ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
 672         ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
 673         ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
 674         ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
 675         ipu_idmac_enable_watermark(ipu_plane->ipu_ch, true);
 676         ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
 677         ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
 678         ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
 679
 680         switch (fb->format->format) {
 681         case DRM_FORMAT_YUV420:
 682         case DRM_FORMAT_YVU420:
 683         case DRM_FORMAT_YUV422:
 684         case DRM_FORMAT_YVU422:
 685         case DRM_FORMAT_YUV444:
 686         case DRM_FORMAT_YVU444:
 687                 ubo = drm_plane_state_to_ubo(new_state);
 688                 vbo = drm_plane_state_to_vbo(new_state);
 689                 if (fb->format->format == DRM_FORMAT_YVU420 ||
 690                     fb->format->format == DRM_FORMAT_YVU422 ||
 691                     fb->format->format == DRM_FORMAT_YVU444)
 692                         swap(ubo, vbo);
 693
 694                 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
 695                                               fb->pitches[1], ubo, vbo);
 696
 697                 dev_dbg(ipu_plane->base.dev->dev,
 698                         "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
 699                         new_state->src.x1 >> 16, new_state->src.y1 >> 16);
 700                 break;
 701         case DRM_FORMAT_NV12:
 702         case DRM_FORMAT_NV16:
 703                 ubo = drm_plane_state_to_ubo(new_state);
 704
 705                 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
 706                                               fb->pitches[1], ubo, ubo);
 707
 708                 dev_dbg(ipu_plane->base.dev->dev,
 709                         "phy = %lu %lu, x = %d, y = %d", eba, ubo,
 710                         new_state->src.x1 >> 16, new_state->src.y1 >> 16);
 711                 break;
 712         case DRM_FORMAT_RGB565_A8:
 713         case DRM_FORMAT_BGR565_A8:
 714         case DRM_FORMAT_RGB888_A8:
 715         case DRM_FORMAT_BGR888_A8:
 716         case DRM_FORMAT_RGBX8888_A8:
 717         case DRM_FORMAT_BGRX8888_A8:
 718                 alpha_eba = drm_plane_state_to_eba(new_state, 1);
 719                 num_bursts = 0;
 720
 721                 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
 722                         eba, alpha_eba, new_state->src.x1 >> 16,
 723                         new_state->src.y1 >> 16);
 724
 725                 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
 726
 727                 ipu_cpmem_zero(ipu_plane->alpha_ch);
 728                 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
 729                                          ipu_src_rect_width(new_state),
 730                                          drm_rect_height(&new_state->src) >> 16);
 731                 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
 732                 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
 733                 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
 734                 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
 735                 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
 736                 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
 737                 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
 738                 break;
 739         default:
 740                 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
 741                         eba, new_state->src.x1 >> 16, new_state->src.y1 >> 16);
 742                 break;
 743         }
 744         ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
 745         ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
 746         ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
 747         ipu_plane_enable(ipu_plane);
 748 }
 749
 750 static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
 751         .prepare_fb = drm_gem_plane_helper_prepare_fb,
 752         .atomic_check = ipu_plane_atomic_check,
 753         .atomic_disable = ipu_plane_atomic_disable,
 754         .atomic_update = ipu_plane_atomic_update,
 755 };
 756
 757 bool ipu_plane_atomic_update_pending(struct drm_plane *plane)
 758 {
 759         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 760         struct drm_plane_state *state = plane->state;
 761         struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
 762
 763         /* disabled crtcs must not block the update */
 764         if (!state->crtc)
 765                 return false;
 766
 767         if (ipu_state->use_pre)
 768                 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch);
 769
 770         /*
 771          * Pretend no update is pending in the non-PRE/PRG case. For this to
 772          * happen, an atomic update would have to be deferred until after the
 773          * start of the next frame and simultaneously interrupt latency would
 774          * have to be high enough to let the atomic update finish and issue an
 775          * event before the previous end of frame interrupt handler can be
 776          * executed.
 777          */
 778         return false;
 779 }
 780 int ipu_planes_assign_pre(struct drm_device *dev,
 781                           struct drm_atomic_state *state)
 782 {
 783         struct drm_crtc_state *old_crtc_state, *crtc_state;
 784         struct drm_plane_state *plane_state;
 785         struct ipu_plane_state *ipu_state;
 786         struct ipu_plane *ipu_plane;
 787         struct drm_plane *plane;
 788         struct drm_crtc *crtc;
 789         int available_pres = ipu_prg_max_active_channels();
 790         int ret, i;
 791
 792         for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
 793                 ret = drm_atomic_add_affected_planes(state, crtc);
 794                 if (ret)
 795                         return ret;
 796         }
 797
 798         /*
 799          * We are going over the planes in 2 passes: first we assign PREs to
 800          * planes with a tiling modifier, which need the PREs to resolve into
 801          * linear. Any failure to assign a PRE there is fatal. In the second
 802          * pass we try to assign PREs to linear FBs, to improve memory access
 803          * patterns for them. Failure at this point is non-fatal, as we can
 804          * scan out linear FBs without a PRE.
 805          */
 806         for_each_new_plane_in_state(state, plane, plane_state, i) {
 807                 ipu_state = to_ipu_plane_state(plane_state);
 808                 ipu_plane = to_ipu_plane(plane);
 809
 810                 if (!plane_state->fb) {
 811                         ipu_state->use_pre = false;
 812                         continue;
 813                 }
 814
 815                 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
 816                     plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
 817                         continue;
 818
 819                 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
 820                         return -EINVAL;
 821
 822                 if (!ipu_prg_format_supported(ipu_plane->ipu,
 823                                               plane_state->fb->format->format,
 824                                               plane_state->fb->modifier))
 825                         return -EINVAL;
 826
 827                 ipu_state->use_pre = true;
 828                 available_pres--;
 829         }
 830
 831         for_each_new_plane_in_state(state, plane, plane_state, i) {
 832                 ipu_state = to_ipu_plane_state(plane_state);
 833                 ipu_plane = to_ipu_plane(plane);
 834
 835                 if (!plane_state->fb) {
 836                         ipu_state->use_pre = false;
 837                         continue;
 838                 }
 839
 840                 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
 841                     plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
 842                         continue;
 843
 844                 /* make sure that modifier is initialized */
 845                 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
 846
 847                 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
 848                     ipu_prg_format_supported(ipu_plane->ipu,
 849                                              plane_state->fb->format->format,
 850                                              plane_state->fb->modifier)) {
 851                         ipu_state->use_pre = true;
 852                         available_pres--;
 853                 } else {
 854                         ipu_state->use_pre = false;
 855                 }
 856         }
 857
 858         return 0;
 859 }
 860
 861 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
 862                                  int dma, int dp, unsigned int possible_crtcs,
 863                                  enum drm_plane_type type)
 864 {
 865         struct ipu_plane *ipu_plane;
 866         const uint64_t *modifiers = ipu_format_modifiers;
 867         unsigned int zpos = (type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
 868         unsigned int format_count;
 869         const uint32_t *formats;
 870         int ret;
 871
 872         DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
 873                       dma, dp, possible_crtcs);
 874
 875         if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG) {
 876                 formats = ipu_plane_all_formats;
 877                 format_count = ARRAY_SIZE(ipu_plane_all_formats);
 878         } else {
 879                 formats = ipu_plane_rgb_formats;
 880                 format_count = ARRAY_SIZE(ipu_plane_rgb_formats);
 881         }
 882
 883         if (ipu_prg_present(ipu))
 884                 modifiers = pre_format_modifiers;
 885
 886         ipu_plane = drmm_universal_plane_alloc(dev, struct ipu_plane, base,
 887                                                possible_crtcs, &ipu_plane_funcs,
 888                                                formats, format_count, modifiers,
 889                                                type, NULL);
 890         if (IS_ERR(ipu_plane)) {
 891                 DRM_ERROR("failed to allocate and initialize %s plane\n",
 892                           zpos ? "overlay" : "primary");
 893                 return ipu_plane;
 894         }
 895
 896         ipu_plane->ipu = ipu;
 897         ipu_plane->dma = dma;
 898         ipu_plane->dp_flow = dp;
 899
 900         drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
 901
 902         if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG)
 903                 ret = drm_plane_create_zpos_property(&ipu_plane->base, zpos, 0,
 904                                                      1);
 905         else
 906                 ret = drm_plane_create_zpos_immutable_property(&ipu_plane->base,
 907                                                                0);
 908         if (ret)
 909                 return ERR_PTR(ret);
 910
 911         ret = ipu_plane_get_resources(dev, ipu_plane);
 912         if (ret) {
 913                 DRM_ERROR("failed to get %s plane resources: %pe\n",
 914                           zpos ? "overlay" : "primary", &ret);
 915                 return ERR_PTR(ret);
 916         }
 917
 918         return ipu_plane;
 919 }