drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_of.h>
  26 #include <drm/drm_panel.h>
  27 #include <drm/drm_print.h>
  28 #include <drm/drm_probe_helper.h>
  29 #include <drm/drm_simple_kms_helper.h>
  30
  31 #include "imx-drm.h"
  32
  33 #define DRIVER_NAME "imx-ldb"
  34
  35 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  36 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  37 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  38 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  39 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  40 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  41 #define LDB_SPLIT_MODE_EN               (1 << 4)
  42 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  43 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  44 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  45 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  46 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  47 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  48 #define LDB_BGREF_RMODE_INT             (1 << 15)
  49
  50 struct imx_ldb;
  51
  52 struct imx_ldb_channel {
  53         struct imx_ldb *ldb;
  54         struct drm_connector connector;
  55         struct drm_encoder encoder;
  56
  57         /* Defines what is connected to the ldb, only one at a time */
  58         struct drm_panel *panel;
  59         struct drm_bridge *bridge;
  60
  61         struct device_node *child;
  62         struct i2c_adapter *ddc;
  63         int chno;
  64         void *edid;
  65         int edid_len;
  66         struct drm_display_mode mode;
  67         int mode_valid;
  68         u32 bus_format;
  69         u32 bus_flags;
  70 };
  71
  72 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  73 {
  74         return container_of(c, struct imx_ldb_channel, connector);
  75 }
  76
  77 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  78 {
  79         return container_of(e, struct imx_ldb_channel, encoder);
  80 }
  81
  82 struct bus_mux {
  83         int reg;
  84         int shift;
  85         int mask;
  86 };
  87
  88 struct imx_ldb {
  89         struct regmap *regmap;
  90         struct device *dev;
  91         struct imx_ldb_channel channel[2];
  92         struct clk *clk[2]; /* our own clock */
  93         struct clk *clk_sel[4]; /* parent of display clock */
  94         struct clk *clk_parent[4]; /* original parent of clk_sel */
  95         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  96         u32 ldb_ctrl;
  97         const struct bus_mux *lvds_mux;
  98 };
  99
 100 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 101                                       u32 bus_format)
 102 {
 103         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 104         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 105
 106         switch (bus_format) {
 107         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 108                 break;
 109         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 110                 if (imx_ldb_ch->chno == 0 || dual)
 111                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 112                 if (imx_ldb_ch->chno == 1 || dual)
 113                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 114                 break;
 115         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 116                 if (imx_ldb_ch->chno == 0 || dual)
 117                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 118                                          LDB_BIT_MAP_CH0_JEIDA;
 119                 if (imx_ldb_ch->chno == 1 || dual)
 120                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 121                                          LDB_BIT_MAP_CH1_JEIDA;
 122                 break;
 123         }
 124 }
 125
 126 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 127 {
 128         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 129         int num_modes;
 130
 131         num_modes = drm_panel_get_modes(imx_ldb_ch->panel, connector);
 132         if (num_modes > 0)
 133                 return num_modes;
 134
 135         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 136                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 137
 138         if (imx_ldb_ch->edid) {
 139                 drm_connector_update_edid_property(connector,
 140                                                         imx_ldb_ch->edid);
 141                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 142         }
 143
 144         if (imx_ldb_ch->mode_valid) {
 145                 struct drm_display_mode *mode;
 146
 147                 mode = drm_mode_create(connector->dev);
 148                 if (!mode)
 149                         return -EINVAL;
 150                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 151                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 152                 drm_mode_probed_add(connector, mode);
 153                 num_modes++;
 154         }
 155
 156         return num_modes;
 157 }
 158
 159 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 160                 unsigned long serial_clk, unsigned long di_clk)
 161 {
 162         int ret;
 163
 164         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 165                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 166         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 167
 168         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 169                         clk_get_rate(ldb->clk_pll[chno]));
 170
 171         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 172                         clk_get_rate(ldb->clk[chno]),
 173                         (long int)di_clk);
 174         clk_set_rate(ldb->clk[chno], di_clk);
 175
 176         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 177                         clk_get_rate(ldb->clk[chno]));
 178
 179         /* set display clock mux to LDB input clock */
 180         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 181         if (ret)
 182                 dev_err(ldb->dev,
 183                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 184                         chno);
 185 }
 186
 187 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 188 {
 189         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 190         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 191         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 192         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 193
 194         drm_panel_prepare(imx_ldb_ch->panel);
 195
 196         if (dual) {
 197                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 198                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 199
 200                 clk_prepare_enable(ldb->clk[0]);
 201                 clk_prepare_enable(ldb->clk[1]);
 202         } else {
 203                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 204         }
 205
 206         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 207                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 208                 if (mux == 0 || ldb->lvds_mux)
 209                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 210                 else if (mux == 1)
 211                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 212         }
 213         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 214                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 215                 if (mux == 1 || ldb->lvds_mux)
 216                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 217                 else if (mux == 0)
 218                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 219         }
 220
 221         if (ldb->lvds_mux) {
 222                 const struct bus_mux *lvds_mux = NULL;
 223
 224                 if (imx_ldb_ch == &ldb->channel[0])
 225                         lvds_mux = &ldb->lvds_mux[0];
 226                 else if (imx_ldb_ch == &ldb->channel[1])
 227                         lvds_mux = &ldb->lvds_mux[1];
 228
 229                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 230                                    mux << lvds_mux->shift);
 231         }
 232
 233         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 234
 235         drm_panel_enable(imx_ldb_ch->panel);
 236 }
 237
 238 static void
 239 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 240                                 struct drm_crtc_state *crtc_state,
 241                                 struct drm_connector_state *connector_state)
 242 {
 243         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 244         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 245         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 246         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 247         unsigned long serial_clk;
 248         unsigned long di_clk = mode->clock * 1000;
 249         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 250         u32 bus_format = imx_ldb_ch->bus_format;
 251
 252         if (mode->clock > 170000) {
 253                 dev_warn(ldb->dev,
 254                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 255         }
 256         if (mode->clock > 85000 && !dual) {
 257                 dev_warn(ldb->dev,
 258                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 259         }
 260
 261         if (dual) {
 262                 serial_clk = 3500UL * mode->clock;
 263                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 264                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 265         } else {
 266                 serial_clk = 7000UL * mode->clock;
 267                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 268                                   di_clk);
 269         }
 270
 271         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 272         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 273                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 274                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 275                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 276                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 277         }
 278         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 279                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 280                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 281                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 282                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 283         }
 284
 285         if (!bus_format) {
 286                 struct drm_connector *connector = connector_state->connector;
 287                 struct drm_display_info *di = &connector->display_info;
 288
 289                 if (di->num_bus_formats)
 290                         bus_format = di->bus_formats[0];
 291         }
 292         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 293 }
 294
 295 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 296 {
 297         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 298         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 299         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 300         int mux, ret;
 301
 302         drm_panel_disable(imx_ldb_ch->panel);
 303
 304         if (imx_ldb_ch == &ldb->channel[0] || dual)
 305                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 306         if (imx_ldb_ch == &ldb->channel[1] || dual)
 307                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 308
 309         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 310
 311         if (dual) {
 312                 clk_disable_unprepare(ldb->clk[0]);
 313                 clk_disable_unprepare(ldb->clk[1]);
 314         }
 315
 316         if (ldb->lvds_mux) {
 317                 const struct bus_mux *lvds_mux = NULL;
 318
 319                 if (imx_ldb_ch == &ldb->channel[0])
 320                         lvds_mux = &ldb->lvds_mux[0];
 321                 else if (imx_ldb_ch == &ldb->channel[1])
 322                         lvds_mux = &ldb->lvds_mux[1];
 323
 324                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 325                 mux &= lvds_mux->mask;
 326                 mux >>= lvds_mux->shift;
 327         } else {
 328                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 329         }
 330
 331         /* set display clock mux back to original input clock */
 332         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 333         if (ret)
 334                 dev_err(ldb->dev,
 335                         "unable to set di%d parent clock to original parent\n",
 336                         mux);
 337
 338         drm_panel_unprepare(imx_ldb_ch->panel);
 339 }
 340
 341 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 342                                         struct drm_crtc_state *crtc_state,
 343                                         struct drm_connector_state *conn_state)
 344 {
 345         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 346         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 347         struct drm_display_info *di = &conn_state->connector->display_info;
 348         u32 bus_format = imx_ldb_ch->bus_format;
 349
 350         /* Bus format description in DT overrides connector display info. */
 351         if (!bus_format && di->num_bus_formats) {
 352                 bus_format = di->bus_formats[0];
 353                 imx_crtc_state->bus_flags = di->bus_flags;
 354         } else {
 355                 bus_format = imx_ldb_ch->bus_format;
 356                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 357         }
 358         switch (bus_format) {
 359         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 360                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 361                 break;
 362         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 363         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 364                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 365                 break;
 366         default:
 367                 return -EINVAL;
 368         }
 369
 370         imx_crtc_state->di_hsync_pin = 2;
 371         imx_crtc_state->di_vsync_pin = 3;
 372
 373         return 0;
 374 }
 375
 376
 377 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 378         .fill_modes = drm_helper_probe_single_connector_modes,
 379         .destroy = imx_drm_connector_destroy,
 380         .reset = drm_atomic_helper_connector_reset,
 381         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 382         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 383 };
 384
 385 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 386         .get_modes = imx_ldb_connector_get_modes,
 387 };
 388
 389 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 390         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 391         .enable = imx_ldb_encoder_enable,
 392         .disable = imx_ldb_encoder_disable,
 393         .atomic_check = imx_ldb_encoder_atomic_check,
 394 };
 395
 396 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 397 {
 398         char clkname[16];
 399
 400         snprintf(clkname, sizeof(clkname), "di%d", chno);
 401         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 402         if (IS_ERR(ldb->clk[chno]))
 403                 return PTR_ERR(ldb->clk[chno]);
 404
 405         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 406         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 407
 408         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 409 }
 410
 411 static int imx_ldb_register(struct drm_device *drm,
 412         struct imx_ldb_channel *imx_ldb_ch)
 413 {
 414         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 415         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 416         int ret;
 417
 418         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 419         if (ret)
 420                 return ret;
 421
 422         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 423         if (ret)
 424                 return ret;
 425
 426         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 427                 ret = imx_ldb_get_clk(ldb, 1);
 428                 if (ret)
 429                         return ret;
 430         }
 431
 432         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 433         drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_LVDS);
 434
 435         if (imx_ldb_ch->bridge) {
 436                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 437                                         imx_ldb_ch->bridge, NULL, 0);
 438                 if (ret) {
 439                         DRM_ERROR("Failed to initialize bridge with drm\n");
 440                         return ret;
 441                 }
 442         } else {
 443                 /*
 444                  * We want to add the connector whenever there is no bridge
 445                  * that brings its own, not only when there is a panel. For
 446                  * historical reasons, the ldb driver can also work without
 447                  * a panel.
 448                  */
 449                 drm_connector_helper_add(&imx_ldb_ch->connector,
 450                                 &imx_ldb_connector_helper_funcs);
 451                 drm_connector_init_with_ddc(drm, &imx_ldb_ch->connector,
 452                                             &imx_ldb_connector_funcs,
 453                                             DRM_MODE_CONNECTOR_LVDS,
 454                                             imx_ldb_ch->ddc);
 455                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 456         }
 457
 458         if (imx_ldb_ch->panel) {
 459                 ret = drm_panel_attach(imx_ldb_ch->panel,
 460                                        &imx_ldb_ch->connector);
 461                 if (ret)
 462                         return ret;
 463         }
 464
 465         return 0;
 466 }
 467
 468 struct imx_ldb_bit_mapping {
 469         u32 bus_format;
 470         u32 datawidth;
 471         const char * const mapping;
 472 };
 473
 474 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 475         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 476         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 477         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 478 };
 479
 480 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 481 {
 482         const char *bm;
 483         u32 datawidth = 0;
 484         int ret, i;
 485
 486         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 487         if (ret < 0)
 488                 return ret;
 489
 490         of_property_read_u32(np, "fsl,data-width", &datawidth);
 491
 492         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 493                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 494                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 495                         return imx_ldb_bit_mappings[i].bus_format;
 496         }
 497
 498         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 499
 500         return -ENOENT;
 501 }
 502
 503 static struct bus_mux imx6q_lvds_mux[2] = {
 504         {
 505                 .reg = IOMUXC_GPR3,
 506                 .shift = 6,
 507                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 508         }, {
 509                 .reg = IOMUXC_GPR3,
 510                 .shift = 8,
 511                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 512         }
 513 };
 514
 515 /*
 516  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 517  * of_match_device will walk through this list and take the first entry
 518  * matching any of its compatible values. Therefore, the more generic
 519  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 520  */
 521 static const struct of_device_id imx_ldb_dt_ids[] = {
 522         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 523         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 524         { }
 525 };
 526 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 527
 528 static int imx_ldb_panel_ddc(struct device *dev,
 529                 struct imx_ldb_channel *channel, struct device_node *child)
 530 {
 531         struct device_node *ddc_node;
 532         const u8 *edidp;
 533         int ret;
 534
 535         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 536         if (ddc_node) {
 537                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 538                 of_node_put(ddc_node);
 539                 if (!channel->ddc) {
 540                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 541                         return -EPROBE_DEFER;
 542                 }
 543         }
 544
 545         if (!channel->ddc) {
 546                 /* if no DDC available, fallback to hardcoded EDID */
 547                 dev_dbg(dev, "no ddc available\n");
 548
 549                 edidp = of_get_property(child, "edid",
 550                                         &channel->edid_len);
 551                 if (edidp) {
 552                         channel->edid = kmemdup(edidp,
 553                                                 channel->edid_len,
 554                                                 GFP_KERNEL);
 555                 } else if (!channel->panel) {
 556                         /* fallback to display-timings node */
 557                         ret = of_get_drm_display_mode(child,
 558                                                       &channel->mode,
 559                                                       &channel->bus_flags,
 560                                                       OF_USE_NATIVE_MODE);
 561                         if (!ret)
 562                                 channel->mode_valid = 1;
 563                 }
 564         }
 565         return 0;
 566 }
 567
 568 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 569 {
 570         struct drm_device *drm = data;
 571         struct device_node *np = dev->of_node;
 572         const struct of_device_id *of_id =
 573                         of_match_device(imx_ldb_dt_ids, dev);
 574         struct device_node *child;
 575         struct imx_ldb *imx_ldb;
 576         int dual;
 577         int ret;
 578         int i;
 579
 580         imx_ldb = dev_get_drvdata(dev);
 581         memset(imx_ldb, 0, sizeof(*imx_ldb));
 582
 583         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 584         if (IS_ERR(imx_ldb->regmap)) {
 585                 dev_err(dev, "failed to get parent regmap\n");
 586                 return PTR_ERR(imx_ldb->regmap);
 587         }
 588
 589         /* disable LDB by resetting the control register to POR default */
 590         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 591
 592         imx_ldb->dev = dev;
 593
 594         if (of_id)
 595                 imx_ldb->lvds_mux = of_id->data;
 596
 597         dual = of_property_read_bool(np, "fsl,dual-channel");
 598         if (dual)
 599                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 600
 601         /*
 602          * There are three different possible clock mux configurations:
 603          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 604          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 605          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 606          * Map them all to di0_sel...di3_sel.
 607          */
 608         for (i = 0; i < 4; i++) {
 609                 char clkname[16];
 610
 611                 sprintf(clkname, "di%d_sel", i);
 612                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 613                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 614                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 615                         imx_ldb->clk_sel[i] = NULL;
 616                         break;
 617                 }
 618
 619                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 620         }
 621         if (i == 0)
 622                 return ret;
 623
 624         for_each_child_of_node(np, child) {
 625                 struct imx_ldb_channel *channel;
 626                 int bus_format;
 627
 628                 ret = of_property_read_u32(child, "reg", &i);
 629                 if (ret || i < 0 || i > 1) {
 630                         ret = -EINVAL;
 631                         goto free_child;
 632                 }
 633
 634                 if (!of_device_is_available(child))
 635                         continue;
 636
 637                 if (dual && i > 0) {
 638                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 639                         continue;
 640                 }
 641
 642                 channel = &imx_ldb->channel[i];
 643                 channel->ldb = imx_ldb;
 644                 channel->chno = i;
 645
 646                 /*
 647                  * The output port is port@4 with an external 4-port mux or
 648                  * port@2 with the internal 2-port mux.
 649                  */
 650                 ret = drm_of_find_panel_or_bridge(child,
 651                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 652                                                   &channel->panel, &channel->bridge);
 653                 if (ret && ret != -ENODEV)
 654                         goto free_child;
 655
 656                 /* panel ddc only if there is no bridge */
 657                 if (!channel->bridge) {
 658                         ret = imx_ldb_panel_ddc(dev, channel, child);
 659                         if (ret)
 660                                 goto free_child;
 661                 }
 662
 663                 bus_format = of_get_bus_format(dev, child);
 664                 if (bus_format == -EINVAL) {
 665                         /*
 666                          * If no bus format was specified in the device tree,
 667                          * we can still get it from the connected panel later.
 668                          */
 669                         if (channel->panel && channel->panel->funcs &&
 670                             channel->panel->funcs->get_modes)
 671                                 bus_format = 0;
 672                 }
 673                 if (bus_format < 0) {
 674                         dev_err(dev, "could not determine data mapping: %d\n",
 675                                 bus_format);
 676                         ret = bus_format;
 677                         goto free_child;
 678                 }
 679                 channel->bus_format = bus_format;
 680                 channel->child = child;
 681
 682                 ret = imx_ldb_register(drm, channel);
 683                 if (ret) {
 684                         channel->child = NULL;
 685                         goto free_child;
 686                 }
 687         }
 688
 689         return 0;
 690
 691 free_child:
 692         of_node_put(child);
 693         return ret;
 694 }
 695
 696 static void imx_ldb_unbind(struct device *dev, struct device *master,
 697         void *data)
 698 {
 699         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 700         int i;
 701
 702         for (i = 0; i < 2; i++) {
 703                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 704
 705                 if (channel->panel)
 706                         drm_panel_detach(channel->panel);
 707
 708                 kfree(channel->edid);
 709                 i2c_put_adapter(channel->ddc);
 710         }
 711 }
 712
 713 static const struct component_ops imx_ldb_ops = {
 714         .bind   = imx_ldb_bind,
 715         .unbind = imx_ldb_unbind,
 716 };
 717
 718 static int imx_ldb_probe(struct platform_device *pdev)
 719 {
 720         struct imx_ldb *imx_ldb;
 721
 722         imx_ldb = devm_kzalloc(&pdev->dev, sizeof(*imx_ldb), GFP_KERNEL);
 723         if (!imx_ldb)
 724                 return -ENOMEM;
 725
 726         platform_set_drvdata(pdev, imx_ldb);
 727
 728         return component_add(&pdev->dev, &imx_ldb_ops);
 729 }
 730
 731 static int imx_ldb_remove(struct platform_device *pdev)
 732 {
 733         component_del(&pdev->dev, &imx_ldb_ops);
 734         return 0;
 735 }
 736
 737 static struct platform_driver imx_ldb_driver = {
 738         .probe          = imx_ldb_probe,
 739         .remove         = imx_ldb_remove,
 740         .driver         = {
 741                 .of_match_table = imx_ldb_dt_ids,
 742                 .name   = DRIVER_NAME,
 743         },
 744 };
 745
 746 module_platform_driver(imx_ldb_driver);
 747
 748 MODULE_DESCRIPTION("i.MX LVDS driver");
 749 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 750 MODULE_LICENSE("GPL");
 751 MODULE_ALIAS("platform:" DRIVER_NAME);