drivers/gpu/drm/i915/selftests/huge_pages.c

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include "../i915_selftest.h"
  26
  27 #include <linux/prime_numbers.h>
  28
  29 #include "mock_drm.h"
  30 #include "i915_random.h"
  31
  32 static const unsigned int page_sizes[] = {
  33         I915_GTT_PAGE_SIZE_2M,
  34         I915_GTT_PAGE_SIZE_64K,
  35         I915_GTT_PAGE_SIZE_4K,
  36 };
  37
  38 static unsigned int get_largest_page_size(struct drm_i915_private *i915,
  39                                           u64 rem)
  40 {
  41         int i;
  42
  43         for (i = 0; i < ARRAY_SIZE(page_sizes); ++i) {
  44                 unsigned int page_size = page_sizes[i];
  45
  46                 if (HAS_PAGE_SIZES(i915, page_size) && rem >= page_size)
  47                         return page_size;
  48         }
  49
  50         return 0;
  51 }
  52
  53 static void huge_pages_free_pages(struct sg_table *st)
  54 {
  55         struct scatterlist *sg;
  56
  57         for (sg = st->sgl; sg; sg = __sg_next(sg)) {
  58                 if (sg_page(sg))
  59                         __free_pages(sg_page(sg), get_order(sg->length));
  60         }
  61
  62         sg_free_table(st);
  63         kfree(st);
  64 }
  65
  66 static int get_huge_pages(struct drm_i915_gem_object *obj)
  67 {
  68 #define GFP (GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY)
  69         unsigned int page_mask = obj->mm.page_mask;
  70         struct sg_table *st;
  71         struct scatterlist *sg;
  72         unsigned int sg_page_sizes;
  73         u64 rem;
  74
  75         st = kmalloc(sizeof(*st), GFP);
  76         if (!st)
  77                 return -ENOMEM;
  78
  79         if (sg_alloc_table(st, obj->base.size >> PAGE_SHIFT, GFP)) {
  80                 kfree(st);
  81                 return -ENOMEM;
  82         }
  83
  84         rem = obj->base.size;
  85         sg = st->sgl;
  86         st->nents = 0;
  87         sg_page_sizes = 0;
  88
  89         /*
  90          * Our goal here is simple, we want to greedily fill the object from
  91          * largest to smallest page-size, while ensuring that we use *every*
  92          * page-size as per the given page-mask.
  93          */
  94         do {
  95                 unsigned int bit = ilog2(page_mask);
  96                 unsigned int page_size = BIT(bit);
  97                 int order = get_order(page_size);
  98
  99                 do {
 100                         struct page *page;
 101
 102                         GEM_BUG_ON(order >= MAX_ORDER);
 103                         page = alloc_pages(GFP | __GFP_ZERO, order);
 104                         if (!page)
 105                                 goto err;
 106
 107                         sg_set_page(sg, page, page_size, 0);
 108                         sg_page_sizes |= page_size;
 109                         st->nents++;
 110
 111                         rem -= page_size;
 112                         if (!rem) {
 113                                 sg_mark_end(sg);
 114                                 break;
 115                         }
 116
 117                         sg = __sg_next(sg);
 118                 } while ((rem - ((page_size-1) & page_mask)) >= page_size);
 119
 120                 page_mask &= (page_size-1);
 121         } while (page_mask);
 122
 123         if (i915_gem_gtt_prepare_pages(obj, st))
 124                 goto err;
 125
 126         obj->mm.madv = I915_MADV_DONTNEED;
 127
 128         GEM_BUG_ON(sg_page_sizes != obj->mm.page_mask);
 129         __i915_gem_object_set_pages(obj, st, sg_page_sizes);
 130
 131         return 0;
 132
 133 err:
 134         sg_set_page(sg, NULL, 0, 0);
 135         sg_mark_end(sg);
 136         huge_pages_free_pages(st);
 137
 138         return -ENOMEM;
 139 }
 140
 141 static void put_huge_pages(struct drm_i915_gem_object *obj,
 142                            struct sg_table *pages)
 143 {
 144         i915_gem_gtt_finish_pages(obj, pages);
 145         huge_pages_free_pages(pages);
 146
 147         obj->mm.dirty = false;
 148         obj->mm.madv = I915_MADV_WILLNEED;
 149 }
 150
 151 static const struct drm_i915_gem_object_ops huge_page_ops = {
 152         .flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE |
 153                  I915_GEM_OBJECT_IS_SHRINKABLE,
 154         .get_pages = get_huge_pages,
 155         .put_pages = put_huge_pages,
 156 };
 157
 158 static struct drm_i915_gem_object *
 159 huge_pages_object(struct drm_i915_private *i915,
 160                   u64 size,
 161                   unsigned int page_mask)
 162 {
 163         struct drm_i915_gem_object *obj;
 164
 165         GEM_BUG_ON(!size);
 166         GEM_BUG_ON(!IS_ALIGNED(size, BIT(__ffs(page_mask))));
 167
 168         if (size >> PAGE_SHIFT > INT_MAX)
 169                 return ERR_PTR(-E2BIG);
 170
 171         if (overflows_type(size, obj->base.size))
 172                 return ERR_PTR(-E2BIG);
 173
 174         obj = i915_gem_object_alloc();
 175         if (!obj)
 176                 return ERR_PTR(-ENOMEM);
 177
 178         drm_gem_private_object_init(&i915->drm, &obj->base, size);
 179         i915_gem_object_init(obj, &huge_page_ops);
 180
 181         obj->write_domain = I915_GEM_DOMAIN_CPU;
 182         obj->read_domains = I915_GEM_DOMAIN_CPU;
 183         obj->cache_level = I915_CACHE_NONE;
 184
 185         obj->mm.page_mask = page_mask;
 186
 187         return obj;
 188 }
 189
 190 static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
 191 {
 192         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 193         const u64 max_len = rounddown_pow_of_two(UINT_MAX);
 194         struct sg_table *st;
 195         struct scatterlist *sg;
 196         unsigned int sg_page_sizes;
 197         u64 rem;
 198
 199         st = kmalloc(sizeof(*st), GFP);
 200         if (!st)
 201                 return -ENOMEM;
 202
 203         if (sg_alloc_table(st, obj->base.size >> PAGE_SHIFT, GFP)) {
 204                 kfree(st);
 205                 return -ENOMEM;
 206         }
 207
 208         /* Use optimal page sized chunks to fill in the sg table */
 209         rem = obj->base.size;
 210         sg = st->sgl;
 211         st->nents = 0;
 212         sg_page_sizes = 0;
 213         do {
 214                 unsigned int page_size = get_largest_page_size(i915, rem);
 215                 unsigned int len = min(page_size * div_u64(rem, page_size),
 216                                        max_len);
 217
 218                 GEM_BUG_ON(!page_size);
 219
 220                 sg->offset = 0;
 221                 sg->length = len;
 222                 sg_dma_len(sg) = len;
 223                 sg_dma_address(sg) = page_size;
 224
 225                 sg_page_sizes |= len;
 226
 227                 st->nents++;
 228
 229                 rem -= len;
 230                 if (!rem) {
 231                         sg_mark_end(sg);
 232                         break;
 233                 }
 234
 235                 sg = sg_next(sg);
 236         } while (1);
 237
 238         i915_sg_trim(st);
 239
 240         obj->mm.madv = I915_MADV_DONTNEED;
 241
 242         __i915_gem_object_set_pages(obj, st, sg_page_sizes);
 243
 244         return 0;
 245 }
 246
 247 static int fake_get_huge_pages_single(struct drm_i915_gem_object *obj)
 248 {
 249         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 250         struct sg_table *st;
 251         struct scatterlist *sg;
 252         unsigned int page_size;
 253
 254         st = kmalloc(sizeof(*st), GFP);
 255         if (!st)
 256                 return -ENOMEM;
 257
 258         if (sg_alloc_table(st, 1, GFP)) {
 259                 kfree(st);
 260                 return -ENOMEM;
 261         }
 262
 263         sg = st->sgl;
 264         st->nents = 1;
 265
 266         page_size = get_largest_page_size(i915, obj->base.size);
 267         GEM_BUG_ON(!page_size);
 268
 269         sg->offset = 0;
 270         sg->length = obj->base.size;
 271         sg_dma_len(sg) = obj->base.size;
 272         sg_dma_address(sg) = page_size;
 273
 274         obj->mm.madv = I915_MADV_DONTNEED;
 275
 276         __i915_gem_object_set_pages(obj, st, sg->length);
 277
 278         return 0;
 279 #undef GFP
 280 }
 281
 282 static void fake_free_huge_pages(struct drm_i915_gem_object *obj,
 283                                  struct sg_table *pages)
 284 {
 285         sg_free_table(pages);
 286         kfree(pages);
 287 }
 288
 289 static void fake_put_huge_pages(struct drm_i915_gem_object *obj,
 290                                 struct sg_table *pages)
 291 {
 292         fake_free_huge_pages(obj, pages);
 293         obj->mm.dirty = false;
 294         obj->mm.madv = I915_MADV_WILLNEED;
 295 }
 296
 297 static const struct drm_i915_gem_object_ops fake_ops = {
 298         .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
 299         .get_pages = fake_get_huge_pages,
 300         .put_pages = fake_put_huge_pages,
 301 };
 302
 303 static const struct drm_i915_gem_object_ops fake_ops_single = {
 304         .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
 305         .get_pages = fake_get_huge_pages_single,
 306         .put_pages = fake_put_huge_pages,
 307 };
 308
 309 static struct drm_i915_gem_object *
 310 fake_huge_pages_object(struct drm_i915_private *i915, u64 size, bool single)
 311 {
 312         struct drm_i915_gem_object *obj;
 313
 314         GEM_BUG_ON(!size);
 315         GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
 316
 317         if (size >> PAGE_SHIFT > UINT_MAX)
 318                 return ERR_PTR(-E2BIG);
 319
 320         if (overflows_type(size, obj->base.size))
 321                 return ERR_PTR(-E2BIG);
 322
 323         obj = i915_gem_object_alloc();
 324         if (!obj)
 325                 return ERR_PTR(-ENOMEM);
 326
 327         drm_gem_private_object_init(&i915->drm, &obj->base, size);
 328
 329         if (single)
 330                 i915_gem_object_init(obj, &fake_ops_single);
 331         else
 332                 i915_gem_object_init(obj, &fake_ops);
 333
 334         obj->write_domain = I915_GEM_DOMAIN_CPU;
 335         obj->read_domains = I915_GEM_DOMAIN_CPU;
 336         obj->cache_level = I915_CACHE_NONE;
 337
 338         return obj;
 339 }
 340
 341 static int igt_check_page_sizes(struct i915_vma *vma)
 342 {
 343         struct drm_i915_private *i915 = vma->vm->i915;
 344         unsigned int supported = INTEL_INFO(i915)->page_sizes;
 345         struct drm_i915_gem_object *obj = vma->obj;
 346         int err = 0;
 347
 348         if (!HAS_PAGE_SIZES(i915, vma->page_sizes.sg)) {
 349                 pr_err("unsupported page_sizes.sg=%u, supported=%u\n",
 350                        vma->page_sizes.sg & ~supported, supported);
 351                 err = -EINVAL;
 352         }
 353
 354         if (!HAS_PAGE_SIZES(i915, vma->page_sizes.gtt)) {
 355                 pr_err("unsupported page_sizes.gtt=%u, supported=%u\n",
 356                        vma->page_sizes.gtt & ~supported, supported);
 357                 err = -EINVAL;
 358         }
 359
 360         if (vma->page_sizes.phys != obj->mm.page_sizes.phys) {
 361                 pr_err("vma->page_sizes.phys(%u) != obj->mm.page_sizes.phys(%u)\n",
 362                        vma->page_sizes.phys, obj->mm.page_sizes.phys);
 363                 err = -EINVAL;
 364         }
 365
 366         if (vma->page_sizes.sg != obj->mm.page_sizes.sg) {
 367                 pr_err("vma->page_sizes.sg(%u) != obj->mm.page_sizes.sg(%u)\n",
 368                        vma->page_sizes.sg, obj->mm.page_sizes.sg);
 369                 err = -EINVAL;
 370         }
 371
 372         if (obj->mm.page_sizes.gtt) {
 373                 pr_err("obj->page_sizes.gtt(%u) should never be set\n",
 374                        obj->mm.page_sizes.gtt);
 375                 err = -EINVAL;
 376         }
 377
 378         return err;
 379 }
 380
 381 static int igt_mock_exhaust_device_supported_pages(void *arg)
 382 {
 383         struct i915_hw_ppgtt *ppgtt = arg;
 384         struct drm_i915_private *i915 = ppgtt->vm.i915;
 385         unsigned int saved_mask = INTEL_INFO(i915)->page_sizes;
 386         struct drm_i915_gem_object *obj;
 387         struct i915_vma *vma;
 388         int i, j, single;
 389         int err;
 390
 391         /*
 392          * Sanity check creating objects with every valid page support
 393          * combination for our mock device.
 394          */
 395
 396         for (i = 1; i < BIT(ARRAY_SIZE(page_sizes)); i++) {
 397                 unsigned int combination = 0;
 398
 399                 for (j = 0; j < ARRAY_SIZE(page_sizes); j++) {
 400                         if (i & BIT(j))
 401                                 combination |= page_sizes[j];
 402                 }
 403
 404                 mkwrite_device_info(i915)->page_sizes = combination;
 405
 406                 for (single = 0; single <= 1; ++single) {
 407                         obj = fake_huge_pages_object(i915, combination, !!single);
 408                         if (IS_ERR(obj)) {
 409                                 err = PTR_ERR(obj);
 410                                 goto out_device;
 411                         }
 412
 413                         if (obj->base.size != combination) {
 414                                 pr_err("obj->base.size=%zu, expected=%u\n",
 415                                        obj->base.size, combination);
 416                                 err = -EINVAL;
 417                                 goto out_put;
 418                         }
 419
 420                         vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
 421                         if (IS_ERR(vma)) {
 422                                 err = PTR_ERR(vma);
 423                                 goto out_put;
 424                         }
 425
 426                         err = i915_vma_pin(vma, 0, 0, PIN_USER);
 427                         if (err)
 428                                 goto out_close;
 429
 430                         err = igt_check_page_sizes(vma);
 431
 432                         if (vma->page_sizes.sg != combination) {
 433                                 pr_err("page_sizes.sg=%u, expected=%u\n",
 434                                        vma->page_sizes.sg, combination);
 435                                 err = -EINVAL;
 436                         }
 437
 438                         i915_vma_unpin(vma);
 439                         i915_vma_close(vma);
 440
 441                         i915_gem_object_put(obj);
 442
 443                         if (err)
 444                                 goto out_device;
 445                 }
 446         }
 447
 448         goto out_device;
 449
 450 out_close:
 451         i915_vma_close(vma);
 452 out_put:
 453         i915_gem_object_put(obj);
 454 out_device:
 455         mkwrite_device_info(i915)->page_sizes = saved_mask;
 456
 457         return err;
 458 }
 459
 460 static int igt_mock_ppgtt_misaligned_dma(void *arg)
 461 {
 462         struct i915_hw_ppgtt *ppgtt = arg;
 463         struct drm_i915_private *i915 = ppgtt->vm.i915;
 464         unsigned long supported = INTEL_INFO(i915)->page_sizes;
 465         struct drm_i915_gem_object *obj;
 466         int bit;
 467         int err;
 468
 469         /*
 470          * Sanity check dma misalignment for huge pages -- the dma addresses we
 471          * insert into the paging structures need to always respect the page
 472          * size alignment.
 473          */
 474
 475         bit = ilog2(I915_GTT_PAGE_SIZE_64K);
 476
 477         for_each_set_bit_from(bit, &supported,
 478                               ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
 479                 IGT_TIMEOUT(end_time);
 480                 unsigned int page_size = BIT(bit);
 481                 unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
 482                 unsigned int offset;
 483                 unsigned int size =
 484                         round_up(page_size, I915_GTT_PAGE_SIZE_2M) << 1;
 485                 struct i915_vma *vma;
 486
 487                 obj = fake_huge_pages_object(i915, size, true);
 488                 if (IS_ERR(obj))
 489                         return PTR_ERR(obj);
 490
 491                 if (obj->base.size != size) {
 492                         pr_err("obj->base.size=%zu, expected=%u\n",
 493                                obj->base.size, size);
 494                         err = -EINVAL;
 495                         goto out_put;
 496                 }
 497
 498                 err = i915_gem_object_pin_pages(obj);
 499                 if (err)
 500                         goto out_put;
 501
 502                 /* Force the page size for this object */
 503                 obj->mm.page_sizes.sg = page_size;
 504
 505                 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
 506                 if (IS_ERR(vma)) {
 507                         err = PTR_ERR(vma);
 508                         goto out_unpin;
 509                 }
 510
 511                 err = i915_vma_pin(vma, 0, 0, flags);
 512                 if (err) {
 513                         i915_vma_close(vma);
 514                         goto out_unpin;
 515                 }
 516
 517
 518                 err = igt_check_page_sizes(vma);
 519
 520                 if (vma->page_sizes.gtt != page_size) {
 521                         pr_err("page_sizes.gtt=%u, expected %u\n",
 522                                vma->page_sizes.gtt, page_size);
 523                         err = -EINVAL;
 524                 }
 525
 526                 i915_vma_unpin(vma);
 527
 528                 if (err) {
 529                         i915_vma_close(vma);
 530                         goto out_unpin;
 531                 }
 532
 533                 /*
 534                  * Try all the other valid offsets until the next
 535                  * boundary -- should always fall back to using 4K
 536                  * pages.
 537                  */
 538                 for (offset = 4096; offset < page_size; offset += 4096) {
 539                         err = i915_vma_unbind(vma);
 540                         if (err) {
 541                                 i915_vma_close(vma);
 542                                 goto out_unpin;
 543                         }
 544
 545                         err = i915_vma_pin(vma, 0, 0, flags | offset);
 546                         if (err) {
 547                                 i915_vma_close(vma);
 548                                 goto out_unpin;
 549                         }
 550
 551                         err = igt_check_page_sizes(vma);
 552
 553                         if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
 554                                 pr_err("page_sizes.gtt=%u, expected %llu\n",
 555                                        vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
 556                                 err = -EINVAL;
 557                         }
 558
 559                         i915_vma_unpin(vma);
 560
 561                         if (err) {
 562                                 i915_vma_close(vma);
 563                                 goto out_unpin;
 564                         }
 565
 566                         if (igt_timeout(end_time,
 567                                         "%s timed out at offset %x with page-size %x\n",
 568                                         __func__, offset, page_size))
 569                                 break;
 570                 }
 571
 572                 i915_vma_close(vma);
 573
 574                 i915_gem_object_unpin_pages(obj);
 575                 __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
 576                 i915_gem_object_put(obj);
 577         }
 578
 579         return 0;
 580
 581 out_unpin:
 582         i915_gem_object_unpin_pages(obj);
 583 out_put:
 584         i915_gem_object_put(obj);
 585
 586         return err;
 587 }
 588
 589 static void close_object_list(struct list_head *objects,
 590                               struct i915_hw_ppgtt *ppgtt)
 591 {
 592         struct drm_i915_gem_object *obj, *on;
 593
 594         list_for_each_entry_safe(obj, on, objects, st_link) {
 595                 struct i915_vma *vma;
 596
 597                 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
 598                 if (!IS_ERR(vma))
 599                         i915_vma_close(vma);
 600
 601                 list_del(&obj->st_link);
 602                 i915_gem_object_unpin_pages(obj);
 603                 __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
 604                 i915_gem_object_put(obj);
 605         }
 606 }
 607
 608 static int igt_mock_ppgtt_huge_fill(void *arg)
 609 {
 610         struct i915_hw_ppgtt *ppgtt = arg;
 611         struct drm_i915_private *i915 = ppgtt->vm.i915;
 612         unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
 613         unsigned long page_num;
 614         bool single = false;
 615         LIST_HEAD(objects);
 616         IGT_TIMEOUT(end_time);
 617         int err = -ENODEV;
 618
 619         for_each_prime_number_from(page_num, 1, max_pages) {
 620                 struct drm_i915_gem_object *obj;
 621                 u64 size = page_num << PAGE_SHIFT;
 622                 struct i915_vma *vma;
 623                 unsigned int expected_gtt = 0;
 624                 int i;
 625
 626                 obj = fake_huge_pages_object(i915, size, single);
 627                 if (IS_ERR(obj)) {
 628                         err = PTR_ERR(obj);
 629                         break;
 630                 }
 631
 632                 if (obj->base.size != size) {
 633                         pr_err("obj->base.size=%zd, expected=%llu\n",
 634                                obj->base.size, size);
 635                         i915_gem_object_put(obj);
 636                         err = -EINVAL;
 637                         break;
 638                 }
 639
 640                 err = i915_gem_object_pin_pages(obj);
 641                 if (err) {
 642                         i915_gem_object_put(obj);
 643                         break;
 644                 }
 645
 646                 list_add(&obj->st_link, &objects);
 647
 648                 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
 649                 if (IS_ERR(vma)) {
 650                         err = PTR_ERR(vma);
 651                         break;
 652                 }
 653
 654                 err = i915_vma_pin(vma, 0, 0, PIN_USER);
 655                 if (err)
 656                         break;
 657
 658                 err = igt_check_page_sizes(vma);
 659                 if (err) {
 660                         i915_vma_unpin(vma);
 661                         break;
 662                 }
 663
 664                 /*
 665                  * Figure out the expected gtt page size knowing that we go from
 666                  * largest to smallest page size sg chunks, and that we align to
 667                  * the largest page size.
 668                  */
 669                 for (i = 0; i < ARRAY_SIZE(page_sizes); ++i) {
 670                         unsigned int page_size = page_sizes[i];
 671
 672                         if (HAS_PAGE_SIZES(i915, page_size) &&
 673                             size >= page_size) {
 674                                 expected_gtt |= page_size;
 675                                 size &= page_size-1;
 676                         }
 677                 }
 678
 679                 GEM_BUG_ON(!expected_gtt);
 680                 GEM_BUG_ON(size);
 681
 682                 if (expected_gtt & I915_GTT_PAGE_SIZE_4K)
 683                         expected_gtt &= ~I915_GTT_PAGE_SIZE_64K;
 684
 685                 i915_vma_unpin(vma);
 686
 687                 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
 688                         if (!IS_ALIGNED(vma->node.start,
 689                                         I915_GTT_PAGE_SIZE_2M)) {
 690                                 pr_err("node.start(%llx) not aligned to 2M\n",
 691                                        vma->node.start);
 692                                 err = -EINVAL;
 693                                 break;
 694                         }
 695
 696                         if (!IS_ALIGNED(vma->node.size,
 697                                         I915_GTT_PAGE_SIZE_2M)) {
 698                                 pr_err("node.size(%llx) not aligned to 2M\n",
 699                                        vma->node.size);
 700                                 err = -EINVAL;
 701                                 break;
 702                         }
 703                 }
 704
 705                 if (vma->page_sizes.gtt != expected_gtt) {
 706                         pr_err("gtt=%u, expected=%u, size=%zd, single=%s\n",
 707                                vma->page_sizes.gtt, expected_gtt,
 708                                obj->base.size, yesno(!!single));
 709                         err = -EINVAL;
 710                         break;
 711                 }
 712
 713                 if (igt_timeout(end_time,
 714                                 "%s timed out at size %zd\n",
 715                                 __func__, obj->base.size))
 716                         break;
 717
 718                 single = !single;
 719         }
 720
 721         close_object_list(&objects, ppgtt);
 722
 723         if (err == -ENOMEM || err == -ENOSPC)
 724                 err = 0;
 725
 726         return err;
 727 }
 728
 729 static int igt_mock_ppgtt_64K(void *arg)
 730 {
 731         struct i915_hw_ppgtt *ppgtt = arg;
 732         struct drm_i915_private *i915 = ppgtt->vm.i915;
 733         struct drm_i915_gem_object *obj;
 734         const struct object_info {
 735                 unsigned int size;
 736                 unsigned int gtt;
 737                 unsigned int offset;
 738         } objects[] = {
 739                 /* Cases with forced padding/alignment */
 740                 {
 741                         .size = SZ_64K,
 742                         .gtt = I915_GTT_PAGE_SIZE_64K,
 743                         .offset = 0,
 744                 },
 745                 {
 746                         .size = SZ_64K + SZ_4K,
 747                         .gtt = I915_GTT_PAGE_SIZE_4K,
 748                         .offset = 0,
 749                 },
 750                 {
 751                         .size = SZ_64K - SZ_4K,
 752                         .gtt = I915_GTT_PAGE_SIZE_4K,
 753                         .offset = 0,
 754                 },
 755                 {
 756                         .size = SZ_2M,
 757                         .gtt = I915_GTT_PAGE_SIZE_64K,
 758                         .offset = 0,
 759                 },
 760                 {
 761                         .size = SZ_2M - SZ_4K,
 762                         .gtt = I915_GTT_PAGE_SIZE_4K,
 763                         .offset = 0,
 764                 },
 765                 {
 766                         .size = SZ_2M + SZ_4K,
 767                         .gtt = I915_GTT_PAGE_SIZE_64K | I915_GTT_PAGE_SIZE_4K,
 768                         .offset = 0,
 769                 },
 770                 {
 771                         .size = SZ_2M + SZ_64K,
 772                         .gtt = I915_GTT_PAGE_SIZE_64K,
 773                         .offset = 0,
 774                 },
 775                 {
 776                         .size = SZ_2M - SZ_64K,
 777                         .gtt = I915_GTT_PAGE_SIZE_64K,
 778                         .offset = 0,
 779                 },
 780                 /* Try without any forced padding/alignment */
 781                 {
 782                         .size = SZ_64K,
 783                         .offset = SZ_2M,
 784                         .gtt = I915_GTT_PAGE_SIZE_4K,
 785                 },
 786                 {
 787                         .size = SZ_128K,
 788                         .offset = SZ_2M - SZ_64K,
 789                         .gtt = I915_GTT_PAGE_SIZE_4K,
 790                 },
 791         };
 792         struct i915_vma *vma;
 793         int i, single;
 794         int err;
 795
 796         /*
 797          * Sanity check some of the trickiness with 64K pages -- either we can
 798          * safely mark the whole page-table(2M block) as 64K, or we have to
 799          * always fallback to 4K.
 800          */
 801
 802         if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K))
 803                 return 0;
 804
 805         for (i = 0; i < ARRAY_SIZE(objects); ++i) {
 806                 unsigned int size = objects[i].size;
 807                 unsigned int expected_gtt = objects[i].gtt;
 808                 unsigned int offset = objects[i].offset;
 809                 unsigned int flags = PIN_USER;
 810
 811                 for (single = 0; single <= 1; single++) {
 812                         obj = fake_huge_pages_object(i915, size, !!single);
 813                         if (IS_ERR(obj))
 814                                 return PTR_ERR(obj);
 815
 816                         err = i915_gem_object_pin_pages(obj);
 817                         if (err)
 818                                 goto out_object_put;
 819
 820                         /*
 821                          * Disable 2M pages -- We only want to use 64K/4K pages
 822                          * for this test.
 823                          */
 824                         obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
 825
 826                         vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
 827                         if (IS_ERR(vma)) {
 828                                 err = PTR_ERR(vma);
 829                                 goto out_object_unpin;
 830                         }
 831
 832                         if (offset)
 833                                 flags |= PIN_OFFSET_FIXED | offset;
 834
 835                         err = i915_vma_pin(vma, 0, 0, flags);
 836                         if (err)
 837                                 goto out_vma_close;
 838
 839                         err = igt_check_page_sizes(vma);
 840                         if (err)
 841                                 goto out_vma_unpin;
 842
 843                         if (!offset && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
 844                                 if (!IS_ALIGNED(vma->node.start,
 845                                                 I915_GTT_PAGE_SIZE_2M)) {
 846                                         pr_err("node.start(%llx) not aligned to 2M\n",
 847                                                vma->node.start);
 848                                         err = -EINVAL;
 849                                         goto out_vma_unpin;
 850                                 }
 851
 852                                 if (!IS_ALIGNED(vma->node.size,
 853                                                 I915_GTT_PAGE_SIZE_2M)) {
 854                                         pr_err("node.size(%llx) not aligned to 2M\n",
 855                                                vma->node.size);
 856                                         err = -EINVAL;
 857                                         goto out_vma_unpin;
 858                                 }
 859                         }
 860
 861                         if (vma->page_sizes.gtt != expected_gtt) {
 862                                 pr_err("gtt=%u, expected=%u, i=%d, single=%s\n",
 863                                        vma->page_sizes.gtt, expected_gtt, i,
 864                                        yesno(!!single));
 865                                 err = -EINVAL;
 866                                 goto out_vma_unpin;
 867                         }
 868
 869                         i915_vma_unpin(vma);
 870                         i915_vma_close(vma);
 871
 872                         i915_gem_object_unpin_pages(obj);
 873                         __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
 874                         i915_gem_object_put(obj);
 875                 }
 876         }
 877
 878         return 0;
 879
 880 out_vma_unpin:
 881         i915_vma_unpin(vma);
 882 out_vma_close:
 883         i915_vma_close(vma);
 884 out_object_unpin:
 885         i915_gem_object_unpin_pages(obj);
 886 out_object_put:
 887         i915_gem_object_put(obj);
 888
 889         return err;
 890 }
 891
 892 static struct i915_vma *
 893 gpu_write_dw(struct i915_vma *vma, u64 offset, u32 val)
 894 {
 895         struct drm_i915_private *i915 = vma->vm->i915;
 896         const int gen = INTEL_GEN(i915);
 897         unsigned int count = vma->size >> PAGE_SHIFT;
 898         struct drm_i915_gem_object *obj;
 899         struct i915_vma *batch;
 900         unsigned int size;
 901         u32 *cmd;
 902         int n;
 903         int err;
 904
 905         size = (1 + 4 * count) * sizeof(u32);
 906         size = round_up(size, PAGE_SIZE);
 907         obj = i915_gem_object_create_internal(i915, size);
 908         if (IS_ERR(obj))
 909                 return ERR_CAST(obj);
 910
 911         cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
 912         if (IS_ERR(cmd)) {
 913                 err = PTR_ERR(cmd);
 914                 goto err;
 915         }
 916
 917         offset += vma->node.start;
 918
 919         for (n = 0; n < count; n++) {
 920                 if (gen >= 8) {
 921                         *cmd++ = MI_STORE_DWORD_IMM_GEN4;
 922                         *cmd++ = lower_32_bits(offset);
 923                         *cmd++ = upper_32_bits(offset);
 924                         *cmd++ = val;
 925                 } else if (gen >= 4) {
 926                         *cmd++ = MI_STORE_DWORD_IMM_GEN4 |
 927                                 (gen < 6 ? MI_USE_GGTT : 0);
 928                         *cmd++ = 0;
 929                         *cmd++ = offset;
 930                         *cmd++ = val;
 931                 } else {
 932                         *cmd++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
 933                         *cmd++ = offset;
 934                         *cmd++ = val;
 935                 }
 936
 937                 offset += PAGE_SIZE;
 938         }
 939
 940         *cmd = MI_BATCH_BUFFER_END;
 941         i915_gem_chipset_flush(i915);
 942
 943         i915_gem_object_unpin_map(obj);
 944
 945         batch = i915_vma_instance(obj, vma->vm, NULL);
 946         if (IS_ERR(batch)) {
 947                 err = PTR_ERR(batch);
 948                 goto err;
 949         }
 950
 951         err = i915_vma_pin(batch, 0, 0, PIN_USER);
 952         if (err)
 953                 goto err;
 954
 955         return batch;
 956
 957 err:
 958         i915_gem_object_put(obj);
 959
 960         return ERR_PTR(err);
 961 }
 962
 963 static int gpu_write(struct i915_vma *vma,
 964                      struct i915_gem_context *ctx,
 965                      struct intel_engine_cs *engine,
 966                      u32 dword,
 967                      u32 value)
 968 {
 969         struct i915_request *rq;
 970         struct i915_vma *batch;
 971         int err;
 972
 973         GEM_BUG_ON(!intel_engine_can_store_dword(engine));
 974
 975         err = i915_gem_object_set_to_gtt_domain(vma->obj, true);
 976         if (err)
 977                 return err;
 978
 979         batch = gpu_write_dw(vma, dword * sizeof(u32), value);
 980         if (IS_ERR(batch))
 981                 return PTR_ERR(batch);
 982
 983         rq = i915_request_alloc(engine, ctx);
 984         if (IS_ERR(rq)) {
 985                 err = PTR_ERR(rq);
 986                 goto err_batch;
 987         }
 988
 989         err = i915_vma_move_to_active(batch, rq, 0);
 990         if (err)
 991                 goto err_request;
 992
 993         i915_gem_object_set_active_reference(batch->obj);
 994
 995         err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
 996         if (err)
 997                 goto err_request;
 998
 999         err = engine->emit_bb_start(rq,
1000                                     batch->node.start, batch->node.size,
1001                                     0);
1002 err_request:
1003         if (err)
1004                 i915_request_skip(rq, err);
1005         i915_request_add(rq);
1006 err_batch:
1007         i915_vma_unpin(batch);
1008         i915_vma_close(batch);
1009
1010         return err;
1011 }
1012
1013 static int cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
1014 {
1015         unsigned int needs_flush;
1016         unsigned long n;
1017         int err;
1018
1019         err = i915_gem_obj_prepare_shmem_read(obj, &needs_flush);
1020         if (err)
1021                 return err;
1022
1023         for (n = 0; n < obj->base.size >> PAGE_SHIFT; ++n) {
1024                 u32 *ptr = kmap_atomic(i915_gem_object_get_page(obj, n));
1025
1026                 if (needs_flush & CLFLUSH_BEFORE)
1027                         drm_clflush_virt_range(ptr, PAGE_SIZE);
1028
1029                 if (ptr[dword] != val) {
1030                         pr_err("n=%lu ptr[%u]=%u, val=%u\n",
1031                                n, dword, ptr[dword], val);
1032                         kunmap_atomic(ptr);
1033                         err = -EINVAL;
1034                         break;
1035                 }
1036
1037                 kunmap_atomic(ptr);
1038         }
1039
1040         i915_gem_obj_finish_shmem_access(obj);
1041
1042         return err;
1043 }
1044
1045 static int __igt_write_huge(struct i915_gem_context *ctx,
1046                             struct intel_engine_cs *engine,
1047                             struct drm_i915_gem_object *obj,
1048                             u64 size, u64 offset,
1049                             u32 dword, u32 val)
1050 {
1051         struct drm_i915_private *i915 = to_i915(obj->base.dev);
1052         struct i915_address_space *vm =
1053                 ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
1054         unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
1055         struct i915_vma *vma;
1056         int err;
1057
1058         vma = i915_vma_instance(obj, vm, NULL);
1059         if (IS_ERR(vma))
1060                 return PTR_ERR(vma);
1061
1062         err = i915_vma_unbind(vma);
1063         if (err)
1064                 goto out_vma_close;
1065
1066         err = i915_vma_pin(vma, size, 0, flags | offset);
1067         if (err) {
1068                 /*
1069                  * The ggtt may have some pages reserved so
1070                  * refrain from erroring out.
1071                  */
1072                 if (err == -ENOSPC && i915_is_ggtt(vm))
1073                         err = 0;
1074
1075                 goto out_vma_close;
1076         }
1077
1078         err = igt_check_page_sizes(vma);
1079         if (err)
1080                 goto out_vma_unpin;
1081
1082         err = gpu_write(vma, ctx, engine, dword, val);
1083         if (err) {
1084                 pr_err("gpu-write failed at offset=%llx\n", offset);
1085                 goto out_vma_unpin;
1086         }
1087
1088         err = cpu_check(obj, dword, val);
1089         if (err) {
1090                 pr_err("cpu-check failed at offset=%llx\n", offset);
1091                 goto out_vma_unpin;
1092         }
1093
1094 out_vma_unpin:
1095         i915_vma_unpin(vma);
1096 out_vma_close:
1097         i915_vma_destroy(vma);
1098
1099         return err;
1100 }
1101
1102 static int igt_write_huge(struct i915_gem_context *ctx,
1103                           struct drm_i915_gem_object *obj)
1104 {
1105         struct drm_i915_private *i915 = to_i915(obj->base.dev);
1106         struct i915_address_space *vm =
1107                 ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
1108         static struct intel_engine_cs *engines[I915_NUM_ENGINES];
1109         struct intel_engine_cs *engine;
1110         I915_RND_STATE(prng);
1111         IGT_TIMEOUT(end_time);
1112         unsigned int max_page_size;
1113         unsigned int id;
1114         u64 max;
1115         u64 num;
1116         u64 size;
1117         int *order;
1118         int i, n;
1119         int err = 0;
1120
1121         GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
1122
1123         size = obj->base.size;
1124         if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
1125                 size = round_up(size, I915_GTT_PAGE_SIZE_2M);
1126
1127         max_page_size = rounddown_pow_of_two(obj->mm.page_sizes.sg);
1128         max = div_u64((vm->total - size), max_page_size);
1129
1130         n = 0;
1131         for_each_engine(engine, i915, id) {
1132                 if (!intel_engine_can_store_dword(engine)) {
1133                         pr_info("store-dword-imm not supported on engine=%u\n",
1134                                 id);
1135                         continue;
1136                 }
1137                 engines[n++] = engine;
1138         }
1139
1140         if (!n)
1141                 return 0;
1142
1143         /*
1144          * To keep things interesting when alternating between engines in our
1145          * randomized order, lets also make feeding to the same engine a few
1146          * times in succession a possibility by enlarging the permutation array.
1147          */
1148         order = i915_random_order(n * I915_NUM_ENGINES, &prng);
1149         if (!order)
1150                 return -ENOMEM;
1151
1152         /*
1153          * Try various offsets in an ascending/descending fashion until we
1154          * timeout -- we want to avoid issues hidden by effectively always using
1155          * offset = 0.
1156          */
1157         i = 0;
1158         for_each_prime_number_from(num, 0, max) {
1159                 u64 offset_low = num * max_page_size;
1160                 u64 offset_high = (max - num) * max_page_size;
1161                 u32 dword = offset_in_page(num) / 4;
1162
1163                 engine = engines[order[i] % n];
1164                 i = (i + 1) % (n * I915_NUM_ENGINES);
1165
1166                 /*
1167                  * In order to utilize 64K pages we need to both pad the vma
1168                  * size and ensure the vma offset is at the start of the pt
1169                  * boundary, however to improve coverage we opt for testing both
1170                  * aligned and unaligned offsets.
1171                  */
1172                 if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
1173                         offset_low = round_down(offset_low,
1174                                                 I915_GTT_PAGE_SIZE_2M);
1175
1176                 err = __igt_write_huge(ctx, engine, obj, size, offset_low,
1177                                        dword, num + 1);
1178                 if (err)
1179                         break;
1180
1181                 err = __igt_write_huge(ctx, engine, obj, size, offset_high,
1182                                        dword, num + 1);
1183                 if (err)
1184                         break;
1185
1186                 if (igt_timeout(end_time,
1187                                 "%s timed out on engine=%u, offset_low=%llx offset_high=%llx, max_page_size=%x\n",
1188                                 __func__, engine->id, offset_low, offset_high,
1189                                 max_page_size))
1190                         break;
1191         }
1192
1193         kfree(order);
1194
1195         return err;
1196 }
1197
1198 static int igt_ppgtt_exhaust_huge(void *arg)
1199 {
1200         struct i915_gem_context *ctx = arg;
1201         struct drm_i915_private *i915 = ctx->i915;
1202         unsigned long supported = INTEL_INFO(i915)->page_sizes;
1203         static unsigned int pages[ARRAY_SIZE(page_sizes)];
1204         struct drm_i915_gem_object *obj;
1205         unsigned int size_mask;
1206         unsigned int page_mask;
1207         int n, i;
1208         int err = -ENODEV;
1209
1210         if (supported == I915_GTT_PAGE_SIZE_4K)
1211                 return 0;
1212
1213         /*
1214          * Sanity check creating objects with a varying mix of page sizes --
1215          * ensuring that our writes lands in the right place.
1216          */
1217
1218         n = 0;
1219         for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1)
1220                 pages[n++] = BIT(i);
1221
1222         for (size_mask = 2; size_mask < BIT(n); size_mask++) {
1223                 unsigned int size = 0;
1224
1225                 for (i = 0; i < n; i++) {
1226                         if (size_mask & BIT(i))
1227                                 size |= pages[i];
1228                 }
1229
1230                 /*
1231                  * For our page mask we want to enumerate all the page-size
1232                  * combinations which will fit into our chosen object size.
1233                  */
1234                 for (page_mask = 2; page_mask <= size_mask; page_mask++) {
1235                         unsigned int page_sizes = 0;
1236
1237                         for (i = 0; i < n; i++) {
1238                                 if (page_mask & BIT(i))
1239                                         page_sizes |= pages[i];
1240                         }
1241
1242                         /*
1243                          * Ensure that we can actually fill the given object
1244                          * with our chosen page mask.
1245                          */
1246                         if (!IS_ALIGNED(size, BIT(__ffs(page_sizes))))
1247                                 continue;
1248
1249                         obj = huge_pages_object(i915, size, page_sizes);
1250                         if (IS_ERR(obj)) {
1251                                 err = PTR_ERR(obj);
1252                                 goto out_device;
1253                         }
1254
1255                         err = i915_gem_object_pin_pages(obj);
1256                         if (err) {
1257                                 i915_gem_object_put(obj);
1258
1259                                 if (err == -ENOMEM) {
1260                                         pr_info("unable to get pages, size=%u, pages=%u\n",
1261                                                 size, page_sizes);
1262                                         err = 0;
1263                                         break;
1264                                 }
1265
1266                                 pr_err("pin_pages failed, size=%u, pages=%u\n",
1267                                        size_mask, page_mask);
1268
1269                                 goto out_device;
1270                         }
1271
1272                         /* Force the page-size for the gtt insertion */
1273                         obj->mm.page_sizes.sg = page_sizes;
1274
1275                         err = igt_write_huge(ctx, obj);
1276                         if (err) {
1277                                 pr_err("exhaust write-huge failed with size=%u\n",
1278                                        size);
1279                                 goto out_unpin;
1280                         }
1281
1282                         i915_gem_object_unpin_pages(obj);
1283                         __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
1284                         i915_gem_object_put(obj);
1285                 }
1286         }
1287
1288         goto out_device;
1289
1290 out_unpin:
1291         i915_gem_object_unpin_pages(obj);
1292         i915_gem_object_put(obj);
1293 out_device:
1294         mkwrite_device_info(i915)->page_sizes = supported;
1295
1296         return err;
1297 }
1298
1299 static int igt_ppgtt_internal_huge(void *arg)
1300 {
1301         struct i915_gem_context *ctx = arg;
1302         struct drm_i915_private *i915 = ctx->i915;
1303         struct drm_i915_gem_object *obj;
1304         static const unsigned int sizes[] = {
1305                 SZ_64K,
1306                 SZ_128K,
1307                 SZ_256K,
1308                 SZ_512K,
1309                 SZ_1M,
1310                 SZ_2M,
1311         };
1312         int i;
1313         int err;
1314
1315         /*
1316          * Sanity check that the HW uses huge pages correctly through internal
1317          * -- ensure that our writes land in the right place.
1318          */
1319
1320         for (i = 0; i < ARRAY_SIZE(sizes); ++i) {
1321                 unsigned int size = sizes[i];
1322
1323                 obj = i915_gem_object_create_internal(i915, size);
1324                 if (IS_ERR(obj))
1325                         return PTR_ERR(obj);
1326
1327                 err = i915_gem_object_pin_pages(obj);
1328                 if (err)
1329                         goto out_put;
1330
1331                 if (obj->mm.page_sizes.phys < I915_GTT_PAGE_SIZE_64K) {
1332                         pr_info("internal unable to allocate huge-page(s) with size=%u\n",
1333                                 size);
1334                         goto out_unpin;
1335                 }
1336
1337                 err = igt_write_huge(ctx, obj);
1338                 if (err) {
1339                         pr_err("internal write-huge failed with size=%u\n",
1340                                size);
1341                         goto out_unpin;
1342                 }
1343
1344                 i915_gem_object_unpin_pages(obj);
1345                 __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
1346                 i915_gem_object_put(obj);
1347         }
1348
1349         return 0;
1350
1351 out_unpin:
1352         i915_gem_object_unpin_pages(obj);
1353 out_put:
1354         i915_gem_object_put(obj);
1355
1356         return err;
1357 }
1358
1359 static inline bool igt_can_allocate_thp(struct drm_i915_private *i915)
1360 {
1361         return i915->mm.gemfs && has_transparent_hugepage();
1362 }
1363
1364 static int igt_ppgtt_gemfs_huge(void *arg)
1365 {
1366         struct i915_gem_context *ctx = arg;
1367         struct drm_i915_private *i915 = ctx->i915;
1368         struct drm_i915_gem_object *obj;
1369         static const unsigned int sizes[] = {
1370                 SZ_2M,
1371                 SZ_4M,
1372                 SZ_8M,
1373                 SZ_16M,
1374                 SZ_32M,
1375         };
1376         int i;
1377         int err;
1378
1379         /*
1380          * Sanity check that the HW uses huge pages correctly through gemfs --
1381          * ensure that our writes land in the right place.
1382          */
1383
1384         if (!igt_can_allocate_thp(i915)) {
1385                 pr_info("missing THP support, skipping\n");
1386                 return 0;
1387         }
1388
1389         for (i = 0; i < ARRAY_SIZE(sizes); ++i) {
1390                 unsigned int size = sizes[i];
1391
1392                 obj = i915_gem_object_create(i915, size);
1393                 if (IS_ERR(obj))
1394                         return PTR_ERR(obj);
1395
1396                 err = i915_gem_object_pin_pages(obj);
1397                 if (err)
1398                         goto out_put;
1399
1400                 if (obj->mm.page_sizes.phys < I915_GTT_PAGE_SIZE_2M) {
1401                         pr_info("finishing test early, gemfs unable to allocate huge-page(s) with size=%u\n",
1402                                 size);
1403                         goto out_unpin;
1404                 }
1405
1406                 err = igt_write_huge(ctx, obj);
1407                 if (err) {
1408                         pr_err("gemfs write-huge failed with size=%u\n",
1409                                size);
1410                         goto out_unpin;
1411                 }
1412
1413                 i915_gem_object_unpin_pages(obj);
1414                 __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
1415                 i915_gem_object_put(obj);
1416         }
1417
1418         return 0;
1419
1420 out_unpin:
1421         i915_gem_object_unpin_pages(obj);
1422 out_put:
1423         i915_gem_object_put(obj);
1424
1425         return err;
1426 }
1427
1428 static int igt_ppgtt_pin_update(void *arg)
1429 {
1430         struct i915_gem_context *ctx = arg;
1431         struct drm_i915_private *dev_priv = ctx->i915;
1432         unsigned long supported = INTEL_INFO(dev_priv)->page_sizes;
1433         struct i915_hw_ppgtt *ppgtt = ctx->ppgtt;
1434         struct drm_i915_gem_object *obj;
1435         struct i915_vma *vma;
1436         unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
1437         int first, last;
1438         int err;
1439
1440         /*
1441          * Make sure there's no funny business when doing a PIN_UPDATE -- in the
1442          * past we had a subtle issue with being able to incorrectly do multiple
1443          * alloc va ranges on the same object when doing a PIN_UPDATE, which
1444          * resulted in some pretty nasty bugs, though only when using
1445          * huge-gtt-pages.
1446          */
1447
1448         if (!ppgtt || !i915_vm_is_4lvl(&ppgtt->vm)) {
1449                 pr_info("48b PPGTT not supported, skipping\n");
1450                 return 0;
1451         }
1452
1453         first = ilog2(I915_GTT_PAGE_SIZE_64K);
1454         last = ilog2(I915_GTT_PAGE_SIZE_2M);
1455
1456         for_each_set_bit_from(first, &supported, last + 1) {
1457                 unsigned int page_size = BIT(first);
1458
1459                 obj = i915_gem_object_create_internal(dev_priv, page_size);
1460                 if (IS_ERR(obj))
1461                         return PTR_ERR(obj);
1462
1463                 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
1464                 if (IS_ERR(vma)) {
1465                         err = PTR_ERR(vma);
1466                         goto out_put;
1467                 }
1468
1469                 err = i915_vma_pin(vma, SZ_2M, 0, flags);
1470                 if (err)
1471                         goto out_close;
1472
1473                 if (vma->page_sizes.sg < page_size) {
1474                         pr_info("Unable to allocate page-size %x, finishing test early\n",
1475                                 page_size);
1476                         goto out_unpin;
1477                 }
1478
1479                 err = igt_check_page_sizes(vma);
1480                 if (err)
1481                         goto out_unpin;
1482
1483                 if (vma->page_sizes.gtt != page_size) {
1484                         dma_addr_t addr = i915_gem_object_get_dma_address(obj, 0);
1485
1486                         /*
1487                          * The only valid reason for this to ever fail would be
1488                          * if the dma-mapper screwed us over when we did the
1489                          * dma_map_sg(), since it has the final say over the dma
1490                          * address.
1491                          */
1492                         if (IS_ALIGNED(addr, page_size)) {
1493                                 pr_err("page_sizes.gtt=%u, expected=%u\n",
1494                                        vma->page_sizes.gtt, page_size);
1495                                 err = -EINVAL;
1496                         } else {
1497                                 pr_info("dma address misaligned, finishing test early\n");
1498                         }
1499
1500                         goto out_unpin;
1501                 }
1502
1503                 err = i915_vma_bind(vma, I915_CACHE_NONE, PIN_UPDATE);
1504                 if (err)
1505                         goto out_unpin;
1506
1507                 i915_vma_unpin(vma);
1508                 i915_vma_close(vma);
1509
1510                 i915_gem_object_put(obj);
1511         }
1512
1513         obj = i915_gem_object_create_internal(dev_priv, PAGE_SIZE);
1514         if (IS_ERR(obj))
1515                 return PTR_ERR(obj);
1516
1517         vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
1518         if (IS_ERR(vma)) {
1519                 err = PTR_ERR(vma);
1520                 goto out_put;
1521         }
1522
1523         err = i915_vma_pin(vma, 0, 0, flags);
1524         if (err)
1525                 goto out_close;
1526
1527         /*
1528          * Make sure we don't end up with something like where the pde is still
1529          * pointing to the 2M page, and the pt we just filled-in is dangling --
1530          * we can check this by writing to the first page where it would then
1531          * land in the now stale 2M page.
1532          */
1533
1534         err = gpu_write(vma, ctx, dev_priv->engine[RCS0], 0, 0xdeadbeaf);
1535         if (err)
1536                 goto out_unpin;
1537
1538         err = cpu_check(obj, 0, 0xdeadbeaf);
1539
1540 out_unpin:
1541         i915_vma_unpin(vma);
1542 out_close:
1543         i915_vma_close(vma);
1544 out_put:
1545         i915_gem_object_put(obj);
1546
1547         return err;
1548 }
1549
1550 static int igt_tmpfs_fallback(void *arg)
1551 {
1552         struct i915_gem_context *ctx = arg;
1553         struct drm_i915_private *i915 = ctx->i915;
1554         struct vfsmount *gemfs = i915->mm.gemfs;
1555         struct i915_address_space *vm =
1556                 ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
1557         struct drm_i915_gem_object *obj;
1558         struct i915_vma *vma;
1559         u32 *vaddr;
1560         int err = 0;
1561
1562         /*
1563          * Make sure that we don't burst into a ball of flames upon falling back
1564          * to tmpfs, which we rely on if on the off-chance we encouter a failure
1565          * when setting up gemfs.
1566          */
1567
1568         i915->mm.gemfs = NULL;
1569
1570         obj = i915_gem_object_create(i915, PAGE_SIZE);
1571         if (IS_ERR(obj)) {
1572                 err = PTR_ERR(obj);
1573                 goto out_restore;
1574         }
1575
1576         vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
1577         if (IS_ERR(vaddr)) {
1578                 err = PTR_ERR(vaddr);
1579                 goto out_put;
1580         }
1581         *vaddr = 0xdeadbeaf;
1582
1583         __i915_gem_object_flush_map(obj, 0, 64);
1584         i915_gem_object_unpin_map(obj);
1585
1586         vma = i915_vma_instance(obj, vm, NULL);
1587         if (IS_ERR(vma)) {
1588                 err = PTR_ERR(vma);
1589                 goto out_put;
1590         }
1591
1592         err = i915_vma_pin(vma, 0, 0, PIN_USER);
1593         if (err)
1594                 goto out_close;
1595
1596         err = igt_check_page_sizes(vma);
1597
1598         i915_vma_unpin(vma);
1599 out_close:
1600         i915_vma_close(vma);
1601 out_put:
1602         i915_gem_object_put(obj);
1603 out_restore:
1604         i915->mm.gemfs = gemfs;
1605
1606         return err;
1607 }
1608
1609 static int igt_shrink_thp(void *arg)
1610 {
1611         struct i915_gem_context *ctx = arg;
1612         struct drm_i915_private *i915 = ctx->i915;
1613         struct i915_address_space *vm =
1614                 ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
1615         struct drm_i915_gem_object *obj;
1616         struct i915_vma *vma;
1617         unsigned int flags = PIN_USER;
1618         int err;
1619
1620         /*
1621          * Sanity check shrinking huge-paged object -- make sure nothing blows
1622          * up.
1623          */
1624
1625         if (!igt_can_allocate_thp(i915)) {
1626                 pr_info("missing THP support, skipping\n");
1627                 return 0;
1628         }
1629
1630         obj = i915_gem_object_create(i915, SZ_2M);
1631         if (IS_ERR(obj))
1632                 return PTR_ERR(obj);
1633
1634         vma = i915_vma_instance(obj, vm, NULL);
1635         if (IS_ERR(vma)) {
1636                 err = PTR_ERR(vma);
1637                 goto out_put;
1638         }
1639
1640         err = i915_vma_pin(vma, 0, 0, flags);
1641         if (err)
1642                 goto out_close;
1643
1644         if (obj->mm.page_sizes.phys < I915_GTT_PAGE_SIZE_2M) {
1645                 pr_info("failed to allocate THP, finishing test early\n");
1646                 goto out_unpin;
1647         }
1648
1649         err = igt_check_page_sizes(vma);
1650         if (err)
1651                 goto out_unpin;
1652
1653         err = gpu_write(vma, ctx, i915->engine[RCS0], 0, 0xdeadbeaf);
1654         if (err)
1655                 goto out_unpin;
1656
1657         i915_vma_unpin(vma);
1658
1659         /*
1660          * Now that the pages are *unpinned* shrink-all should invoke
1661          * shmem to truncate our pages.
1662          */
1663         i915_gem_shrink_all(i915);
1664         if (i915_gem_object_has_pages(obj)) {
1665                 pr_err("shrink-all didn't truncate the pages\n");
1666                 err = -EINVAL;
1667                 goto out_close;
1668         }
1669
1670         if (obj->mm.page_sizes.sg || obj->mm.page_sizes.phys) {
1671                 pr_err("residual page-size bits left\n");
1672                 err = -EINVAL;
1673                 goto out_close;
1674         }
1675
1676         err = i915_vma_pin(vma, 0, 0, flags);
1677         if (err)
1678                 goto out_close;
1679
1680         err = cpu_check(obj, 0, 0xdeadbeaf);
1681
1682 out_unpin:
1683         i915_vma_unpin(vma);
1684 out_close:
1685         i915_vma_close(vma);
1686 out_put:
1687         i915_gem_object_put(obj);
1688
1689         return err;
1690 }
1691
1692 int i915_gem_huge_page_mock_selftests(void)
1693 {
1694         static const struct i915_subtest tests[] = {
1695                 SUBTEST(igt_mock_exhaust_device_supported_pages),
1696                 SUBTEST(igt_mock_ppgtt_misaligned_dma),
1697                 SUBTEST(igt_mock_ppgtt_huge_fill),
1698                 SUBTEST(igt_mock_ppgtt_64K),
1699         };
1700         struct drm_i915_private *dev_priv;
1701         struct i915_hw_ppgtt *ppgtt;
1702         int err;
1703
1704         dev_priv = mock_gem_device();
1705         if (!dev_priv)
1706                 return -ENOMEM;
1707
1708         /* Pretend to be a device which supports the 48b PPGTT */
1709         mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL;
1710         mkwrite_device_info(dev_priv)->ppgtt_size = 48;
1711
1712         mutex_lock(&dev_priv->drm.struct_mutex);
1713         ppgtt = i915_ppgtt_create(dev_priv);
1714         if (IS_ERR(ppgtt)) {
1715                 err = PTR_ERR(ppgtt);
1716                 goto out_unlock;
1717         }
1718
1719         if (!i915_vm_is_4lvl(&ppgtt->vm)) {
1720                 pr_err("failed to create 48b PPGTT\n");
1721                 err = -EINVAL;
1722                 goto out_close;
1723         }
1724
1725         /* If we were ever hit this then it's time to mock the 64K scratch */
1726         if (!i915_vm_has_scratch_64K(&ppgtt->vm)) {
1727                 pr_err("PPGTT missing 64K scratch page\n");
1728                 err = -EINVAL;
1729                 goto out_close;
1730         }
1731
1732         err = i915_subtests(tests, ppgtt);
1733
1734 out_close:
1735         i915_ppgtt_put(ppgtt);
1736
1737 out_unlock:
1738         mutex_unlock(&dev_priv->drm.struct_mutex);
1739         drm_dev_put(&dev_priv->drm);
1740
1741         return err;
1742 }
1743
1744 int i915_gem_huge_page_live_selftests(struct drm_i915_private *dev_priv)
1745 {
1746         static const struct i915_subtest tests[] = {
1747                 SUBTEST(igt_shrink_thp),
1748                 SUBTEST(igt_ppgtt_pin_update),
1749                 SUBTEST(igt_tmpfs_fallback),
1750                 SUBTEST(igt_ppgtt_exhaust_huge),
1751                 SUBTEST(igt_ppgtt_gemfs_huge),
1752                 SUBTEST(igt_ppgtt_internal_huge),
1753         };
1754         struct drm_file *file;
1755         struct i915_gem_context *ctx;
1756         intel_wakeref_t wakeref;
1757         int err;
1758
1759         if (!HAS_PPGTT(dev_priv)) {
1760                 pr_info("PPGTT not supported, skipping live-selftests\n");
1761                 return 0;
1762         }
1763
1764         if (i915_terminally_wedged(dev_priv))
1765                 return 0;
1766
1767         file = mock_file(dev_priv);
1768         if (IS_ERR(file))
1769                 return PTR_ERR(file);
1770
1771         mutex_lock(&dev_priv->drm.struct_mutex);
1772         wakeref = intel_runtime_pm_get(dev_priv);
1773
1774         ctx = live_context(dev_priv, file);
1775         if (IS_ERR(ctx)) {
1776                 err = PTR_ERR(ctx);
1777                 goto out_unlock;
1778         }
1779
1780         if (ctx->ppgtt)
1781                 ctx->ppgtt->vm.scrub_64K = true;
1782
1783         err = i915_subtests(tests, ctx);
1784
1785 out_unlock:
1786         intel_runtime_pm_put(dev_priv, wakeref);
1787         mutex_unlock(&dev_priv->drm.struct_mutex);
1788
1789         mock_file_free(dev_priv, file);
1790
1791         return err;
1792 }