drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drm_atomic_helper.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                         SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  53
  54
  55 static const char * const tv_format_names[] = {
  56         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  57         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  58         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  59         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  60         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  61         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  62         "SECAM_60"
  63 };
  64
  65 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  66
  67 struct intel_sdvo {
  68         struct intel_encoder base;
  69
  70         struct i2c_adapter *i2c;
  71         u8 slave_addr;
  72
  73         struct i2c_adapter ddc;
  74
  75         /* Register for the SDVO device: SDVOB or SDVOC */
  76         i915_reg_t sdvo_reg;
  77
  78         /* Active outputs controlled by this SDVO output */
  79         u16 controlled_output;
  80
  81         /*
  82          * Capabilities of the SDVO device returned by
  83          * intel_sdvo_get_capabilities()
  84          */
  85         struct intel_sdvo_caps caps;
  86
  87         /* Pixel clock limitations reported by the SDVO device, in kHz */
  88         int pixel_clock_min, pixel_clock_max;
  89
  90         /*
  91         * For multiple function SDVO device,
  92         * this is for current attached outputs.
  93         */
  94         u16 attached_output;
  95
  96         /*
  97          * Hotplug activation bits for this device
  98          */
  99         u16 hotplug_active;
 100
 101         enum port port;
 102
 103         bool has_hdmi_monitor;
 104         bool has_hdmi_audio;
 105
 106         /* DDC bus used by this SDVO encoder */
 107         u8 ddc_bus;
 108
 109         /*
 110          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 111          */
 112         u8 dtd_sdvo_flags;
 113 };
 114
 115 struct intel_sdvo_connector {
 116         struct intel_connector base;
 117
 118         /* Mark the type of connector */
 119         u16 output_flag;
 120
 121         /* This contains all current supported TV format */
 122         u8 tv_format_supported[TV_FORMAT_NUM];
 123         int   format_supported_num;
 124         struct drm_property *tv_format;
 125
 126         /* add the property for the SDVO-TV */
 127         struct drm_property *left;
 128         struct drm_property *right;
 129         struct drm_property *top;
 130         struct drm_property *bottom;
 131         struct drm_property *hpos;
 132         struct drm_property *vpos;
 133         struct drm_property *contrast;
 134         struct drm_property *saturation;
 135         struct drm_property *hue;
 136         struct drm_property *sharpness;
 137         struct drm_property *flicker_filter;
 138         struct drm_property *flicker_filter_adaptive;
 139         struct drm_property *flicker_filter_2d;
 140         struct drm_property *tv_chroma_filter;
 141         struct drm_property *tv_luma_filter;
 142         struct drm_property *dot_crawl;
 143
 144         /* add the property for the SDVO-TV/LVDS */
 145         struct drm_property *brightness;
 146
 147         /* this is to get the range of margin.*/
 148         u32 max_hscan, max_vscan;
 149
 150         /**
 151          * This is set if we treat the device as HDMI, instead of DVI.
 152          */
 153         bool is_hdmi;
 154 };
 155
 156 struct intel_sdvo_connector_state {
 157         /* base.base: tv.saturation/contrast/hue/brightness */
 158         struct intel_digital_connector_state base;
 159
 160         struct {
 161                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 162                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 163                 unsigned chroma_filter, luma_filter, dot_crawl;
 164         } tv;
 165 };
 166
 167 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 168 {
 169         return container_of(encoder, struct intel_sdvo, base);
 170 }
 171
 172 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 173 {
 174         return to_sdvo(intel_attached_encoder(connector));
 175 }
 176
 177 static struct intel_sdvo_connector *
 178 to_intel_sdvo_connector(struct drm_connector *connector)
 179 {
 180         return container_of(connector, struct intel_sdvo_connector, base.base);
 181 }
 182
 183 #define to_intel_sdvo_connector_state(conn_state) \
 184         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 185
 186 static bool
 187 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
 188 static bool
 189 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 190                               struct intel_sdvo_connector *intel_sdvo_connector,
 191                               int type);
 192 static bool
 193 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 194                                    struct intel_sdvo_connector *intel_sdvo_connector);
 195
 196 /*
 197  * Writes the SDVOB or SDVOC with the given value, but always writes both
 198  * SDVOB and SDVOC to work around apparent hardware issues (according to
 199  * comments in the BIOS).
 200  */
 201 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 202 {
 203         struct drm_device *dev = intel_sdvo->base.base.dev;
 204         struct drm_i915_private *dev_priv = to_i915(dev);
 205         u32 bval = val, cval = val;
 206         int i;
 207
 208         if (HAS_PCH_SPLIT(dev_priv)) {
 209                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 210                 POSTING_READ(intel_sdvo->sdvo_reg);
 211                 /*
 212                  * HW workaround, need to write this twice for issue
 213                  * that may result in first write getting masked.
 214                  */
 215                 if (HAS_PCH_IBX(dev_priv)) {
 216                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 217                         POSTING_READ(intel_sdvo->sdvo_reg);
 218                 }
 219                 return;
 220         }
 221
 222         if (intel_sdvo->port == PORT_B)
 223                 cval = I915_READ(GEN3_SDVOC);
 224         else
 225                 bval = I915_READ(GEN3_SDVOB);
 226
 227         /*
 228          * Write the registers twice for luck. Sometimes,
 229          * writing them only once doesn't appear to 'stick'.
 230          * The BIOS does this too. Yay, magic
 231          */
 232         for (i = 0; i < 2; i++) {
 233                 I915_WRITE(GEN3_SDVOB, bval);
 234                 POSTING_READ(GEN3_SDVOB);
 235
 236                 I915_WRITE(GEN3_SDVOC, cval);
 237                 POSTING_READ(GEN3_SDVOC);
 238         }
 239 }
 240
 241 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 242 {
 243         struct i2c_msg msgs[] = {
 244                 {
 245                         .addr = intel_sdvo->slave_addr,
 246                         .flags = 0,
 247                         .len = 1,
 248                         .buf = &addr,
 249                 },
 250                 {
 251                         .addr = intel_sdvo->slave_addr,
 252                         .flags = I2C_M_RD,
 253                         .len = 1,
 254                         .buf = ch,
 255                 }
 256         };
 257         int ret;
 258
 259         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 260                 return true;
 261
 262         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 263         return false;
 264 }
 265
 266 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 267 /** Mapping of command numbers to names, for debug output */
 268 static const struct _sdvo_cmd_name {
 269         u8 cmd;
 270         const char *name;
 271 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 272         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 273         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 274         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 275         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 276         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 277         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 278         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 279         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 280         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 281         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 282         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 283         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 284         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 285         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 286         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 287         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 288         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 289         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 290         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 291         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 292         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 315
 316         /* Add the op code for SDVO enhancements */
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 361
 362         /* HDMI op code */
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 383 };
 384
 385 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 386
 387 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 388                                    const void *args, int args_len)
 389 {
 390         int i, pos = 0;
 391 #define BUF_LEN 256
 392         char buffer[BUF_LEN];
 393
 394 #define BUF_PRINT(args...) \
 395         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 396
 397
 398         for (i = 0; i < args_len; i++) {
 399                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 400         }
 401         for (; i < 8; i++) {
 402                 BUF_PRINT("   ");
 403         }
 404         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 405                 if (cmd == sdvo_cmd_names[i].cmd) {
 406                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 407                         break;
 408                 }
 409         }
 410         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 411                 BUF_PRINT("(%02X)", cmd);
 412         }
 413         BUG_ON(pos >= BUF_LEN - 1);
 414 #undef BUF_PRINT
 415 #undef BUF_LEN
 416
 417         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 418 }
 419
 420 static const char * const cmd_status_names[] = {
 421         "Power on",
 422         "Success",
 423         "Not supported",
 424         "Invalid arg",
 425         "Pending",
 426         "Target not specified",
 427         "Scaling not supported"
 428 };
 429
 430 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 431                                    const void *args, int args_len,
 432                                    bool unlocked)
 433 {
 434         u8 *buf, status;
 435         struct i2c_msg *msgs;
 436         int i, ret = true;
 437
 438         /* Would be simpler to allocate both in one go ? */
 439         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 440         if (!buf)
 441                 return false;
 442
 443         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 444         if (!msgs) {
 445                 kfree(buf);
 446                 return false;
 447         }
 448
 449         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 450
 451         for (i = 0; i < args_len; i++) {
 452                 msgs[i].addr = intel_sdvo->slave_addr;
 453                 msgs[i].flags = 0;
 454                 msgs[i].len = 2;
 455                 msgs[i].buf = buf + 2 *i;
 456                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 457                 buf[2*i + 1] = ((u8*)args)[i];
 458         }
 459         msgs[i].addr = intel_sdvo->slave_addr;
 460         msgs[i].flags = 0;
 461         msgs[i].len = 2;
 462         msgs[i].buf = buf + 2*i;
 463         buf[2*i + 0] = SDVO_I2C_OPCODE;
 464         buf[2*i + 1] = cmd;
 465
 466         /* the following two are to read the response */
 467         status = SDVO_I2C_CMD_STATUS;
 468         msgs[i+1].addr = intel_sdvo->slave_addr;
 469         msgs[i+1].flags = 0;
 470         msgs[i+1].len = 1;
 471         msgs[i+1].buf = &status;
 472
 473         msgs[i+2].addr = intel_sdvo->slave_addr;
 474         msgs[i+2].flags = I2C_M_RD;
 475         msgs[i+2].len = 1;
 476         msgs[i+2].buf = &status;
 477
 478         if (unlocked)
 479                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 480         else
 481                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 482         if (ret < 0) {
 483                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 484                 ret = false;
 485                 goto out;
 486         }
 487         if (ret != i+3) {
 488                 /* failure in I2C transfer */
 489                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 490                 ret = false;
 491         }
 492
 493 out:
 494         kfree(msgs);
 495         kfree(buf);
 496         return ret;
 497 }
 498
 499 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 500                                  const void *args, int args_len)
 501 {
 502         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 503 }
 504
 505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 506                                      void *response, int response_len)
 507 {
 508         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 509         u8 status;
 510         int i, pos = 0;
 511 #define BUF_LEN 256
 512         char buffer[BUF_LEN];
 513
 514
 515         /*
 516          * The documentation states that all commands will be
 517          * processed within 15µs, and that we need only poll
 518          * the status byte a maximum of 3 times in order for the
 519          * command to be complete.
 520          *
 521          * Check 5 times in case the hardware failed to read the docs.
 522          *
 523          * Also beware that the first response by many devices is to
 524          * reply PENDING and stall for time. TVs are notorious for
 525          * requiring longer than specified to complete their replies.
 526          * Originally (in the DDX long ago), the delay was only ever 15ms
 527          * with an additional delay of 30ms applied for TVs added later after
 528          * many experiments. To accommodate both sets of delays, we do a
 529          * sequence of slow checks if the device is falling behind and fails
 530          * to reply within 5*15µs.
 531          */
 532         if (!intel_sdvo_read_byte(intel_sdvo,
 533                                   SDVO_I2C_CMD_STATUS,
 534                                   &status))
 535                 goto log_fail;
 536
 537         while ((status == SDVO_CMD_STATUS_PENDING ||
 538                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 539                 if (retry < 10)
 540                         msleep(15);
 541                 else
 542                         udelay(15);
 543
 544                 if (!intel_sdvo_read_byte(intel_sdvo,
 545                                           SDVO_I2C_CMD_STATUS,
 546                                           &status))
 547                         goto log_fail;
 548         }
 549
 550 #define BUF_PRINT(args...) \
 551         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 552
 553         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 554                 BUF_PRINT("(%s)", cmd_status_names[status]);
 555         else
 556                 BUF_PRINT("(??? %d)", status);
 557
 558         if (status != SDVO_CMD_STATUS_SUCCESS)
 559                 goto log_fail;
 560
 561         /* Read the command response */
 562         for (i = 0; i < response_len; i++) {
 563                 if (!intel_sdvo_read_byte(intel_sdvo,
 564                                           SDVO_I2C_RETURN_0 + i,
 565                                           &((u8 *)response)[i]))
 566                         goto log_fail;
 567                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 568         }
 569         BUG_ON(pos >= BUF_LEN - 1);
 570 #undef BUF_PRINT
 571 #undef BUF_LEN
 572
 573         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 574         return true;
 575
 576 log_fail:
 577         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 578         return false;
 579 }
 580
 581 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 582 {
 583         if (adjusted_mode->crtc_clock >= 100000)
 584                 return 1;
 585         else if (adjusted_mode->crtc_clock >= 50000)
 586                 return 2;
 587         else
 588                 return 4;
 589 }
 590
 591 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 592                                                 u8 ddc_bus)
 593 {
 594         /* This must be the immediately preceding write before the i2c xfer */
 595         return __intel_sdvo_write_cmd(intel_sdvo,
 596                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 597                                       &ddc_bus, 1, false);
 598 }
 599
 600 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 601 {
 602         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 603                 return false;
 604
 605         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 606 }
 607
 608 static bool
 609 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 610 {
 611         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 612                 return false;
 613
 614         return intel_sdvo_read_response(intel_sdvo, value, len);
 615 }
 616
 617 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 618 {
 619         struct intel_sdvo_set_target_input_args targets = {0};
 620         return intel_sdvo_set_value(intel_sdvo,
 621                                     SDVO_CMD_SET_TARGET_INPUT,
 622                                     &targets, sizeof(targets));
 623 }
 624
 625 /*
 626  * Return whether each input is trained.
 627  *
 628  * This function is making an assumption about the layout of the response,
 629  * which should be checked against the docs.
 630  */
 631 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 632 {
 633         struct intel_sdvo_get_trained_inputs_response response;
 634
 635         BUILD_BUG_ON(sizeof(response) != 1);
 636         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 637                                   &response, sizeof(response)))
 638                 return false;
 639
 640         *input_1 = response.input0_trained;
 641         *input_2 = response.input1_trained;
 642         return true;
 643 }
 644
 645 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 646                                           u16 outputs)
 647 {
 648         return intel_sdvo_set_value(intel_sdvo,
 649                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 650                                     &outputs, sizeof(outputs));
 651 }
 652
 653 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 654                                           u16 *outputs)
 655 {
 656         return intel_sdvo_get_value(intel_sdvo,
 657                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 658                                     outputs, sizeof(*outputs));
 659 }
 660
 661 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 662                                                int mode)
 663 {
 664         u8 state = SDVO_ENCODER_STATE_ON;
 665
 666         switch (mode) {
 667         case DRM_MODE_DPMS_ON:
 668                 state = SDVO_ENCODER_STATE_ON;
 669                 break;
 670         case DRM_MODE_DPMS_STANDBY:
 671                 state = SDVO_ENCODER_STATE_STANDBY;
 672                 break;
 673         case DRM_MODE_DPMS_SUSPEND:
 674                 state = SDVO_ENCODER_STATE_SUSPEND;
 675                 break;
 676         case DRM_MODE_DPMS_OFF:
 677                 state = SDVO_ENCODER_STATE_OFF;
 678                 break;
 679         }
 680
 681         return intel_sdvo_set_value(intel_sdvo,
 682                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 683 }
 684
 685 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 686                                                    int *clock_min,
 687                                                    int *clock_max)
 688 {
 689         struct intel_sdvo_pixel_clock_range clocks;
 690
 691         BUILD_BUG_ON(sizeof(clocks) != 4);
 692         if (!intel_sdvo_get_value(intel_sdvo,
 693                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 694                                   &clocks, sizeof(clocks)))
 695                 return false;
 696
 697         /* Convert the values from units of 10 kHz to kHz. */
 698         *clock_min = clocks.min * 10;
 699         *clock_max = clocks.max * 10;
 700         return true;
 701 }
 702
 703 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 704                                          u16 outputs)
 705 {
 706         return intel_sdvo_set_value(intel_sdvo,
 707                                     SDVO_CMD_SET_TARGET_OUTPUT,
 708                                     &outputs, sizeof(outputs));
 709 }
 710
 711 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 712                                   struct intel_sdvo_dtd *dtd)
 713 {
 714         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 715                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 716 }
 717
 718 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 719                                   struct intel_sdvo_dtd *dtd)
 720 {
 721         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 722                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 723 }
 724
 725 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 726                                          struct intel_sdvo_dtd *dtd)
 727 {
 728         return intel_sdvo_set_timing(intel_sdvo,
 729                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 730 }
 731
 732 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 733                                          struct intel_sdvo_dtd *dtd)
 734 {
 735         return intel_sdvo_set_timing(intel_sdvo,
 736                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 737 }
 738
 739 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 740                                         struct intel_sdvo_dtd *dtd)
 741 {
 742         return intel_sdvo_get_timing(intel_sdvo,
 743                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 744 }
 745
 746 static bool
 747 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 748                                          struct intel_sdvo_connector *intel_sdvo_connector,
 749                                          u16 clock,
 750                                          u16 width,
 751                                          u16 height)
 752 {
 753         struct intel_sdvo_preferred_input_timing_args args;
 754
 755         memset(&args, 0, sizeof(args));
 756         args.clock = clock;
 757         args.width = width;
 758         args.height = height;
 759         args.interlace = 0;
 760
 761         if (IS_LVDS(intel_sdvo_connector)) {
 762                 const struct drm_display_mode *fixed_mode =
 763                         intel_sdvo_connector->base.panel.fixed_mode;
 764
 765                 if (fixed_mode->hdisplay != width ||
 766                     fixed_mode->vdisplay != height)
 767                         args.scaled = 1;
 768         }
 769
 770         return intel_sdvo_set_value(intel_sdvo,
 771                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 772                                     &args, sizeof(args));
 773 }
 774
 775 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 776                                                   struct intel_sdvo_dtd *dtd)
 777 {
 778         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 779         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 780         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 781                                     &dtd->part1, sizeof(dtd->part1)) &&
 782                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 783                                      &dtd->part2, sizeof(dtd->part2));
 784 }
 785
 786 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 787 {
 788         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 789 }
 790
 791 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 792                                          const struct drm_display_mode *mode)
 793 {
 794         u16 width, height;
 795         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 796         u16 h_sync_offset, v_sync_offset;
 797         int mode_clock;
 798
 799         memset(dtd, 0, sizeof(*dtd));
 800
 801         width = mode->hdisplay;
 802         height = mode->vdisplay;
 803
 804         /* do some mode translations */
 805         h_blank_len = mode->htotal - mode->hdisplay;
 806         h_sync_len = mode->hsync_end - mode->hsync_start;
 807
 808         v_blank_len = mode->vtotal - mode->vdisplay;
 809         v_sync_len = mode->vsync_end - mode->vsync_start;
 810
 811         h_sync_offset = mode->hsync_start - mode->hdisplay;
 812         v_sync_offset = mode->vsync_start - mode->vdisplay;
 813
 814         mode_clock = mode->clock;
 815         mode_clock /= 10;
 816         dtd->part1.clock = mode_clock;
 817
 818         dtd->part1.h_active = width & 0xff;
 819         dtd->part1.h_blank = h_blank_len & 0xff;
 820         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 821                 ((h_blank_len >> 8) & 0xf);
 822         dtd->part1.v_active = height & 0xff;
 823         dtd->part1.v_blank = v_blank_len & 0xff;
 824         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 825                 ((v_blank_len >> 8) & 0xf);
 826
 827         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 828         dtd->part2.h_sync_width = h_sync_len & 0xff;
 829         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 830                 (v_sync_len & 0xf);
 831         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 832                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 833                 ((v_sync_len & 0x30) >> 4);
 834
 835         dtd->part2.dtd_flags = 0x18;
 836         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 837                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 838         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 839                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 840         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 841                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 842
 843         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 844 }
 845
 846 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 847                                          const struct intel_sdvo_dtd *dtd)
 848 {
 849         struct drm_display_mode mode = {};
 850
 851         mode.hdisplay = dtd->part1.h_active;
 852         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 853         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 854         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 855         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 856         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 857         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 858         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 859
 860         mode.vdisplay = dtd->part1.v_active;
 861         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 862         mode.vsync_start = mode.vdisplay;
 863         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 864         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 865         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 866         mode.vsync_end = mode.vsync_start +
 867                 (dtd->part2.v_sync_off_width & 0xf);
 868         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 869         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 870         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 871
 872         mode.clock = dtd->part1.clock * 10;
 873
 874         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 875                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 876         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 877                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 878         else
 879                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 880         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 881                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 882         else
 883                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 884
 885         drm_mode_set_crtcinfo(&mode, 0);
 886
 887         drm_mode_copy(pmode, &mode);
 888 }
 889
 890 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 891 {
 892         struct intel_sdvo_encode encode;
 893
 894         BUILD_BUG_ON(sizeof(encode) != 2);
 895         return intel_sdvo_get_value(intel_sdvo,
 896                                   SDVO_CMD_GET_SUPP_ENCODE,
 897                                   &encode, sizeof(encode));
 898 }
 899
 900 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 901                                   u8 mode)
 902 {
 903         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 904 }
 905
 906 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 907                                        u8 mode)
 908 {
 909         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 910 }
 911
 912 #if 0
 913 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 914 {
 915         int i, j;
 916         u8 set_buf_index[2];
 917         u8 av_split;
 918         u8 buf_size;
 919         u8 buf[48];
 920         u8 *pos;
 921
 922         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 923
 924         for (i = 0; i <= av_split; i++) {
 925                 set_buf_index[0] = i; set_buf_index[1] = 0;
 926                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 927                                      set_buf_index, 2);
 928                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 929                 intel_sdvo_read_response(encoder, &buf_size, 1);
 930
 931                 pos = buf;
 932                 for (j = 0; j <= buf_size; j += 8) {
 933                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 934                                              NULL, 0);
 935                         intel_sdvo_read_response(encoder, pos, 8);
 936                         pos += 8;
 937                 }
 938         }
 939 }
 940 #endif
 941
 942 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 943                                        unsigned int if_index, u8 tx_rate,
 944                                        const u8 *data, unsigned int length)
 945 {
 946         u8 set_buf_index[2] = { if_index, 0 };
 947         u8 hbuf_size, tmp[8];
 948         int i;
 949
 950         if (!intel_sdvo_set_value(intel_sdvo,
 951                                   SDVO_CMD_SET_HBUF_INDEX,
 952                                   set_buf_index, 2))
 953                 return false;
 954
 955         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 956                                   &hbuf_size, 1))
 957                 return false;
 958
 959         /* Buffer size is 0 based, hooray! */
 960         hbuf_size++;
 961
 962         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 963                       if_index, length, hbuf_size);
 964
 965         for (i = 0; i < hbuf_size; i += 8) {
 966                 memset(tmp, 0, 8);
 967                 if (i < length)
 968                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 969
 970                 if (!intel_sdvo_set_value(intel_sdvo,
 971                                           SDVO_CMD_SET_HBUF_DATA,
 972                                           tmp, 8))
 973                         return false;
 974         }
 975
 976         return intel_sdvo_set_value(intel_sdvo,
 977                                     SDVO_CMD_SET_HBUF_TXRATE,
 978                                     &tx_rate, 1);
 979 }
 980
 981 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 982                                          const struct intel_crtc_state *pipe_config,
 983                                          const struct drm_connector_state *conn_state)
 984 {
 985         const struct drm_display_mode *adjusted_mode =
 986                 &pipe_config->base.adjusted_mode;
 987         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
 988         union hdmi_infoframe frame;
 989         int ret;
 990         ssize_t len;
 991
 992         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
 993                                                        conn_state->connector,
 994                                                        adjusted_mode);
 995         if (ret < 0) {
 996                 DRM_ERROR("couldn't fill AVI infoframe\n");
 997                 return false;
 998         }
 999
1000         drm_hdmi_avi_infoframe_quant_range(&frame.avi,
1001                                            conn_state->connector,
1002                                            adjusted_mode,
1003                                            pipe_config->limited_color_range ?
1004                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1005                                            HDMI_QUANTIZATION_RANGE_FULL);
1006
1007         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1008         if (len < 0)
1009                 return false;
1010
1011         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1012                                           SDVO_HBUF_TX_VSYNC,
1013                                           sdvo_data, sizeof(sdvo_data));
1014 }
1015
1016 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1017                                      const struct drm_connector_state *conn_state)
1018 {
1019         struct intel_sdvo_tv_format format;
1020         u32 format_map;
1021
1022         format_map = 1 << conn_state->tv.mode;
1023         memset(&format, 0, sizeof(format));
1024         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1025
1026         BUILD_BUG_ON(sizeof(format) != 6);
1027         return intel_sdvo_set_value(intel_sdvo,
1028                                     SDVO_CMD_SET_TV_FORMAT,
1029                                     &format, sizeof(format));
1030 }
1031
1032 static bool
1033 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1034                                         const struct drm_display_mode *mode)
1035 {
1036         struct intel_sdvo_dtd output_dtd;
1037
1038         if (!intel_sdvo_set_target_output(intel_sdvo,
1039                                           intel_sdvo->attached_output))
1040                 return false;
1041
1042         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1043         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1044                 return false;
1045
1046         return true;
1047 }
1048
1049 /*
1050  * Asks the sdvo controller for the preferred input mode given the output mode.
1051  * Unfortunately we have to set up the full output mode to do that.
1052  */
1053 static bool
1054 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1055                                     struct intel_sdvo_connector *intel_sdvo_connector,
1056                                     const struct drm_display_mode *mode,
1057                                     struct drm_display_mode *adjusted_mode)
1058 {
1059         struct intel_sdvo_dtd input_dtd;
1060
1061         /* Reset the input timing to the screen. Assume always input 0. */
1062         if (!intel_sdvo_set_target_input(intel_sdvo))
1063                 return false;
1064
1065         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1066                                                       intel_sdvo_connector,
1067                                                       mode->clock / 10,
1068                                                       mode->hdisplay,
1069                                                       mode->vdisplay))
1070                 return false;
1071
1072         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1073                                                    &input_dtd))
1074                 return false;
1075
1076         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1077         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1078
1079         return true;
1080 }
1081
1082 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1083 {
1084         unsigned dotclock = pipe_config->port_clock;
1085         struct dpll *clock = &pipe_config->dpll;
1086
1087         /*
1088          * SDVO TV has fixed PLL values depend on its clock range,
1089          * this mirrors vbios setting.
1090          */
1091         if (dotclock >= 100000 && dotclock < 140500) {
1092                 clock->p1 = 2;
1093                 clock->p2 = 10;
1094                 clock->n = 3;
1095                 clock->m1 = 16;
1096                 clock->m2 = 8;
1097         } else if (dotclock >= 140500 && dotclock <= 200000) {
1098                 clock->p1 = 1;
1099                 clock->p2 = 10;
1100                 clock->n = 6;
1101                 clock->m1 = 12;
1102                 clock->m2 = 8;
1103         } else {
1104                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1105         }
1106
1107         pipe_config->clock_set = true;
1108 }
1109
1110 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1111                                      struct intel_crtc_state *pipe_config,
1112                                      struct drm_connector_state *conn_state)
1113 {
1114         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1115         struct intel_sdvo_connector_state *intel_sdvo_state =
1116                 to_intel_sdvo_connector_state(conn_state);
1117         struct intel_sdvo_connector *intel_sdvo_connector =
1118                 to_intel_sdvo_connector(conn_state->connector);
1119         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1120         struct drm_display_mode *mode = &pipe_config->base.mode;
1121
1122         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1123         pipe_config->pipe_bpp = 8*3;
1124         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1125
1126         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1127                 pipe_config->has_pch_encoder = true;
1128
1129         /*
1130          * We need to construct preferred input timings based on our
1131          * output timings.  To do that, we have to set the output
1132          * timings, even though this isn't really the right place in
1133          * the sequence to do it. Oh well.
1134          */
1135         if (IS_TV(intel_sdvo_connector)) {
1136                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1137                         return -EINVAL;
1138
1139                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1140                                                            intel_sdvo_connector,
1141                                                            mode,
1142                                                            adjusted_mode);
1143                 pipe_config->sdvo_tv_clock = true;
1144         } else if (IS_LVDS(intel_sdvo_connector)) {
1145                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1146                                                              intel_sdvo_connector->base.panel.fixed_mode))
1147                         return -EINVAL;
1148
1149                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1150                                                            intel_sdvo_connector,
1151                                                            mode,
1152                                                            adjusted_mode);
1153         }
1154
1155         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1156                 return -EINVAL;
1157
1158         /*
1159          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1160          * SDVO device will factor out the multiplier during mode_set.
1161          */
1162         pipe_config->pixel_multiplier =
1163                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1164
1165         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1166                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1167
1168         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1169             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1170                 pipe_config->has_audio = true;
1171
1172         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1173                 /*
1174                  * See CEA-861-E - 5.1 Default Encoding Parameters
1175                  *
1176                  * FIXME: This bit is only valid when using TMDS encoding and 8
1177                  * bit per color mode.
1178                  */
1179                 if (pipe_config->has_hdmi_sink &&
1180                     drm_match_cea_mode(adjusted_mode) > 1)
1181                         pipe_config->limited_color_range = true;
1182         } else {
1183                 if (pipe_config->has_hdmi_sink &&
1184                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1185                         pipe_config->limited_color_range = true;
1186         }
1187
1188         /* Clock computation needs to happen after pixel multiplier. */
1189         if (IS_TV(intel_sdvo_connector))
1190                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1191
1192         /* Set user selected PAR to incoming mode's member */
1193         if (intel_sdvo_connector->is_hdmi)
1194                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1195
1196         return 0;
1197 }
1198
1199 #define UPDATE_PROPERTY(input, NAME) \
1200         do { \
1201                 val = input; \
1202                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1203         } while (0)
1204
1205 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1206                                     const struct intel_sdvo_connector_state *sdvo_state)
1207 {
1208         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1209         struct intel_sdvo_connector *intel_sdvo_conn =
1210                 to_intel_sdvo_connector(conn_state->connector);
1211         u16 val;
1212
1213         if (intel_sdvo_conn->left)
1214                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1215
1216         if (intel_sdvo_conn->top)
1217                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1218
1219         if (intel_sdvo_conn->hpos)
1220                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1221
1222         if (intel_sdvo_conn->vpos)
1223                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1224
1225         if (intel_sdvo_conn->saturation)
1226                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1227
1228         if (intel_sdvo_conn->contrast)
1229                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1230
1231         if (intel_sdvo_conn->hue)
1232                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1233
1234         if (intel_sdvo_conn->brightness)
1235                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1236
1237         if (intel_sdvo_conn->sharpness)
1238                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1239
1240         if (intel_sdvo_conn->flicker_filter)
1241                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1242
1243         if (intel_sdvo_conn->flicker_filter_2d)
1244                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1245
1246         if (intel_sdvo_conn->flicker_filter_adaptive)
1247                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1248
1249         if (intel_sdvo_conn->tv_chroma_filter)
1250                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1251
1252         if (intel_sdvo_conn->tv_luma_filter)
1253                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1254
1255         if (intel_sdvo_conn->dot_crawl)
1256                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1257
1258 #undef UPDATE_PROPERTY
1259 }
1260
1261 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1262                                   const struct intel_crtc_state *crtc_state,
1263                                   const struct drm_connector_state *conn_state)
1264 {
1265         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1266         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1267         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1268         const struct intel_sdvo_connector_state *sdvo_state =
1269                 to_intel_sdvo_connector_state(conn_state);
1270         const struct intel_sdvo_connector *intel_sdvo_connector =
1271                 to_intel_sdvo_connector(conn_state->connector);
1272         const struct drm_display_mode *mode = &crtc_state->base.mode;
1273         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1274         u32 sdvox;
1275         struct intel_sdvo_in_out_map in_out;
1276         struct intel_sdvo_dtd input_dtd, output_dtd;
1277         int rate;
1278
1279         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1280
1281         /*
1282          * First, set the input mapping for the first input to our controlled
1283          * output. This is only correct if we're a single-input device, in
1284          * which case the first input is the output from the appropriate SDVO
1285          * channel on the motherboard.  In a two-input device, the first input
1286          * will be SDVOB and the second SDVOC.
1287          */
1288         in_out.in0 = intel_sdvo->attached_output;
1289         in_out.in1 = 0;
1290
1291         intel_sdvo_set_value(intel_sdvo,
1292                              SDVO_CMD_SET_IN_OUT_MAP,
1293                              &in_out, sizeof(in_out));
1294
1295         /* Set the output timings to the screen */
1296         if (!intel_sdvo_set_target_output(intel_sdvo,
1297                                           intel_sdvo->attached_output))
1298                 return;
1299
1300         /* lvds has a special fixed output timing. */
1301         if (IS_LVDS(intel_sdvo_connector))
1302                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1303                                              intel_sdvo_connector->base.panel.fixed_mode);
1304         else
1305                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1306         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1307                 DRM_INFO("Setting output timings on %s failed\n",
1308                          SDVO_NAME(intel_sdvo));
1309
1310         /* Set the input timing to the screen. Assume always input 0. */
1311         if (!intel_sdvo_set_target_input(intel_sdvo))
1312                 return;
1313
1314         if (crtc_state->has_hdmi_sink) {
1315                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1316                 intel_sdvo_set_colorimetry(intel_sdvo,
1317                                            SDVO_COLORIMETRY_RGB256);
1318                 intel_sdvo_set_avi_infoframe(intel_sdvo,
1319                                              crtc_state, conn_state);
1320         } else
1321                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1322
1323         if (IS_TV(intel_sdvo_connector) &&
1324             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1325                 return;
1326
1327         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1328
1329         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1330                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1331         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1332                 DRM_INFO("Setting input timings on %s failed\n",
1333                          SDVO_NAME(intel_sdvo));
1334
1335         switch (crtc_state->pixel_multiplier) {
1336         default:
1337                 WARN(1, "unknown pixel multiplier specified\n");
1338                 /* fall through */
1339         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1340         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1341         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1342         }
1343         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1344                 return;
1345
1346         /* Set the SDVO control regs. */
1347         if (INTEL_GEN(dev_priv) >= 4) {
1348                 /* The real mode polarity is set by the SDVO commands, using
1349                  * struct intel_sdvo_dtd. */
1350                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1351                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1352                         sdvox |= HDMI_COLOR_RANGE_16_235;
1353                 if (INTEL_GEN(dev_priv) < 5)
1354                         sdvox |= SDVO_BORDER_ENABLE;
1355         } else {
1356                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1357                 if (intel_sdvo->port == PORT_B)
1358                         sdvox &= SDVOB_PRESERVE_MASK;
1359                 else
1360                         sdvox &= SDVOC_PRESERVE_MASK;
1361                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1362         }
1363
1364         if (HAS_PCH_CPT(dev_priv))
1365                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1366         else
1367                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1368
1369         if (crtc_state->has_audio) {
1370                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1371                 sdvox |= SDVO_AUDIO_ENABLE;
1372         }
1373
1374         if (INTEL_GEN(dev_priv) >= 4) {
1375                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1376         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1377                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1378                 /* done in crtc_mode_set as it lives inside the dpll register */
1379         } else {
1380                 sdvox |= (crtc_state->pixel_multiplier - 1)
1381                         << SDVO_PORT_MULTIPLY_SHIFT;
1382         }
1383
1384         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1385             INTEL_GEN(dev_priv) < 5)
1386                 sdvox |= SDVO_STALL_SELECT;
1387         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1388 }
1389
1390 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1391 {
1392         struct intel_sdvo_connector *intel_sdvo_connector =
1393                 to_intel_sdvo_connector(&connector->base);
1394         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1395         u16 active_outputs = 0;
1396
1397         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1398
1399         return active_outputs & intel_sdvo_connector->output_flag;
1400 }
1401
1402 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1403                              i915_reg_t sdvo_reg, enum pipe *pipe)
1404 {
1405         u32 val;
1406
1407         val = I915_READ(sdvo_reg);
1408
1409         /* asserts want to know the pipe even if the port is disabled */
1410         if (HAS_PCH_CPT(dev_priv))
1411                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1412         else if (IS_CHERRYVIEW(dev_priv))
1413                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1414         else
1415                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1416
1417         return val & SDVO_ENABLE;
1418 }
1419
1420 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1421                                     enum pipe *pipe)
1422 {
1423         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1424         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1425         u16 active_outputs = 0;
1426         bool ret;
1427
1428         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1429
1430         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1431
1432         return ret || active_outputs;
1433 }
1434
1435 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1436                                   struct intel_crtc_state *pipe_config)
1437 {
1438         struct drm_device *dev = encoder->base.dev;
1439         struct drm_i915_private *dev_priv = to_i915(dev);
1440         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1441         struct intel_sdvo_dtd dtd;
1442         int encoder_pixel_multiplier = 0;
1443         int dotclock;
1444         u32 flags = 0, sdvox;
1445         u8 val;
1446         bool ret;
1447
1448         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1449
1450         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1451
1452         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1453         if (!ret) {
1454                 /*
1455                  * Some sdvo encoders are not spec compliant and don't
1456                  * implement the mandatory get_timings function.
1457                  */
1458                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1459                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1460         } else {
1461                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1462                         flags |= DRM_MODE_FLAG_PHSYNC;
1463                 else
1464                         flags |= DRM_MODE_FLAG_NHSYNC;
1465
1466                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1467                         flags |= DRM_MODE_FLAG_PVSYNC;
1468                 else
1469                         flags |= DRM_MODE_FLAG_NVSYNC;
1470         }
1471
1472         pipe_config->base.adjusted_mode.flags |= flags;
1473
1474         /*
1475          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1476          * the sdvo port register, on all other platforms it is part of the dpll
1477          * state. Since the general pipe state readout happens before the
1478          * encoder->get_config we so already have a valid pixel multplier on all
1479          * other platfroms.
1480          */
1481         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1482                 pipe_config->pixel_multiplier =
1483                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1484                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1485         }
1486
1487         dotclock = pipe_config->port_clock;
1488
1489         if (pipe_config->pixel_multiplier)
1490                 dotclock /= pipe_config->pixel_multiplier;
1491
1492         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1493
1494         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1495         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1496                                  &val, 1)) {
1497                 switch (val) {
1498                 case SDVO_CLOCK_RATE_MULT_1X:
1499                         encoder_pixel_multiplier = 1;
1500                         break;
1501                 case SDVO_CLOCK_RATE_MULT_2X:
1502                         encoder_pixel_multiplier = 2;
1503                         break;
1504                 case SDVO_CLOCK_RATE_MULT_4X:
1505                         encoder_pixel_multiplier = 4;
1506                         break;
1507                 }
1508         }
1509
1510         if (sdvox & HDMI_COLOR_RANGE_16_235)
1511                 pipe_config->limited_color_range = true;
1512
1513         if (sdvox & SDVO_AUDIO_ENABLE)
1514                 pipe_config->has_audio = true;
1515
1516         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1517                                  &val, 1)) {
1518                 if (val == SDVO_ENCODE_HDMI)
1519                         pipe_config->has_hdmi_sink = true;
1520         }
1521
1522         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1523              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1524              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1525 }
1526
1527 static void intel_disable_sdvo(struct intel_encoder *encoder,
1528                                const struct intel_crtc_state *old_crtc_state,
1529                                const struct drm_connector_state *conn_state)
1530 {
1531         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1532         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1533         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1534         u32 temp;
1535
1536         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1537         if (0)
1538                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1539                                                    DRM_MODE_DPMS_OFF);
1540
1541         temp = I915_READ(intel_sdvo->sdvo_reg);
1542
1543         temp &= ~SDVO_ENABLE;
1544         intel_sdvo_write_sdvox(intel_sdvo, temp);
1545
1546         /*
1547          * HW workaround for IBX, we need to move the port
1548          * to transcoder A after disabling it to allow the
1549          * matching DP port to be enabled on transcoder A.
1550          */
1551         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1552                 /*
1553                  * We get CPU/PCH FIFO underruns on the other pipe when
1554                  * doing the workaround. Sweep them under the rug.
1555                  */
1556                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1557                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1558
1559                 temp &= ~SDVO_PIPE_SEL_MASK;
1560                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1561                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1562
1563                 temp &= ~SDVO_ENABLE;
1564                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1565
1566                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1567                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1568                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1569         }
1570 }
1571
1572 static void pch_disable_sdvo(struct intel_encoder *encoder,
1573                              const struct intel_crtc_state *old_crtc_state,
1574                              const struct drm_connector_state *old_conn_state)
1575 {
1576 }
1577
1578 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1579                                   const struct intel_crtc_state *old_crtc_state,
1580                                   const struct drm_connector_state *old_conn_state)
1581 {
1582         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1583 }
1584
1585 static void intel_enable_sdvo(struct intel_encoder *encoder,
1586                               const struct intel_crtc_state *pipe_config,
1587                               const struct drm_connector_state *conn_state)
1588 {
1589         struct drm_device *dev = encoder->base.dev;
1590         struct drm_i915_private *dev_priv = to_i915(dev);
1591         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1592         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1593         u32 temp;
1594         bool input1, input2;
1595         int i;
1596         bool success;
1597
1598         temp = I915_READ(intel_sdvo->sdvo_reg);
1599         temp |= SDVO_ENABLE;
1600         intel_sdvo_write_sdvox(intel_sdvo, temp);
1601
1602         for (i = 0; i < 2; i++)
1603                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1604
1605         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1606         /*
1607          * Warn if the device reported failure to sync.
1608          *
1609          * A lot of SDVO devices fail to notify of sync, but it's
1610          * a given it the status is a success, we succeeded.
1611          */
1612         if (success && !input1) {
1613                 DRM_DEBUG_KMS("First %s output reported failure to "
1614                                 "sync\n", SDVO_NAME(intel_sdvo));
1615         }
1616
1617         if (0)
1618                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1619                                                    DRM_MODE_DPMS_ON);
1620         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1621 }
1622
1623 static enum drm_mode_status
1624 intel_sdvo_mode_valid(struct drm_connector *connector,
1625                       struct drm_display_mode *mode)
1626 {
1627         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1628         struct intel_sdvo_connector *intel_sdvo_connector =
1629                 to_intel_sdvo_connector(connector);
1630         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1631
1632         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1633                 return MODE_NO_DBLESCAN;
1634
1635         if (intel_sdvo->pixel_clock_min > mode->clock)
1636                 return MODE_CLOCK_LOW;
1637
1638         if (intel_sdvo->pixel_clock_max < mode->clock)
1639                 return MODE_CLOCK_HIGH;
1640
1641         if (mode->clock > max_dotclk)
1642                 return MODE_CLOCK_HIGH;
1643
1644         if (IS_LVDS(intel_sdvo_connector)) {
1645                 const struct drm_display_mode *fixed_mode =
1646                         intel_sdvo_connector->base.panel.fixed_mode;
1647
1648                 if (mode->hdisplay > fixed_mode->hdisplay)
1649                         return MODE_PANEL;
1650
1651                 if (mode->vdisplay > fixed_mode->vdisplay)
1652                         return MODE_PANEL;
1653         }
1654
1655         return MODE_OK;
1656 }
1657
1658 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1659 {
1660         BUILD_BUG_ON(sizeof(*caps) != 8);
1661         if (!intel_sdvo_get_value(intel_sdvo,
1662                                   SDVO_CMD_GET_DEVICE_CAPS,
1663                                   caps, sizeof(*caps)))
1664                 return false;
1665
1666         DRM_DEBUG_KMS("SDVO capabilities:\n"
1667                       "  vendor_id: %d\n"
1668                       "  device_id: %d\n"
1669                       "  device_rev_id: %d\n"
1670                       "  sdvo_version_major: %d\n"
1671                       "  sdvo_version_minor: %d\n"
1672                       "  sdvo_inputs_mask: %d\n"
1673                       "  smooth_scaling: %d\n"
1674                       "  sharp_scaling: %d\n"
1675                       "  up_scaling: %d\n"
1676                       "  down_scaling: %d\n"
1677                       "  stall_support: %d\n"
1678                       "  output_flags: %d\n",
1679                       caps->vendor_id,
1680                       caps->device_id,
1681                       caps->device_rev_id,
1682                       caps->sdvo_version_major,
1683                       caps->sdvo_version_minor,
1684                       caps->sdvo_inputs_mask,
1685                       caps->smooth_scaling,
1686                       caps->sharp_scaling,
1687                       caps->up_scaling,
1688                       caps->down_scaling,
1689                       caps->stall_support,
1690                       caps->output_flags);
1691
1692         return true;
1693 }
1694
1695 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1696 {
1697         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1698         u16 hotplug;
1699
1700         if (!I915_HAS_HOTPLUG(dev_priv))
1701                 return 0;
1702
1703         /*
1704          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1705          * on the line.
1706          */
1707         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1708                 return 0;
1709
1710         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1711                                         &hotplug, sizeof(hotplug)))
1712                 return 0;
1713
1714         return hotplug;
1715 }
1716
1717 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1718 {
1719         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1720
1721         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1722                              &intel_sdvo->hotplug_active, 2);
1723 }
1724
1725 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1726                                struct intel_connector *connector)
1727 {
1728         intel_sdvo_enable_hotplug(encoder);
1729
1730         return intel_encoder_hotplug(encoder, connector);
1731 }
1732
1733 static bool
1734 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1735 {
1736         /* Is there more than one type of output? */
1737         return hweight16(intel_sdvo->caps.output_flags) > 1;
1738 }
1739
1740 static struct edid *
1741 intel_sdvo_get_edid(struct drm_connector *connector)
1742 {
1743         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1744         return drm_get_edid(connector, &sdvo->ddc);
1745 }
1746
1747 /* Mac mini hack -- use the same DDC as the analog connector */
1748 static struct edid *
1749 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1750 {
1751         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1752
1753         return drm_get_edid(connector,
1754                             intel_gmbus_get_adapter(dev_priv,
1755                                                     dev_priv->vbt.crt_ddc_pin));
1756 }
1757
1758 static enum drm_connector_status
1759 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1760 {
1761         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1762         struct intel_sdvo_connector *intel_sdvo_connector =
1763                 to_intel_sdvo_connector(connector);
1764         enum drm_connector_status status;
1765         struct edid *edid;
1766
1767         edid = intel_sdvo_get_edid(connector);
1768
1769         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1770                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1771
1772                 /*
1773                  * Don't use the 1 as the argument of DDC bus switch to get
1774                  * the EDID. It is used for SDVO SPD ROM.
1775                  */
1776                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1777                         intel_sdvo->ddc_bus = ddc;
1778                         edid = intel_sdvo_get_edid(connector);
1779                         if (edid)
1780                                 break;
1781                 }
1782                 /*
1783                  * If we found the EDID on the other bus,
1784                  * assume that is the correct DDC bus.
1785                  */
1786                 if (edid == NULL)
1787                         intel_sdvo->ddc_bus = saved_ddc;
1788         }
1789
1790         /*
1791          * When there is no edid and no monitor is connected with VGA
1792          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1793          */
1794         if (edid == NULL)
1795                 edid = intel_sdvo_get_analog_edid(connector);
1796
1797         status = connector_status_unknown;
1798         if (edid != NULL) {
1799                 /* DDC bus is shared, match EDID to connector type */
1800                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1801                         status = connector_status_connected;
1802                         if (intel_sdvo_connector->is_hdmi) {
1803                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1804                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1805                         }
1806                 } else
1807                         status = connector_status_disconnected;
1808                 kfree(edid);
1809         }
1810
1811         return status;
1812 }
1813
1814 static bool
1815 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1816                                   struct edid *edid)
1817 {
1818         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1819         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1820
1821         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1822                       connector_is_digital, monitor_is_digital);
1823         return connector_is_digital == monitor_is_digital;
1824 }
1825
1826 static enum drm_connector_status
1827 intel_sdvo_detect(struct drm_connector *connector, bool force)
1828 {
1829         u16 response;
1830         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1831         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1832         enum drm_connector_status ret;
1833
1834         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1835                       connector->base.id, connector->name);
1836
1837         if (!intel_sdvo_get_value(intel_sdvo,
1838                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1839                                   &response, 2))
1840                 return connector_status_unknown;
1841
1842         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1843                       response & 0xff, response >> 8,
1844                       intel_sdvo_connector->output_flag);
1845
1846         if (response == 0)
1847                 return connector_status_disconnected;
1848
1849         intel_sdvo->attached_output = response;
1850
1851         intel_sdvo->has_hdmi_monitor = false;
1852         intel_sdvo->has_hdmi_audio = false;
1853
1854         if ((intel_sdvo_connector->output_flag & response) == 0)
1855                 ret = connector_status_disconnected;
1856         else if (IS_TMDS(intel_sdvo_connector))
1857                 ret = intel_sdvo_tmds_sink_detect(connector);
1858         else {
1859                 struct edid *edid;
1860
1861                 /* if we have an edid check it matches the connection */
1862                 edid = intel_sdvo_get_edid(connector);
1863                 if (edid == NULL)
1864                         edid = intel_sdvo_get_analog_edid(connector);
1865                 if (edid != NULL) {
1866                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1867                                                               edid))
1868                                 ret = connector_status_connected;
1869                         else
1870                                 ret = connector_status_disconnected;
1871
1872                         kfree(edid);
1873                 } else
1874                         ret = connector_status_connected;
1875         }
1876
1877         return ret;
1878 }
1879
1880 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1881 {
1882         struct edid *edid;
1883
1884         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1885                       connector->base.id, connector->name);
1886
1887         /* set the bus switch and get the modes */
1888         edid = intel_sdvo_get_edid(connector);
1889
1890         /*
1891          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1892          * link between analog and digital outputs. So, if the regular SDVO
1893          * DDC fails, check to see if the analog output is disconnected, in
1894          * which case we'll look there for the digital DDC data.
1895          */
1896         if (edid == NULL)
1897                 edid = intel_sdvo_get_analog_edid(connector);
1898
1899         if (edid != NULL) {
1900                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1901                                                       edid)) {
1902                         drm_connector_update_edid_property(connector, edid);
1903                         drm_add_edid_modes(connector, edid);
1904                 }
1905
1906                 kfree(edid);
1907         }
1908 }
1909
1910 /*
1911  * Set of SDVO TV modes.
1912  * Note!  This is in reply order (see loop in get_tv_modes).
1913  * XXX: all 60Hz refresh?
1914  */
1915 static const struct drm_display_mode sdvo_tv_modes[] = {
1916         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1917                    416, 0, 200, 201, 232, 233, 0,
1918                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1919         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1920                    416, 0, 240, 241, 272, 273, 0,
1921                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1922         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1923                    496, 0, 300, 301, 332, 333, 0,
1924                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1925         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1926                    736, 0, 350, 351, 382, 383, 0,
1927                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1928         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1929                    736, 0, 400, 401, 432, 433, 0,
1930                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1931         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1932                    736, 0, 480, 481, 512, 513, 0,
1933                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1934         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1935                    800, 0, 480, 481, 512, 513, 0,
1936                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1937         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1938                    800, 0, 576, 577, 608, 609, 0,
1939                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1940         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1941                    816, 0, 350, 351, 382, 383, 0,
1942                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1943         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1944                    816, 0, 400, 401, 432, 433, 0,
1945                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1946         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1947                    816, 0, 480, 481, 512, 513, 0,
1948                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1949         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1950                    816, 0, 540, 541, 572, 573, 0,
1951                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1952         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1953                    816, 0, 576, 577, 608, 609, 0,
1954                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1955         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1956                    864, 0, 576, 577, 608, 609, 0,
1957                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1958         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1959                    896, 0, 600, 601, 632, 633, 0,
1960                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1961         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1962                    928, 0, 624, 625, 656, 657, 0,
1963                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1964         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1965                    1016, 0, 766, 767, 798, 799, 0,
1966                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1967         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1968                    1120, 0, 768, 769, 800, 801, 0,
1969                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1970         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1971                    1376, 0, 1024, 1025, 1056, 1057, 0,
1972                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1973 };
1974
1975 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1976 {
1977         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1978         const struct drm_connector_state *conn_state = connector->state;
1979         struct intel_sdvo_sdtv_resolution_request tv_res;
1980         u32 reply = 0, format_map = 0;
1981         int i;
1982
1983         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1984                       connector->base.id, connector->name);
1985
1986         /*
1987          * Read the list of supported input resolutions for the selected TV
1988          * format.
1989          */
1990         format_map = 1 << conn_state->tv.mode;
1991         memcpy(&tv_res, &format_map,
1992                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1993
1994         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1995                 return;
1996
1997         BUILD_BUG_ON(sizeof(tv_res) != 3);
1998         if (!intel_sdvo_write_cmd(intel_sdvo,
1999                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2000                                   &tv_res, sizeof(tv_res)))
2001                 return;
2002         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2003                 return;
2004
2005         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2006                 if (reply & (1 << i)) {
2007                         struct drm_display_mode *nmode;
2008                         nmode = drm_mode_duplicate(connector->dev,
2009                                                    &sdvo_tv_modes[i]);
2010                         if (nmode)
2011                                 drm_mode_probed_add(connector, nmode);
2012                 }
2013 }
2014
2015 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2016 {
2017         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2018         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2019         struct drm_display_mode *newmode;
2020
2021         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2022                       connector->base.id, connector->name);
2023
2024         /*
2025          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2026          * SDVO->LVDS transcoders can't cope with the EDID mode.
2027          */
2028         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2029                 newmode = drm_mode_duplicate(connector->dev,
2030                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2031                 if (newmode != NULL) {
2032                         /* Guarantee the mode is preferred */
2033                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2034                                          DRM_MODE_TYPE_DRIVER);
2035                         drm_mode_probed_add(connector, newmode);
2036                 }
2037         }
2038
2039         /*
2040          * Attempt to get the mode list from DDC.
2041          * Assume that the preferred modes are
2042          * arranged in priority order.
2043          */
2044         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2045 }
2046
2047 static int intel_sdvo_get_modes(struct drm_connector *connector)
2048 {
2049         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2050
2051         if (IS_TV(intel_sdvo_connector))
2052                 intel_sdvo_get_tv_modes(connector);
2053         else if (IS_LVDS(intel_sdvo_connector))
2054                 intel_sdvo_get_lvds_modes(connector);
2055         else
2056                 intel_sdvo_get_ddc_modes(connector);
2057
2058         return !list_empty(&connector->probed_modes);
2059 }
2060
2061 static int
2062 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2063                                          const struct drm_connector_state *state,
2064                                          struct drm_property *property,
2065                                          u64 *val)
2066 {
2067         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2068         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2069
2070         if (property == intel_sdvo_connector->tv_format) {
2071                 int i;
2072
2073                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2074                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2075                                 *val = i;
2076
2077                                 return 0;
2078                         }
2079
2080                 WARN_ON(1);
2081                 *val = 0;
2082         } else if (property == intel_sdvo_connector->top ||
2083                    property == intel_sdvo_connector->bottom)
2084                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2085         else if (property == intel_sdvo_connector->left ||
2086                  property == intel_sdvo_connector->right)
2087                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2088         else if (property == intel_sdvo_connector->hpos)
2089                 *val = sdvo_state->tv.hpos;
2090         else if (property == intel_sdvo_connector->vpos)
2091                 *val = sdvo_state->tv.vpos;
2092         else if (property == intel_sdvo_connector->saturation)
2093                 *val = state->tv.saturation;
2094         else if (property == intel_sdvo_connector->contrast)
2095                 *val = state->tv.contrast;
2096         else if (property == intel_sdvo_connector->hue)
2097                 *val = state->tv.hue;
2098         else if (property == intel_sdvo_connector->brightness)
2099                 *val = state->tv.brightness;
2100         else if (property == intel_sdvo_connector->sharpness)
2101                 *val = sdvo_state->tv.sharpness;
2102         else if (property == intel_sdvo_connector->flicker_filter)
2103                 *val = sdvo_state->tv.flicker_filter;
2104         else if (property == intel_sdvo_connector->flicker_filter_2d)
2105                 *val = sdvo_state->tv.flicker_filter_2d;
2106         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2107                 *val = sdvo_state->tv.flicker_filter_adaptive;
2108         else if (property == intel_sdvo_connector->tv_chroma_filter)
2109                 *val = sdvo_state->tv.chroma_filter;
2110         else if (property == intel_sdvo_connector->tv_luma_filter)
2111                 *val = sdvo_state->tv.luma_filter;
2112         else if (property == intel_sdvo_connector->dot_crawl)
2113                 *val = sdvo_state->tv.dot_crawl;
2114         else
2115                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2116
2117         return 0;
2118 }
2119
2120 static int
2121 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2122                                          struct drm_connector_state *state,
2123                                          struct drm_property *property,
2124                                          u64 val)
2125 {
2126         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2127         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2128
2129         if (property == intel_sdvo_connector->tv_format) {
2130                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2131
2132                 if (state->crtc) {
2133                         struct drm_crtc_state *crtc_state =
2134                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2135
2136                         crtc_state->connectors_changed = true;
2137                 }
2138         } else if (property == intel_sdvo_connector->top ||
2139                    property == intel_sdvo_connector->bottom)
2140                 /* Cannot set these independent from each other */
2141                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2142         else if (property == intel_sdvo_connector->left ||
2143                  property == intel_sdvo_connector->right)
2144                 /* Cannot set these independent from each other */
2145                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2146         else if (property == intel_sdvo_connector->hpos)
2147                 sdvo_state->tv.hpos = val;
2148         else if (property == intel_sdvo_connector->vpos)
2149                 sdvo_state->tv.vpos = val;
2150         else if (property == intel_sdvo_connector->saturation)
2151                 state->tv.saturation = val;
2152         else if (property == intel_sdvo_connector->contrast)
2153                 state->tv.contrast = val;
2154         else if (property == intel_sdvo_connector->hue)
2155                 state->tv.hue = val;
2156         else if (property == intel_sdvo_connector->brightness)
2157                 state->tv.brightness = val;
2158         else if (property == intel_sdvo_connector->sharpness)
2159                 sdvo_state->tv.sharpness = val;
2160         else if (property == intel_sdvo_connector->flicker_filter)
2161                 sdvo_state->tv.flicker_filter = val;
2162         else if (property == intel_sdvo_connector->flicker_filter_2d)
2163                 sdvo_state->tv.flicker_filter_2d = val;
2164         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2165                 sdvo_state->tv.flicker_filter_adaptive = val;
2166         else if (property == intel_sdvo_connector->tv_chroma_filter)
2167                 sdvo_state->tv.chroma_filter = val;
2168         else if (property == intel_sdvo_connector->tv_luma_filter)
2169                 sdvo_state->tv.luma_filter = val;
2170         else if (property == intel_sdvo_connector->dot_crawl)
2171                 sdvo_state->tv.dot_crawl = val;
2172         else
2173                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2174
2175         return 0;
2176 }
2177
2178 static int
2179 intel_sdvo_connector_register(struct drm_connector *connector)
2180 {
2181         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2182         int ret;
2183
2184         ret = intel_connector_register(connector);
2185         if (ret)
2186                 return ret;
2187
2188         return sysfs_create_link(&connector->kdev->kobj,
2189                                  &sdvo->ddc.dev.kobj,
2190                                  sdvo->ddc.dev.kobj.name);
2191 }
2192
2193 static void
2194 intel_sdvo_connector_unregister(struct drm_connector *connector)
2195 {
2196         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2197
2198         sysfs_remove_link(&connector->kdev->kobj,
2199                           sdvo->ddc.dev.kobj.name);
2200         intel_connector_unregister(connector);
2201 }
2202
2203 static struct drm_connector_state *
2204 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2205 {
2206         struct intel_sdvo_connector_state *state;
2207
2208         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2209         if (!state)
2210                 return NULL;
2211
2212         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2213         return &state->base.base;
2214 }
2215
2216 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2217         .detect = intel_sdvo_detect,
2218         .fill_modes = drm_helper_probe_single_connector_modes,
2219         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2220         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2221         .late_register = intel_sdvo_connector_register,
2222         .early_unregister = intel_sdvo_connector_unregister,
2223         .destroy = intel_connector_destroy,
2224         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2225         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2226 };
2227
2228 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2229                                    struct drm_connector_state *new_conn_state)
2230 {
2231         struct drm_atomic_state *state = new_conn_state->state;
2232         struct drm_connector_state *old_conn_state =
2233                 drm_atomic_get_old_connector_state(state, conn);
2234         struct intel_sdvo_connector_state *old_state =
2235                 to_intel_sdvo_connector_state(old_conn_state);
2236         struct intel_sdvo_connector_state *new_state =
2237                 to_intel_sdvo_connector_state(new_conn_state);
2238
2239         if (new_conn_state->crtc &&
2240             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2241              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2242                 struct drm_crtc_state *crtc_state =
2243                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2244                                                       new_conn_state->crtc);
2245
2246                 crtc_state->connectors_changed = true;
2247         }
2248
2249         return intel_digital_connector_atomic_check(conn, new_conn_state);
2250 }
2251
2252 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2253         .get_modes = intel_sdvo_get_modes,
2254         .mode_valid = intel_sdvo_mode_valid,
2255         .atomic_check = intel_sdvo_atomic_check,
2256 };
2257
2258 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2259 {
2260         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2261
2262         i2c_del_adapter(&intel_sdvo->ddc);
2263         intel_encoder_destroy(encoder);
2264 }
2265
2266 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2267         .destroy = intel_sdvo_enc_destroy,
2268 };
2269
2270 static void
2271 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2272 {
2273         u16 mask = 0;
2274         unsigned int num_bits;
2275
2276         /*
2277          * Make a mask of outputs less than or equal to our own priority in the
2278          * list.
2279          */
2280         switch (sdvo->controlled_output) {
2281         case SDVO_OUTPUT_LVDS1:
2282                 mask |= SDVO_OUTPUT_LVDS1;
2283                 /* fall through */
2284         case SDVO_OUTPUT_LVDS0:
2285                 mask |= SDVO_OUTPUT_LVDS0;
2286                 /* fall through */
2287         case SDVO_OUTPUT_TMDS1:
2288                 mask |= SDVO_OUTPUT_TMDS1;
2289                 /* fall through */
2290         case SDVO_OUTPUT_TMDS0:
2291                 mask |= SDVO_OUTPUT_TMDS0;
2292                 /* fall through */
2293         case SDVO_OUTPUT_RGB1:
2294                 mask |= SDVO_OUTPUT_RGB1;
2295                 /* fall through */
2296         case SDVO_OUTPUT_RGB0:
2297                 mask |= SDVO_OUTPUT_RGB0;
2298                 break;
2299         }
2300
2301         /* Count bits to find what number we are in the priority list. */
2302         mask &= sdvo->caps.output_flags;
2303         num_bits = hweight16(mask);
2304         /* If more than 3 outputs, default to DDC bus 3 for now. */
2305         if (num_bits > 3)
2306                 num_bits = 3;
2307
2308         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2309         sdvo->ddc_bus = 1 << num_bits;
2310 }
2311
2312 /*
2313  * Choose the appropriate DDC bus for control bus switch command for this
2314  * SDVO output based on the controlled output.
2315  *
2316  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2317  * outputs, then LVDS outputs.
2318  */
2319 static void
2320 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2321                           struct intel_sdvo *sdvo)
2322 {
2323         struct sdvo_device_mapping *mapping;
2324
2325         if (sdvo->port == PORT_B)
2326                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2327         else
2328                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2329
2330         if (mapping->initialized)
2331                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2332         else
2333                 intel_sdvo_guess_ddc_bus(sdvo);
2334 }
2335
2336 static void
2337 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2338                           struct intel_sdvo *sdvo)
2339 {
2340         struct sdvo_device_mapping *mapping;
2341         u8 pin;
2342
2343         if (sdvo->port == PORT_B)
2344                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2345         else
2346                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2347
2348         if (mapping->initialized &&
2349             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2350                 pin = mapping->i2c_pin;
2351         else
2352                 pin = GMBUS_PIN_DPB;
2353
2354         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2355
2356         /*
2357          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2358          * our code totally fails once we start using gmbus. Hence fall back to
2359          * bit banging for now.
2360          */
2361         intel_gmbus_force_bit(sdvo->i2c, true);
2362 }
2363
2364 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2365 static void
2366 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2367 {
2368         intel_gmbus_force_bit(sdvo->i2c, false);
2369 }
2370
2371 static bool
2372 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2373 {
2374         return intel_sdvo_check_supp_encode(intel_sdvo);
2375 }
2376
2377 static u8
2378 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2379                           struct intel_sdvo *sdvo)
2380 {
2381         struct sdvo_device_mapping *my_mapping, *other_mapping;
2382
2383         if (sdvo->port == PORT_B) {
2384                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2385                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2386         } else {
2387                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2388                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2389         }
2390
2391         /* If the BIOS described our SDVO device, take advantage of it. */
2392         if (my_mapping->slave_addr)
2393                 return my_mapping->slave_addr;
2394
2395         /*
2396          * If the BIOS only described a different SDVO device, use the
2397          * address that it isn't using.
2398          */
2399         if (other_mapping->slave_addr) {
2400                 if (other_mapping->slave_addr == 0x70)
2401                         return 0x72;
2402                 else
2403                         return 0x70;
2404         }
2405
2406         /*
2407          * No SDVO device info is found for another DVO port,
2408          * so use mapping assumption we had before BIOS parsing.
2409          */
2410         if (sdvo->port == PORT_B)
2411                 return 0x70;
2412         else
2413                 return 0x72;
2414 }
2415
2416 static int
2417 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2418                           struct intel_sdvo *encoder)
2419 {
2420         struct drm_connector *drm_connector;
2421         int ret;
2422
2423         drm_connector = &connector->base.base;
2424         ret = drm_connector_init(encoder->base.base.dev,
2425                            drm_connector,
2426                            &intel_sdvo_connector_funcs,
2427                            connector->base.base.connector_type);
2428         if (ret < 0)
2429                 return ret;
2430
2431         drm_connector_helper_add(drm_connector,
2432                                  &intel_sdvo_connector_helper_funcs);
2433
2434         connector->base.base.interlace_allowed = 1;
2435         connector->base.base.doublescan_allowed = 0;
2436         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2437         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2438
2439         intel_connector_attach_encoder(&connector->base, &encoder->base);
2440
2441         return 0;
2442 }
2443
2444 static void
2445 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2446                                struct intel_sdvo_connector *connector)
2447 {
2448         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2449
2450         intel_attach_force_audio_property(&connector->base.base);
2451         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2452                 intel_attach_broadcast_rgb_property(&connector->base.base);
2453         }
2454         intel_attach_aspect_ratio_property(&connector->base.base);
2455         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2456 }
2457
2458 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2459 {
2460         struct intel_sdvo_connector *sdvo_connector;
2461         struct intel_sdvo_connector_state *conn_state;
2462
2463         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2464         if (!sdvo_connector)
2465                 return NULL;
2466
2467         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2468         if (!conn_state) {
2469                 kfree(sdvo_connector);
2470                 return NULL;
2471         }
2472
2473         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2474                                             &conn_state->base.base);
2475
2476         return sdvo_connector;
2477 }
2478
2479 static bool
2480 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2481 {
2482         struct drm_encoder *encoder = &intel_sdvo->base.base;
2483         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2484         struct drm_connector *connector;
2485         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2486         struct intel_connector *intel_connector;
2487         struct intel_sdvo_connector *intel_sdvo_connector;
2488
2489         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2490
2491         intel_sdvo_connector = intel_sdvo_connector_alloc();
2492         if (!intel_sdvo_connector)
2493                 return false;
2494
2495         if (device == 0) {
2496                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2497                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2498         } else if (device == 1) {
2499                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2500                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2501         }
2502
2503         intel_connector = &intel_sdvo_connector->base;
2504         connector = &intel_connector->base;
2505         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2506                 intel_sdvo_connector->output_flag) {
2507                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2508                 /*
2509                  * Some SDVO devices have one-shot hotplug interrupts.
2510                  * Ensure that they get re-enabled when an interrupt happens.
2511                  */
2512                 intel_encoder->hotplug = intel_sdvo_hotplug;
2513                 intel_sdvo_enable_hotplug(intel_encoder);
2514         } else {
2515                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2516         }
2517         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2518         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2519
2520         /* gen3 doesn't do the hdmi bits in the SDVO register */
2521         if (INTEL_GEN(dev_priv) >= 4 &&
2522             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2523                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2524                 intel_sdvo_connector->is_hdmi = true;
2525         }
2526
2527         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2528                 kfree(intel_sdvo_connector);
2529                 return false;
2530         }
2531
2532         if (intel_sdvo_connector->is_hdmi)
2533                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2534
2535         return true;
2536 }
2537
2538 static bool
2539 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2540 {
2541         struct drm_encoder *encoder = &intel_sdvo->base.base;
2542         struct drm_connector *connector;
2543         struct intel_connector *intel_connector;
2544         struct intel_sdvo_connector *intel_sdvo_connector;
2545
2546         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2547
2548         intel_sdvo_connector = intel_sdvo_connector_alloc();
2549         if (!intel_sdvo_connector)
2550                 return false;
2551
2552         intel_connector = &intel_sdvo_connector->base;
2553         connector = &intel_connector->base;
2554         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2555         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2556
2557         intel_sdvo->controlled_output |= type;
2558         intel_sdvo_connector->output_flag = type;
2559
2560         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2561                 kfree(intel_sdvo_connector);
2562                 return false;
2563         }
2564
2565         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2566                 goto err;
2567
2568         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2569                 goto err;
2570
2571         return true;
2572
2573 err:
2574         intel_connector_destroy(connector);
2575         return false;
2576 }
2577
2578 static bool
2579 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2580 {
2581         struct drm_encoder *encoder = &intel_sdvo->base.base;
2582         struct drm_connector *connector;
2583         struct intel_connector *intel_connector;
2584         struct intel_sdvo_connector *intel_sdvo_connector;
2585
2586         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2587
2588         intel_sdvo_connector = intel_sdvo_connector_alloc();
2589         if (!intel_sdvo_connector)
2590                 return false;
2591
2592         intel_connector = &intel_sdvo_connector->base;
2593         connector = &intel_connector->base;
2594         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2595         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2596         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2597
2598         if (device == 0) {
2599                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2600                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2601         } else if (device == 1) {
2602                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2603                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2604         }
2605
2606         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2607                 kfree(intel_sdvo_connector);
2608                 return false;
2609         }
2610
2611         return true;
2612 }
2613
2614 static bool
2615 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2616 {
2617         struct drm_encoder *encoder = &intel_sdvo->base.base;
2618         struct drm_connector *connector;
2619         struct intel_connector *intel_connector;
2620         struct intel_sdvo_connector *intel_sdvo_connector;
2621         struct drm_display_mode *mode;
2622
2623         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2624
2625         intel_sdvo_connector = intel_sdvo_connector_alloc();
2626         if (!intel_sdvo_connector)
2627                 return false;
2628
2629         intel_connector = &intel_sdvo_connector->base;
2630         connector = &intel_connector->base;
2631         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2632         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2633
2634         if (device == 0) {
2635                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2636                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2637         } else if (device == 1) {
2638                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2639                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2640         }
2641
2642         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2643                 kfree(intel_sdvo_connector);
2644                 return false;
2645         }
2646
2647         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2648                 goto err;
2649
2650         intel_sdvo_get_lvds_modes(connector);
2651
2652         list_for_each_entry(mode, &connector->probed_modes, head) {
2653                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2654                         struct drm_display_mode *fixed_mode =
2655                                 drm_mode_duplicate(connector->dev, mode);
2656
2657                         intel_panel_init(&intel_connector->panel,
2658                                          fixed_mode, NULL);
2659                         break;
2660                 }
2661         }
2662
2663         if (!intel_connector->panel.fixed_mode)
2664                 goto err;
2665
2666         return true;
2667
2668 err:
2669         intel_connector_destroy(connector);
2670         return false;
2671 }
2672
2673 static bool
2674 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2675 {
2676         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2677
2678         if (flags & SDVO_OUTPUT_TMDS0)
2679                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2680                         return false;
2681
2682         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2683                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2684                         return false;
2685
2686         /* TV has no XXX1 function block */
2687         if (flags & SDVO_OUTPUT_SVID0)
2688                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2689                         return false;
2690
2691         if (flags & SDVO_OUTPUT_CVBS0)
2692                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2693                         return false;
2694
2695         if (flags & SDVO_OUTPUT_YPRPB0)
2696                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2697                         return false;
2698
2699         if (flags & SDVO_OUTPUT_RGB0)
2700                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2701                         return false;
2702
2703         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2704                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2705                         return false;
2706
2707         if (flags & SDVO_OUTPUT_LVDS0)
2708                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2709                         return false;
2710
2711         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2712                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2713                         return false;
2714
2715         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2716                 unsigned char bytes[2];
2717
2718                 intel_sdvo->controlled_output = 0;
2719                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2720                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2721                               SDVO_NAME(intel_sdvo),
2722                               bytes[0], bytes[1]);
2723                 return false;
2724         }
2725         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2726
2727         return true;
2728 }
2729
2730 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2731 {
2732         struct drm_device *dev = intel_sdvo->base.base.dev;
2733         struct drm_connector *connector, *tmp;
2734
2735         list_for_each_entry_safe(connector, tmp,
2736                                  &dev->mode_config.connector_list, head) {
2737                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2738                         drm_connector_unregister(connector);
2739                         intel_connector_destroy(connector);
2740                 }
2741         }
2742 }
2743
2744 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2745                                           struct intel_sdvo_connector *intel_sdvo_connector,
2746                                           int type)
2747 {
2748         struct drm_device *dev = intel_sdvo->base.base.dev;
2749         struct intel_sdvo_tv_format format;
2750         u32 format_map, i;
2751
2752         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2753                 return false;
2754
2755         BUILD_BUG_ON(sizeof(format) != 6);
2756         if (!intel_sdvo_get_value(intel_sdvo,
2757                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2758                                   &format, sizeof(format)))
2759                 return false;
2760
2761         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2762
2763         if (format_map == 0)
2764                 return false;
2765
2766         intel_sdvo_connector->format_supported_num = 0;
2767         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2768                 if (format_map & (1 << i))
2769                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2770
2771
2772         intel_sdvo_connector->tv_format =
2773                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2774                                             "mode", intel_sdvo_connector->format_supported_num);
2775         if (!intel_sdvo_connector->tv_format)
2776                 return false;
2777
2778         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2779                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2780                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2781
2782         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2783         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2784                                    intel_sdvo_connector->tv_format, 0);
2785         return true;
2786
2787 }
2788
2789 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2790         if (enhancements.name) { \
2791                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2792                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2793                         return false; \
2794                 intel_sdvo_connector->name = \
2795                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2796                 if (!intel_sdvo_connector->name) return false; \
2797                 state_assignment = response; \
2798                 drm_object_attach_property(&connector->base, \
2799                                            intel_sdvo_connector->name, 0); \
2800                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2801                               data_value[0], data_value[1], response); \
2802         } \
2803 } while (0)
2804
2805 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2806
2807 static bool
2808 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2809                                       struct intel_sdvo_connector *intel_sdvo_connector,
2810                                       struct intel_sdvo_enhancements_reply enhancements)
2811 {
2812         struct drm_device *dev = intel_sdvo->base.base.dev;
2813         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2814         struct drm_connector_state *conn_state = connector->state;
2815         struct intel_sdvo_connector_state *sdvo_state =
2816                 to_intel_sdvo_connector_state(conn_state);
2817         u16 response, data_value[2];
2818
2819         /* when horizontal overscan is supported, Add the left/right property */
2820         if (enhancements.overscan_h) {
2821                 if (!intel_sdvo_get_value(intel_sdvo,
2822                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2823                                           &data_value, 4))
2824                         return false;
2825
2826                 if (!intel_sdvo_get_value(intel_sdvo,
2827                                           SDVO_CMD_GET_OVERSCAN_H,
2828                                           &response, 2))
2829                         return false;
2830
2831                 sdvo_state->tv.overscan_h = response;
2832
2833                 intel_sdvo_connector->max_hscan = data_value[0];
2834                 intel_sdvo_connector->left =
2835                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2836                 if (!intel_sdvo_connector->left)
2837                         return false;
2838
2839                 drm_object_attach_property(&connector->base,
2840                                            intel_sdvo_connector->left, 0);
2841
2842                 intel_sdvo_connector->right =
2843                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2844                 if (!intel_sdvo_connector->right)
2845                         return false;
2846
2847                 drm_object_attach_property(&connector->base,
2848                                               intel_sdvo_connector->right, 0);
2849                 DRM_DEBUG_KMS("h_overscan: max %d, "
2850                               "default %d, current %d\n",
2851                               data_value[0], data_value[1], response);
2852         }
2853
2854         if (enhancements.overscan_v) {
2855                 if (!intel_sdvo_get_value(intel_sdvo,
2856                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2857                                           &data_value, 4))
2858                         return false;
2859
2860                 if (!intel_sdvo_get_value(intel_sdvo,
2861                                           SDVO_CMD_GET_OVERSCAN_V,
2862                                           &response, 2))
2863                         return false;
2864
2865                 sdvo_state->tv.overscan_v = response;
2866
2867                 intel_sdvo_connector->max_vscan = data_value[0];
2868                 intel_sdvo_connector->top =
2869                         drm_property_create_range(dev, 0,
2870                                             "top_margin", 0, data_value[0]);
2871                 if (!intel_sdvo_connector->top)
2872                         return false;
2873
2874                 drm_object_attach_property(&connector->base,
2875                                            intel_sdvo_connector->top, 0);
2876
2877                 intel_sdvo_connector->bottom =
2878                         drm_property_create_range(dev, 0,
2879                                             "bottom_margin", 0, data_value[0]);
2880                 if (!intel_sdvo_connector->bottom)
2881                         return false;
2882
2883                 drm_object_attach_property(&connector->base,
2884                                               intel_sdvo_connector->bottom, 0);
2885                 DRM_DEBUG_KMS("v_overscan: max %d, "
2886                               "default %d, current %d\n",
2887                               data_value[0], data_value[1], response);
2888         }
2889
2890         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2891         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2892         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2893         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2894         ENHANCEMENT(&conn_state->tv, hue, HUE);
2895         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2896         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2897         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2898         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2899         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2900         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2901         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2902
2903         if (enhancements.dot_crawl) {
2904                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2905                         return false;
2906
2907                 sdvo_state->tv.dot_crawl = response & 0x1;
2908                 intel_sdvo_connector->dot_crawl =
2909                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2910                 if (!intel_sdvo_connector->dot_crawl)
2911                         return false;
2912
2913                 drm_object_attach_property(&connector->base,
2914                                            intel_sdvo_connector->dot_crawl, 0);
2915                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2916         }
2917
2918         return true;
2919 }
2920
2921 static bool
2922 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2923                                         struct intel_sdvo_connector *intel_sdvo_connector,
2924                                         struct intel_sdvo_enhancements_reply enhancements)
2925 {
2926         struct drm_device *dev = intel_sdvo->base.base.dev;
2927         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2928         u16 response, data_value[2];
2929
2930         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2931
2932         return true;
2933 }
2934 #undef ENHANCEMENT
2935 #undef _ENHANCEMENT
2936
2937 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2938                                                struct intel_sdvo_connector *intel_sdvo_connector)
2939 {
2940         union {
2941                 struct intel_sdvo_enhancements_reply reply;
2942                 u16 response;
2943         } enhancements;
2944
2945         BUILD_BUG_ON(sizeof(enhancements) != 2);
2946
2947         if (!intel_sdvo_get_value(intel_sdvo,
2948                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2949                                   &enhancements, sizeof(enhancements)) ||
2950             enhancements.response == 0) {
2951                 DRM_DEBUG_KMS("No enhancement is supported\n");
2952                 return true;
2953         }
2954
2955         if (IS_TV(intel_sdvo_connector))
2956                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2957         else if (IS_LVDS(intel_sdvo_connector))
2958                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2959         else
2960                 return true;
2961 }
2962
2963 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2964                                      struct i2c_msg *msgs,
2965                                      int num)
2966 {
2967         struct intel_sdvo *sdvo = adapter->algo_data;
2968
2969         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2970                 return -EIO;
2971
2972         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2973 }
2974
2975 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2976 {
2977         struct intel_sdvo *sdvo = adapter->algo_data;
2978         return sdvo->i2c->algo->functionality(sdvo->i2c);
2979 }
2980
2981 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2982         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2983         .functionality  = intel_sdvo_ddc_proxy_func
2984 };
2985
2986 static void proxy_lock_bus(struct i2c_adapter *adapter,
2987                            unsigned int flags)
2988 {
2989         struct intel_sdvo *sdvo = adapter->algo_data;
2990         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
2991 }
2992
2993 static int proxy_trylock_bus(struct i2c_adapter *adapter,
2994                              unsigned int flags)
2995 {
2996         struct intel_sdvo *sdvo = adapter->algo_data;
2997         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
2998 }
2999
3000 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3001                              unsigned int flags)
3002 {
3003         struct intel_sdvo *sdvo = adapter->algo_data;
3004         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3005 }
3006
3007 static const struct i2c_lock_operations proxy_lock_ops = {
3008         .lock_bus =    proxy_lock_bus,
3009         .trylock_bus = proxy_trylock_bus,
3010         .unlock_bus =  proxy_unlock_bus,
3011 };
3012
3013 static bool
3014 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3015                           struct drm_i915_private *dev_priv)
3016 {
3017         struct pci_dev *pdev = dev_priv->drm.pdev;
3018
3019         sdvo->ddc.owner = THIS_MODULE;
3020         sdvo->ddc.class = I2C_CLASS_DDC;
3021         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3022         sdvo->ddc.dev.parent = &pdev->dev;
3023         sdvo->ddc.algo_data = sdvo;
3024         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3025         sdvo->ddc.lock_ops = &proxy_lock_ops;
3026
3027         return i2c_add_adapter(&sdvo->ddc) == 0;
3028 }
3029
3030 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3031                                    enum port port)
3032 {
3033         if (HAS_PCH_SPLIT(dev_priv))
3034                 WARN_ON(port != PORT_B);
3035         else
3036                 WARN_ON(port != PORT_B && port != PORT_C);
3037 }
3038
3039 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3040                      i915_reg_t sdvo_reg, enum port port)
3041 {
3042         struct intel_encoder *intel_encoder;
3043         struct intel_sdvo *intel_sdvo;
3044         int i;
3045
3046         assert_sdvo_port_valid(dev_priv, port);
3047
3048         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3049         if (!intel_sdvo)
3050                 return false;
3051
3052         intel_sdvo->sdvo_reg = sdvo_reg;
3053         intel_sdvo->port = port;
3054         intel_sdvo->slave_addr =
3055                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3056         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3057         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3058                 goto err_i2c_bus;
3059
3060         /* encoder type will be decided later */
3061         intel_encoder = &intel_sdvo->base;
3062         intel_encoder->type = INTEL_OUTPUT_SDVO;
3063         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3064         intel_encoder->port = port;
3065         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3066                          &intel_sdvo_enc_funcs, 0,
3067                          "SDVO %c", port_name(port));
3068
3069         /* Read the regs to test if we can talk to the device */
3070         for (i = 0; i < 0x40; i++) {
3071                 u8 byte;
3072
3073                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3074                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3075                                       SDVO_NAME(intel_sdvo));
3076                         goto err;
3077                 }
3078         }
3079
3080         intel_encoder->compute_config = intel_sdvo_compute_config;
3081         if (HAS_PCH_SPLIT(dev_priv)) {
3082                 intel_encoder->disable = pch_disable_sdvo;
3083                 intel_encoder->post_disable = pch_post_disable_sdvo;
3084         } else {
3085                 intel_encoder->disable = intel_disable_sdvo;
3086         }
3087         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3088         intel_encoder->enable = intel_enable_sdvo;
3089         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3090         intel_encoder->get_config = intel_sdvo_get_config;
3091
3092         /* In default case sdvo lvds is false */
3093         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3094                 goto err;
3095
3096         if (intel_sdvo_output_setup(intel_sdvo,
3097                                     intel_sdvo->caps.output_flags) != true) {
3098                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3099                               SDVO_NAME(intel_sdvo));
3100                 /* Output_setup can leave behind connectors! */
3101                 goto err_output;
3102         }
3103
3104         /*
3105          * Only enable the hotplug irq if we need it, to work around noisy
3106          * hotplug lines.
3107          */
3108         if (intel_sdvo->hotplug_active) {
3109                 if (intel_sdvo->port == PORT_B)
3110                         intel_encoder->hpd_pin = HPD_SDVO_B;
3111                 else
3112                         intel_encoder->hpd_pin = HPD_SDVO_C;
3113         }
3114
3115         /*
3116          * Cloning SDVO with anything is often impossible, since the SDVO
3117          * encoder can request a special input timing mode. And even if that's
3118          * not the case we have evidence that cloning a plain unscaled mode with
3119          * VGA doesn't really work. Furthermore the cloning flags are way too
3120          * simplistic anyway to express such constraints, so just give up on
3121          * cloning for SDVO encoders.
3122          */
3123         intel_sdvo->base.cloneable = 0;
3124
3125         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3126
3127         /* Set the input timing to the screen. Assume always input 0. */
3128         if (!intel_sdvo_set_target_input(intel_sdvo))
3129                 goto err_output;
3130
3131         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3132                                                     &intel_sdvo->pixel_clock_min,
3133                                                     &intel_sdvo->pixel_clock_max))
3134                 goto err_output;
3135
3136         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3137                         "clock range %dMHz - %dMHz, "
3138                         "input 1: %c, input 2: %c, "
3139                         "output 1: %c, output 2: %c\n",
3140                         SDVO_NAME(intel_sdvo),
3141                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3142                         intel_sdvo->caps.device_rev_id,
3143                         intel_sdvo->pixel_clock_min / 1000,
3144                         intel_sdvo->pixel_clock_max / 1000,
3145                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3146                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3147                         /* check currently supported outputs */
3148                         intel_sdvo->caps.output_flags &
3149                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3150                         intel_sdvo->caps.output_flags &
3151                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3152         return true;
3153
3154 err_output:
3155         intel_sdvo_output_cleanup(intel_sdvo);
3156
3157 err:
3158         drm_encoder_cleanup(&intel_encoder->base);
3159         i2c_del_adapter(&intel_sdvo->ddc);
3160 err_i2c_bus:
3161         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3162         kfree(intel_sdvo);
3163
3164         return false;
3165 }