drivers/gpu/drm/i915/intel_pch.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright 2019 Intel Corporation.
   4  */
   5
   6 #include "i915_drv.h"
   7 #include "intel_pch.h"
   8
   9 /* Map PCH device id to PCH type, or PCH_NONE if unknown. */
  10 static enum intel_pch
  11 intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
  12 {
  13         switch (id) {
  14         case INTEL_PCH_IBX_DEVICE_ID_TYPE:
  15                 DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
  16                 WARN_ON(!IS_GEN(dev_priv, 5));
  17                 return PCH_IBX;
  18         case INTEL_PCH_CPT_DEVICE_ID_TYPE:
  19                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
  20                 WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
  21                 return PCH_CPT;
  22         case INTEL_PCH_PPT_DEVICE_ID_TYPE:
  23                 DRM_DEBUG_KMS("Found PantherPoint PCH\n");
  24                 WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
  25                 /* PantherPoint is CPT compatible */
  26                 return PCH_CPT;
  27         case INTEL_PCH_LPT_DEVICE_ID_TYPE:
  28                 DRM_DEBUG_KMS("Found LynxPoint PCH\n");
  29                 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  30                 WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
  31                 return PCH_LPT;
  32         case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
  33                 DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
  34                 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  35                 WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
  36                 return PCH_LPT;
  37         case INTEL_PCH_WPT_DEVICE_ID_TYPE:
  38                 DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
  39                 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  40                 WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
  41                 /* WildcatPoint is LPT compatible */
  42                 return PCH_LPT;
  43         case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
  44                 DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
  45                 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
  46                 WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
  47                 /* WildcatPoint is LPT compatible */
  48                 return PCH_LPT;
  49         case INTEL_PCH_SPT_DEVICE_ID_TYPE:
  50                 DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
  51                 WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
  52                 return PCH_SPT;
  53         case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
  54                 DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
  55                 WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
  56                         !IS_COFFEELAKE(dev_priv));
  57                 return PCH_SPT;
  58         case INTEL_PCH_KBP_DEVICE_ID_TYPE:
  59                 DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
  60                 WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
  61                         !IS_COFFEELAKE(dev_priv));
  62                 /* KBP is SPT compatible */
  63                 return PCH_SPT;
  64         case INTEL_PCH_CNP_DEVICE_ID_TYPE:
  65                 DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
  66                 WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
  67                 return PCH_CNP;
  68         case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
  69                 DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
  70                 WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
  71                 return PCH_CNP;
  72         case INTEL_PCH_CMP_DEVICE_ID_TYPE:
  73         case INTEL_PCH_CMP2_DEVICE_ID_TYPE:
  74                 DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
  75                 WARN_ON(!IS_COFFEELAKE(dev_priv));
  76                 /* CometPoint is CNP Compatible */
  77                 return PCH_CNP;
  78         case INTEL_PCH_CMP_V_DEVICE_ID_TYPE:
  79                 DRM_DEBUG_KMS("Found Comet Lake V PCH (CMP-V)\n");
  80                 WARN_ON(!IS_COFFEELAKE(dev_priv));
  81                 /* Comet Lake V PCH is based on KBP, which is SPT compatible */
  82                 return PCH_SPT;
  83         case INTEL_PCH_ICP_DEVICE_ID_TYPE:
  84                 DRM_DEBUG_KMS("Found Ice Lake PCH\n");
  85                 WARN_ON(!IS_ICELAKE(dev_priv));
  86                 return PCH_ICP;
  87         case INTEL_PCH_MCC_DEVICE_ID_TYPE:
  88                 DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
  89                 WARN_ON(!IS_ELKHARTLAKE(dev_priv));
  90                 return PCH_MCC;
  91         case INTEL_PCH_TGP_DEVICE_ID_TYPE:
  92                 DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
  93                 WARN_ON(!IS_TIGERLAKE(dev_priv));
  94                 return PCH_TGP;
  95         case INTEL_PCH_JSP_DEVICE_ID_TYPE:
  96         case INTEL_PCH_JSP2_DEVICE_ID_TYPE:
  97                 DRM_DEBUG_KMS("Found Jasper Lake PCH\n");
  98                 WARN_ON(!IS_ELKHARTLAKE(dev_priv));
  99                 return PCH_JSP;
 100         default:
 101                 return PCH_NONE;
 102         }
 103 }
 104
 105 static bool intel_is_virt_pch(unsigned short id,
 106                               unsigned short svendor, unsigned short sdevice)
 107 {
 108         return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
 109                 id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
 110                 (id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
 111                  svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
 112                  sdevice == PCI_SUBDEVICE_ID_QEMU));
 113 }
 114
 115 static unsigned short
 116 intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
 117 {
 118         unsigned short id = 0;
 119
 120         /*
 121          * In a virtualized passthrough environment we can be in a
 122          * setup where the ISA bridge is not able to be passed through.
 123          * In this case, a south bridge can be emulated and we have to
 124          * make an educated guess as to which PCH is really there.
 125          */
 126
 127         if (IS_TIGERLAKE(dev_priv))
 128                 id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
 129         else if (IS_ELKHARTLAKE(dev_priv))
 130                 id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
 131         else if (IS_ICELAKE(dev_priv))
 132                 id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
 133         else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
 134                 id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
 135         else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
 136                 id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
 137         else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
 138                 id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
 139         else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 140                 id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
 141         else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
 142                 id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
 143         else if (IS_GEN(dev_priv, 5))
 144                 id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
 145
 146         if (id)
 147                 DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
 148         else
 149                 DRM_DEBUG_KMS("Assuming no PCH\n");
 150
 151         return id;
 152 }
 153
 154 void intel_detect_pch(struct drm_i915_private *dev_priv)
 155 {
 156         struct pci_dev *pch = NULL;
 157
 158         /*
 159          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 160          * make graphics device passthrough work easy for VMM, that only
 161          * need to expose ISA bridge to let driver know the real hardware
 162          * underneath. This is a requirement from virtualization team.
 163          *
 164          * In some virtualized environments (e.g. XEN), there is irrelevant
 165          * ISA bridge in the system. To work reliably, we should scan trhough
 166          * all the ISA bridge devices and check for the first match, instead
 167          * of only checking the first one.
 168          */
 169         while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
 170                 unsigned short id;
 171                 enum intel_pch pch_type;
 172
 173                 if (pch->vendor != PCI_VENDOR_ID_INTEL)
 174                         continue;
 175
 176                 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 177
 178                 pch_type = intel_pch_type(dev_priv, id);
 179                 if (pch_type != PCH_NONE) {
 180                         dev_priv->pch_type = pch_type;
 181                         dev_priv->pch_id = id;
 182                         break;
 183                 } else if (intel_is_virt_pch(id, pch->subsystem_vendor,
 184                                              pch->subsystem_device)) {
 185                         id = intel_virt_detect_pch(dev_priv);
 186                         pch_type = intel_pch_type(dev_priv, id);
 187
 188                         /* Sanity check virtual PCH id */
 189                         if (WARN_ON(id && pch_type == PCH_NONE))
 190                                 id = 0;
 191
 192                         dev_priv->pch_type = pch_type;
 193                         dev_priv->pch_id = id;
 194                         break;
 195                 }
 196         }
 197
 198         /*
 199          * Use PCH_NOP (PCH but no South Display) for PCH platforms without
 200          * display.
 201          */
 202         if (pch && !HAS_DISPLAY(dev_priv)) {
 203                 DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
 204                 dev_priv->pch_type = PCH_NOP;
 205                 dev_priv->pch_id = 0;
 206         }
 207
 208         if (!pch)
 209                 DRM_DEBUG_KMS("No PCH found.\n");
 210
 211         pci_dev_put(pch);
 212 }