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25 #include "intel_guc_ads.h"
30 * The Additional Data Struct (ADS) has pointers for different buffers used by
31 * the GuC. One single gem object contains the ADS struct itself (guc_ads), the
32 * scheduling policies (guc_policies), a structure describing a collection of
33 * register sets (guc_mmio_reg_state) and some extra pages for the GuC to save
34 * its internal state for sleep.
37 static void guc_policy_init(struct guc_policy *policy)
39 policy->execution_quantum = POLICY_DEFAULT_EXECUTION_QUANTUM_US;
40 policy->preemption_time = POLICY_DEFAULT_PREEMPTION_TIME_US;
41 policy->fault_time = POLICY_DEFAULT_FAULT_TIME_US;
42 policy->policy_flags = 0;
45 static void guc_policies_init(struct guc_policies *policies)
47 struct guc_policy *policy;
50 policies->dpc_promote_time = POLICY_DEFAULT_DPC_PROMOTE_TIME_US;
51 policies->max_num_work_items = POLICY_MAX_NUM_WI;
53 for (p = 0; p < GUC_CLIENT_PRIORITY_NUM; p++) {
54 for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++) {
55 policy = &policies->policy[p][i];
57 guc_policy_init(policy);
61 policies->is_valid = 1;
64 static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
66 memset(pool, 0, num * sizeof(*pool));
70 * The first 80 dwords of the register state context, containing the
71 * execlists and ppgtt registers.
73 #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
75 /* The ads obj includes the struct itself and buffers passed to GuC */
76 struct __guc_ads_blob {
78 struct guc_policies policies;
79 struct guc_mmio_reg_state reg_state;
80 struct guc_gt_system_info system_info;
81 struct guc_clients_info clients_info;
82 struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
83 u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
86 static int __guc_ads_init(struct intel_guc *guc)
88 struct drm_i915_private *dev_priv = guc_to_i915(guc);
89 struct __guc_ads_blob *blob;
90 const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
94 blob = i915_gem_object_pin_map(guc->ads_vma->obj, I915_MAP_WB);
98 /* GuC scheduling policies */
99 guc_policies_init(&blob->policies);
102 * GuC expects a per-engine-class context image and size
103 * (minus hwsp and ring context). The context image will be
104 * used to reinitialize engines after a reset. It must exist
105 * and be pinned in the GGTT, so that the address won't change after
106 * we have told GuC where to find it. The context size will be used
107 * to validate that the LRC base + size fall within allowed GGTT.
109 for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {
110 if (engine_class == OTHER_CLASS)
113 * TODO: Set context pointer to default state to allow
114 * GuC to re-init guilty contexts after internal reset.
116 blob->ads.golden_context_lrca[engine_class] = 0;
117 blob->ads.eng_state_size[engine_class] =
118 intel_engine_context_size(dev_priv, engine_class) -
123 blob->system_info.slice_enabled = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask);
124 blob->system_info.rcs_enabled = 1;
125 blob->system_info.bcs_enabled = 1;
127 blob->system_info.vdbox_enable_mask = VDBOX_MASK(dev_priv);
128 blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
129 blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
131 base = intel_guc_ggtt_offset(guc, guc->ads_vma);
134 guc_ct_pool_entries_init(blob->ct_pool, ARRAY_SIZE(blob->ct_pool));
136 blob->clients_info.clients_num = 1;
137 blob->clients_info.ct_pool_addr = base + ptr_offset(blob, ct_pool);
138 blob->clients_info.ct_pool_count = ARRAY_SIZE(blob->ct_pool);
141 blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
142 blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
143 blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
144 blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
145 blob->ads.clients_info = base + ptr_offset(blob, clients_info);
147 i915_gem_object_unpin_map(guc->ads_vma->obj);
153 * intel_guc_ads_create() - allocates and initializes GuC ADS.
154 * @guc: intel_guc struct
156 * GuC needs memory block (Additional Data Struct), where it will store
157 * some data. Allocate and initialize such memory block for GuC use.
159 int intel_guc_ads_create(struct intel_guc *guc)
161 const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
162 struct i915_vma *vma;
165 GEM_BUG_ON(guc->ads_vma);
167 vma = intel_guc_allocate_vma(guc, size);
173 ret = __guc_ads_init(guc);
180 i915_vma_unpin_and_release(&guc->ads_vma, 0);
184 void intel_guc_ads_destroy(struct intel_guc *guc)
186 i915_vma_unpin_and_release(&guc->ads_vma, 0);
190 * intel_guc_ads_reset() - prepares GuC Additional Data Struct for reuse
191 * @guc: intel_guc struct
193 * GuC stores some data in ADS, which might be stale after a reset.
194 * Reinitialize whole ADS in case any part of it was corrupted during
197 void intel_guc_ads_reset(struct intel_guc *guc)