2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices[] = {
43 .type = INTEL_DVO_CHIP_TMDS,
46 .dvo_srcdim_reg = DVOC_SRCDIM,
47 .slave_addr = SIL164_ADDR,
48 .dev_ops = &sil164_ops,
51 .type = INTEL_DVO_CHIP_TMDS,
54 .dvo_srcdim_reg = DVOC_SRCDIM,
55 .slave_addr = CH7xxx_ADDR,
56 .dev_ops = &ch7xxx_ops,
59 .type = INTEL_DVO_CHIP_TMDS,
62 .dvo_srcdim_reg = DVOC_SRCDIM,
63 .slave_addr = 0x75, /* For some ch7010 */
64 .dev_ops = &ch7xxx_ops,
67 .type = INTEL_DVO_CHIP_LVDS,
70 .dvo_srcdim_reg = DVOA_SRCDIM,
71 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
75 .type = INTEL_DVO_CHIP_TMDS,
78 .dvo_srcdim_reg = DVOC_SRCDIM,
79 .slave_addr = TFP410_ADDR,
80 .dev_ops = &tfp410_ops,
83 .type = INTEL_DVO_CHIP_LVDS,
86 .dvo_srcdim_reg = DVOC_SRCDIM,
88 .gpio = GMBUS_PIN_DPB,
89 .dev_ops = &ch7017_ops,
92 .type = INTEL_DVO_CHIP_TMDS,
95 .dvo_srcdim_reg = DVOB_SRCDIM,
96 .slave_addr = NS2501_ADDR,
97 .dev_ops = &ns2501_ops,
102 struct intel_encoder base;
104 struct intel_dvo_device dev;
106 struct intel_connector *attached_connector;
108 bool panel_wants_dither;
111 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
113 return container_of(encoder, struct intel_dvo, base);
116 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
118 return enc_to_dvo(intel_attached_encoder(connector));
121 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
123 struct drm_device *dev = connector->base.dev;
124 struct drm_i915_private *dev_priv = to_i915(dev);
125 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
128 tmp = I915_READ(intel_dvo->dev.dvo_reg);
130 if (!(tmp & DVO_ENABLE))
133 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
136 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
139 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
140 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
143 tmp = I915_READ(intel_dvo->dev.dvo_reg);
145 *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
147 return tmp & DVO_ENABLE;
150 static void intel_dvo_get_config(struct intel_encoder *encoder,
151 struct intel_crtc_state *pipe_config)
153 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
154 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
157 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
159 tmp = I915_READ(intel_dvo->dev.dvo_reg);
160 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
161 flags |= DRM_MODE_FLAG_PHSYNC;
163 flags |= DRM_MODE_FLAG_NHSYNC;
164 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
165 flags |= DRM_MODE_FLAG_PVSYNC;
167 flags |= DRM_MODE_FLAG_NVSYNC;
169 pipe_config->base.adjusted_mode.flags |= flags;
171 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
174 static void intel_disable_dvo(struct intel_encoder *encoder,
175 const struct intel_crtc_state *old_crtc_state,
176 const struct drm_connector_state *old_conn_state)
178 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
179 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
180 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
181 u32 temp = I915_READ(dvo_reg);
183 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
184 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
188 static void intel_enable_dvo(struct intel_encoder *encoder,
189 const struct intel_crtc_state *pipe_config,
190 const struct drm_connector_state *conn_state)
192 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
193 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
194 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
195 u32 temp = I915_READ(dvo_reg);
197 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
198 &pipe_config->base.mode,
199 &pipe_config->base.adjusted_mode);
201 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
204 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
207 static enum drm_mode_status
208 intel_dvo_mode_valid(struct drm_connector *connector,
209 struct drm_display_mode *mode)
211 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
212 const struct drm_display_mode *fixed_mode =
213 to_intel_connector(connector)->panel.fixed_mode;
214 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
215 int target_clock = mode->clock;
217 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
218 return MODE_NO_DBLESCAN;
220 /* XXX: Validate clock range */
223 if (mode->hdisplay > fixed_mode->hdisplay)
225 if (mode->vdisplay > fixed_mode->vdisplay)
228 target_clock = fixed_mode->clock;
231 if (target_clock > max_dotclk)
232 return MODE_CLOCK_HIGH;
234 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
237 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
238 struct intel_crtc_state *pipe_config,
239 struct drm_connector_state *conn_state)
241 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
242 const struct drm_display_mode *fixed_mode =
243 intel_dvo->attached_connector->panel.fixed_mode;
244 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
247 * If we have timings from the BIOS for the panel, put them in
248 * to the adjusted mode. The CRTC will be set up for this mode,
249 * with the panel scaling set up to source from the H/VDisplay
250 * of the original mode.
253 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
255 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
258 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
262 static void intel_dvo_pre_enable(struct intel_encoder *encoder,
263 const struct intel_crtc_state *pipe_config,
264 const struct drm_connector_state *conn_state)
266 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
267 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
268 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
269 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
270 int pipe = crtc->pipe;
272 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
273 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
275 /* Save the data order, since I don't know what it should be set to. */
276 dvo_val = I915_READ(dvo_reg) &
277 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
278 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
279 DVO_BLANK_ACTIVE_HIGH;
281 dvo_val |= DVO_PIPE_SEL(pipe);
282 dvo_val |= DVO_PIPE_STALL;
283 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
284 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
285 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
286 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
288 /*I915_WRITE(DVOB_SRCDIM,
289 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
290 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
291 I915_WRITE(dvo_srcdim_reg,
292 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
293 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
294 /*I915_WRITE(DVOB, dvo_val);*/
295 I915_WRITE(dvo_reg, dvo_val);
298 static enum drm_connector_status
299 intel_dvo_detect(struct drm_connector *connector, bool force)
301 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
302 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
303 connector->base.id, connector->name);
304 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
307 static int intel_dvo_get_modes(struct drm_connector *connector)
309 struct drm_i915_private *dev_priv = to_i915(connector->dev);
310 const struct drm_display_mode *fixed_mode =
311 to_intel_connector(connector)->panel.fixed_mode;
314 * We should probably have an i2c driver get_modes function for those
315 * devices which will have a fixed set of modes determined by the chip
316 * (TV-out, for example), but for now with just TMDS and LVDS,
317 * that's not the case.
319 intel_ddc_get_modes(connector,
320 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
321 if (!list_empty(&connector->probed_modes))
325 struct drm_display_mode *mode;
326 mode = drm_mode_duplicate(connector->dev, fixed_mode);
328 drm_mode_probed_add(connector, mode);
336 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
337 .detect = intel_dvo_detect,
338 .late_register = intel_connector_register,
339 .early_unregister = intel_connector_unregister,
340 .destroy = intel_connector_destroy,
341 .fill_modes = drm_helper_probe_single_connector_modes,
342 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
343 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
346 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
347 .mode_valid = intel_dvo_mode_valid,
348 .get_modes = intel_dvo_get_modes,
351 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
353 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
355 if (intel_dvo->dev.dev_ops->destroy)
356 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
358 intel_encoder_destroy(encoder);
361 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
362 .destroy = intel_dvo_enc_destroy,
366 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
368 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
369 * chip being on DVOB/C and having multiple pipes.
371 static struct drm_display_mode *
372 intel_dvo_get_current_mode(struct intel_encoder *encoder)
374 struct drm_display_mode *mode;
376 mode = intel_encoder_current_mode(encoder);
378 DRM_DEBUG_KMS("using current (BIOS) mode: ");
379 drm_mode_debug_printmodeline(mode);
380 mode->type |= DRM_MODE_TYPE_PREFERRED;
386 static enum port intel_dvo_port(i915_reg_t dvo_reg)
388 if (i915_mmio_reg_equal(dvo_reg, DVOA))
390 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
396 void intel_dvo_init(struct drm_i915_private *dev_priv)
398 struct intel_encoder *intel_encoder;
399 struct intel_dvo *intel_dvo;
400 struct intel_connector *intel_connector;
402 int encoder_type = DRM_MODE_ENCODER_NONE;
404 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
408 intel_connector = intel_connector_alloc();
409 if (!intel_connector) {
414 intel_dvo->attached_connector = intel_connector;
416 intel_encoder = &intel_dvo->base;
418 intel_encoder->disable = intel_disable_dvo;
419 intel_encoder->enable = intel_enable_dvo;
420 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
421 intel_encoder->get_config = intel_dvo_get_config;
422 intel_encoder->compute_config = intel_dvo_compute_config;
423 intel_encoder->pre_enable = intel_dvo_pre_enable;
424 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
426 /* Now, try to find a controller */
427 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
428 struct drm_connector *connector = &intel_connector->base;
429 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
430 struct i2c_adapter *i2c;
434 u32 dpll[I915_MAX_PIPES];
438 * Allow the I2C driver info to specify the GPIO to be used in
439 * special cases, but otherwise default to what's defined
442 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
444 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
445 gpio = GMBUS_PIN_SSC;
447 gpio = GMBUS_PIN_DPB;
450 * Set up the I2C bus necessary for the chip we're probing.
451 * It appears that everything is on GPIOE except for panels
452 * on i830 laptops, which are on GPIOB (DVOA).
454 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
456 intel_dvo->dev = *dvo;
459 * GMBUS NAK handling seems to be unstable, hence let the
460 * transmitter detection run in bit banging mode for now.
462 intel_gmbus_force_bit(i2c, true);
465 * ns2501 requires the DVO 2x clock before it will
466 * respond to i2c accesses, so make sure we have
467 * have the clock enabled before we attempt to
468 * initialize the device.
470 for_each_pipe(dev_priv, pipe) {
471 dpll[pipe] = I915_READ(DPLL(pipe));
472 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
475 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
477 /* restore the DVO 2x clock state to original */
478 for_each_pipe(dev_priv, pipe) {
479 I915_WRITE(DPLL(pipe), dpll[pipe]);
482 intel_gmbus_force_bit(i2c, false);
487 port = intel_dvo_port(dvo->dvo_reg);
488 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
489 &intel_dvo_enc_funcs, encoder_type,
490 "DVO %c", port_name(port));
492 intel_encoder->type = INTEL_OUTPUT_DVO;
493 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
494 intel_encoder->port = port;
495 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
498 case INTEL_DVO_CHIP_TMDS:
499 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
500 (1 << INTEL_OUTPUT_DVO);
501 drm_connector_init(&dev_priv->drm, connector,
502 &intel_dvo_connector_funcs,
503 DRM_MODE_CONNECTOR_DVII);
504 encoder_type = DRM_MODE_ENCODER_TMDS;
506 case INTEL_DVO_CHIP_LVDS:
507 intel_encoder->cloneable = 0;
508 drm_connector_init(&dev_priv->drm, connector,
509 &intel_dvo_connector_funcs,
510 DRM_MODE_CONNECTOR_LVDS);
511 encoder_type = DRM_MODE_ENCODER_LVDS;
515 drm_connector_helper_add(connector,
516 &intel_dvo_connector_helper_funcs);
517 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
518 connector->interlace_allowed = false;
519 connector->doublescan_allowed = false;
521 intel_connector_attach_encoder(intel_connector, intel_encoder);
522 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
524 * For our LVDS chipsets, we should hopefully be able
525 * to dig the fixed panel mode out of the BIOS data.
526 * However, it's in a different format from the BIOS
527 * data on chipsets with integrated LVDS (stored in AIM
528 * headers, likely), so for now, just get the current
529 * mode being output through DVO.
531 intel_panel_init(&intel_connector->panel,
532 intel_dvo_get_current_mode(intel_encoder),
534 intel_dvo->panel_wants_dither = true;
541 kfree(intel_connector);