drivers/gpu/drm/i915/intel_dvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  */
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include <drm/drm_atomic_helper.h>
  30 #include <drm/drm_crtc.h>
  31 #include "intel_drv.h"
  32 #include <drm/i915_drm.h>
  33 #include "i915_drv.h"
  34 #include "dvo.h"
  35
  36 #define SIL164_ADDR     0x38
  37 #define CH7xxx_ADDR     0x76
  38 #define TFP410_ADDR     0x38
  39 #define NS2501_ADDR     0x38
  40
  41 static const struct intel_dvo_device intel_dvo_devices[] = {
  42         {
  43                 .type = INTEL_DVO_CHIP_TMDS,
  44                 .name = "sil164",
  45                 .dvo_reg = DVOC,
  46                 .dvo_srcdim_reg = DVOC_SRCDIM,
  47                 .slave_addr = SIL164_ADDR,
  48                 .dev_ops = &sil164_ops,
  49         },
  50         {
  51                 .type = INTEL_DVO_CHIP_TMDS,
  52                 .name = "ch7xxx",
  53                 .dvo_reg = DVOC,
  54                 .dvo_srcdim_reg = DVOC_SRCDIM,
  55                 .slave_addr = CH7xxx_ADDR,
  56                 .dev_ops = &ch7xxx_ops,
  57         },
  58         {
  59                 .type = INTEL_DVO_CHIP_TMDS,
  60                 .name = "ch7xxx",
  61                 .dvo_reg = DVOC,
  62                 .dvo_srcdim_reg = DVOC_SRCDIM,
  63                 .slave_addr = 0x75, /* For some ch7010 */
  64                 .dev_ops = &ch7xxx_ops,
  65         },
  66         {
  67                 .type = INTEL_DVO_CHIP_LVDS,
  68                 .name = "ivch",
  69                 .dvo_reg = DVOA,
  70                 .dvo_srcdim_reg = DVOA_SRCDIM,
  71                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  72                 .dev_ops = &ivch_ops,
  73         },
  74         {
  75                 .type = INTEL_DVO_CHIP_TMDS,
  76                 .name = "tfp410",
  77                 .dvo_reg = DVOC,
  78                 .dvo_srcdim_reg = DVOC_SRCDIM,
  79                 .slave_addr = TFP410_ADDR,
  80                 .dev_ops = &tfp410_ops,
  81         },
  82         {
  83                 .type = INTEL_DVO_CHIP_LVDS,
  84                 .name = "ch7017",
  85                 .dvo_reg = DVOC,
  86                 .dvo_srcdim_reg = DVOC_SRCDIM,
  87                 .slave_addr = 0x75,
  88                 .gpio = GMBUS_PIN_DPB,
  89                 .dev_ops = &ch7017_ops,
  90         },
  91         {
  92                 .type = INTEL_DVO_CHIP_TMDS,
  93                 .name = "ns2501",
  94                 .dvo_reg = DVOB,
  95                 .dvo_srcdim_reg = DVOB_SRCDIM,
  96                 .slave_addr = NS2501_ADDR,
  97                 .dev_ops = &ns2501_ops,
  98        }
  99 };
 100
 101 struct intel_dvo {
 102         struct intel_encoder base;
 103
 104         struct intel_dvo_device dev;
 105
 106         struct intel_connector *attached_connector;
 107
 108         bool panel_wants_dither;
 109 };
 110
 111 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 112 {
 113         return container_of(encoder, struct intel_dvo, base);
 114 }
 115
 116 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
 117 {
 118         return enc_to_dvo(intel_attached_encoder(connector));
 119 }
 120
 121 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 122 {
 123         struct drm_device *dev = connector->base.dev;
 124         struct drm_i915_private *dev_priv = to_i915(dev);
 125         struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
 126         u32 tmp;
 127
 128         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 129
 130         if (!(tmp & DVO_ENABLE))
 131                 return false;
 132
 133         return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 134 }
 135
 136 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 137                                    enum pipe *pipe)
 138 {
 139         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 140         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 141         u32 tmp;
 142
 143         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 144
 145         *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
 146
 147         return tmp & DVO_ENABLE;
 148 }
 149
 150 static void intel_dvo_get_config(struct intel_encoder *encoder,
 151                                  struct intel_crtc_state *pipe_config)
 152 {
 153         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 154         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 155         u32 tmp, flags = 0;
 156
 157         pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
 158
 159         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 160         if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 161                 flags |= DRM_MODE_FLAG_PHSYNC;
 162         else
 163                 flags |= DRM_MODE_FLAG_NHSYNC;
 164         if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 165                 flags |= DRM_MODE_FLAG_PVSYNC;
 166         else
 167                 flags |= DRM_MODE_FLAG_NVSYNC;
 168
 169         pipe_config->base.adjusted_mode.flags |= flags;
 170
 171         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 172 }
 173
 174 static void intel_disable_dvo(struct intel_encoder *encoder,
 175                               const struct intel_crtc_state *old_crtc_state,
 176                               const struct drm_connector_state *old_conn_state)
 177 {
 178         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 179         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 180         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 181         u32 temp = I915_READ(dvo_reg);
 182
 183         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 184         I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 185         I915_READ(dvo_reg);
 186 }
 187
 188 static void intel_enable_dvo(struct intel_encoder *encoder,
 189                              const struct intel_crtc_state *pipe_config,
 190                              const struct drm_connector_state *conn_state)
 191 {
 192         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 193         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 194         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 195         u32 temp = I915_READ(dvo_reg);
 196
 197         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 198                                          &pipe_config->base.mode,
 199                                          &pipe_config->base.adjusted_mode);
 200
 201         I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 202         I915_READ(dvo_reg);
 203
 204         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 205 }
 206
 207 static enum drm_mode_status
 208 intel_dvo_mode_valid(struct drm_connector *connector,
 209                      struct drm_display_mode *mode)
 210 {
 211         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 212         const struct drm_display_mode *fixed_mode =
 213                 to_intel_connector(connector)->panel.fixed_mode;
 214         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 215         int target_clock = mode->clock;
 216
 217         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 218                 return MODE_NO_DBLESCAN;
 219
 220         /* XXX: Validate clock range */
 221
 222         if (fixed_mode) {
 223                 if (mode->hdisplay > fixed_mode->hdisplay)
 224                         return MODE_PANEL;
 225                 if (mode->vdisplay > fixed_mode->vdisplay)
 226                         return MODE_PANEL;
 227
 228                 target_clock = fixed_mode->clock;
 229         }
 230
 231         if (target_clock > max_dotclk)
 232                 return MODE_CLOCK_HIGH;
 233
 234         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 235 }
 236
 237 static int intel_dvo_compute_config(struct intel_encoder *encoder,
 238                                     struct intel_crtc_state *pipe_config,
 239                                     struct drm_connector_state *conn_state)
 240 {
 241         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 242         const struct drm_display_mode *fixed_mode =
 243                 intel_dvo->attached_connector->panel.fixed_mode;
 244         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 245
 246         /*
 247          * If we have timings from the BIOS for the panel, put them in
 248          * to the adjusted mode.  The CRTC will be set up for this mode,
 249          * with the panel scaling set up to source from the H/VDisplay
 250          * of the original mode.
 251          */
 252         if (fixed_mode)
 253                 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 254
 255         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 256                 return -EINVAL;
 257
 258         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 259
 260         return 0;
 261 }
 262
 263 static void intel_dvo_pre_enable(struct intel_encoder *encoder,
 264                                  const struct intel_crtc_state *pipe_config,
 265                                  const struct drm_connector_state *conn_state)
 266 {
 267         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 268         struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
 269         const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 270         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 271         int pipe = crtc->pipe;
 272         u32 dvo_val;
 273         i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 274         i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 275
 276         /* Save the data order, since I don't know what it should be set to. */
 277         dvo_val = I915_READ(dvo_reg) &
 278                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 279         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 280                    DVO_BLANK_ACTIVE_HIGH;
 281
 282         dvo_val |= DVO_PIPE_SEL(pipe);
 283         dvo_val |= DVO_PIPE_STALL;
 284         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 285                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 286         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 287                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 288
 289         /*I915_WRITE(DVOB_SRCDIM,
 290           (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 291           (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 292         I915_WRITE(dvo_srcdim_reg,
 293                    (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 294                    (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 295         /*I915_WRITE(DVOB, dvo_val);*/
 296         I915_WRITE(dvo_reg, dvo_val);
 297 }
 298
 299 static enum drm_connector_status
 300 intel_dvo_detect(struct drm_connector *connector, bool force)
 301 {
 302         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 303         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 304                       connector->base.id, connector->name);
 305         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 306 }
 307
 308 static int intel_dvo_get_modes(struct drm_connector *connector)
 309 {
 310         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 311         const struct drm_display_mode *fixed_mode =
 312                 to_intel_connector(connector)->panel.fixed_mode;
 313
 314         /*
 315          * We should probably have an i2c driver get_modes function for those
 316          * devices which will have a fixed set of modes determined by the chip
 317          * (TV-out, for example), but for now with just TMDS and LVDS,
 318          * that's not the case.
 319          */
 320         intel_ddc_get_modes(connector,
 321                             intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 322         if (!list_empty(&connector->probed_modes))
 323                 return 1;
 324
 325         if (fixed_mode) {
 326                 struct drm_display_mode *mode;
 327                 mode = drm_mode_duplicate(connector->dev, fixed_mode);
 328                 if (mode) {
 329                         drm_mode_probed_add(connector, mode);
 330                         return 1;
 331                 }
 332         }
 333
 334         return 0;
 335 }
 336
 337 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 338         .detect = intel_dvo_detect,
 339         .late_register = intel_connector_register,
 340         .early_unregister = intel_connector_unregister,
 341         .destroy = intel_connector_destroy,
 342         .fill_modes = drm_helper_probe_single_connector_modes,
 343         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 344         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 345 };
 346
 347 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 348         .mode_valid = intel_dvo_mode_valid,
 349         .get_modes = intel_dvo_get_modes,
 350 };
 351
 352 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 353 {
 354         struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 355
 356         if (intel_dvo->dev.dev_ops->destroy)
 357                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 358
 359         intel_encoder_destroy(encoder);
 360 }
 361
 362 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 363         .destroy = intel_dvo_enc_destroy,
 364 };
 365
 366 /*
 367  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 368  *
 369  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 370  * chip being on DVOB/C and having multiple pipes.
 371  */
 372 static struct drm_display_mode *
 373 intel_dvo_get_current_mode(struct intel_encoder *encoder)
 374 {
 375         struct drm_display_mode *mode;
 376
 377         mode = intel_encoder_current_mode(encoder);
 378         if (mode) {
 379                 DRM_DEBUG_KMS("using current (BIOS) mode: ");
 380                 drm_mode_debug_printmodeline(mode);
 381                 mode->type |= DRM_MODE_TYPE_PREFERRED;
 382         }
 383
 384         return mode;
 385 }
 386
 387 static enum port intel_dvo_port(i915_reg_t dvo_reg)
 388 {
 389         if (i915_mmio_reg_equal(dvo_reg, DVOA))
 390                 return PORT_A;
 391         else if (i915_mmio_reg_equal(dvo_reg, DVOB))
 392                 return PORT_B;
 393         else
 394                 return PORT_C;
 395 }
 396
 397 void intel_dvo_init(struct drm_i915_private *dev_priv)
 398 {
 399         struct intel_encoder *intel_encoder;
 400         struct intel_dvo *intel_dvo;
 401         struct intel_connector *intel_connector;
 402         int i;
 403         int encoder_type = DRM_MODE_ENCODER_NONE;
 404
 405         intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 406         if (!intel_dvo)
 407                 return;
 408
 409         intel_connector = intel_connector_alloc();
 410         if (!intel_connector) {
 411                 kfree(intel_dvo);
 412                 return;
 413         }
 414
 415         intel_dvo->attached_connector = intel_connector;
 416
 417         intel_encoder = &intel_dvo->base;
 418
 419         intel_encoder->disable = intel_disable_dvo;
 420         intel_encoder->enable = intel_enable_dvo;
 421         intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 422         intel_encoder->get_config = intel_dvo_get_config;
 423         intel_encoder->compute_config = intel_dvo_compute_config;
 424         intel_encoder->pre_enable = intel_dvo_pre_enable;
 425         intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 426
 427         /* Now, try to find a controller */
 428         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 429                 struct drm_connector *connector = &intel_connector->base;
 430                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 431                 struct i2c_adapter *i2c;
 432                 int gpio;
 433                 bool dvoinit;
 434                 enum pipe pipe;
 435                 u32 dpll[I915_MAX_PIPES];
 436                 enum port port;
 437
 438                 /*
 439                  * Allow the I2C driver info to specify the GPIO to be used in
 440                  * special cases, but otherwise default to what's defined
 441                  * in the spec.
 442                  */
 443                 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 444                         gpio = dvo->gpio;
 445                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 446                         gpio = GMBUS_PIN_SSC;
 447                 else
 448                         gpio = GMBUS_PIN_DPB;
 449
 450                 /*
 451                  * Set up the I2C bus necessary for the chip we're probing.
 452                  * It appears that everything is on GPIOE except for panels
 453                  * on i830 laptops, which are on GPIOB (DVOA).
 454                  */
 455                 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 456
 457                 intel_dvo->dev = *dvo;
 458
 459                 /*
 460                  * GMBUS NAK handling seems to be unstable, hence let the
 461                  * transmitter detection run in bit banging mode for now.
 462                  */
 463                 intel_gmbus_force_bit(i2c, true);
 464
 465                 /*
 466                  * ns2501 requires the DVO 2x clock before it will
 467                  * respond to i2c accesses, so make sure we have
 468                  * have the clock enabled before we attempt to
 469                  * initialize the device.
 470                  */
 471                 for_each_pipe(dev_priv, pipe) {
 472                         dpll[pipe] = I915_READ(DPLL(pipe));
 473                         I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
 474                 }
 475
 476                 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 477
 478                 /* restore the DVO 2x clock state to original */
 479                 for_each_pipe(dev_priv, pipe) {
 480                         I915_WRITE(DPLL(pipe), dpll[pipe]);
 481                 }
 482
 483                 intel_gmbus_force_bit(i2c, false);
 484
 485                 if (!dvoinit)
 486                         continue;
 487
 488                 port = intel_dvo_port(dvo->dvo_reg);
 489                 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
 490                                  &intel_dvo_enc_funcs, encoder_type,
 491                                  "DVO %c", port_name(port));
 492
 493                 intel_encoder->type = INTEL_OUTPUT_DVO;
 494                 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 495                 intel_encoder->port = port;
 496                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 497
 498                 switch (dvo->type) {
 499                 case INTEL_DVO_CHIP_TMDS:
 500                         intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 501                                 (1 << INTEL_OUTPUT_DVO);
 502                         drm_connector_init(&dev_priv->drm, connector,
 503                                            &intel_dvo_connector_funcs,
 504                                            DRM_MODE_CONNECTOR_DVII);
 505                         encoder_type = DRM_MODE_ENCODER_TMDS;
 506                         break;
 507                 case INTEL_DVO_CHIP_LVDS:
 508                         intel_encoder->cloneable = 0;
 509                         drm_connector_init(&dev_priv->drm, connector,
 510                                            &intel_dvo_connector_funcs,
 511                                            DRM_MODE_CONNECTOR_LVDS);
 512                         encoder_type = DRM_MODE_ENCODER_LVDS;
 513                         break;
 514                 }
 515
 516                 drm_connector_helper_add(connector,
 517                                          &intel_dvo_connector_helper_funcs);
 518                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 519                 connector->interlace_allowed = false;
 520                 connector->doublescan_allowed = false;
 521
 522                 intel_connector_attach_encoder(intel_connector, intel_encoder);
 523                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 524                         /*
 525                          * For our LVDS chipsets, we should hopefully be able
 526                          * to dig the fixed panel mode out of the BIOS data.
 527                          * However, it's in a different format from the BIOS
 528                          * data on chipsets with integrated LVDS (stored in AIM
 529                          * headers, likely), so for now, just get the current
 530                          * mode being output through DVO.
 531                          */
 532                         intel_panel_init(&intel_connector->panel,
 533                                          intel_dvo_get_current_mode(intel_encoder),
 534                                          NULL);
 535                         intel_dvo->panel_wants_dither = true;
 536                 }
 537
 538                 return;
 539         }
 540
 541         kfree(intel_dvo);
 542         kfree(intel_connector);
 543 }