drivers/gpu/drm/i915/intel_atomic_plane.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * DOC: atomic plane helpers
  26  *
  27  * The functions here are used by the atomic plane helper functions to
  28  * implement legacy plane updates (i.e., drm_plane->update_plane() and
  29  * drm_plane->disable_plane()).  This allows plane updates to use the
  30  * atomic state infrastructure and perform plane updates as separate
  31  * prepare/check/commit/cleanup steps.
  32  */
  33
  34 #include <drm/drm_atomic_helper.h>
  35 #include <drm/drm_fourcc.h>
  36 #include <drm/drm_plane_helper.h>
  37
  38 #include "intel_drv.h"
  39
  40 struct intel_plane *intel_plane_alloc(void)
  41 {
  42         struct intel_plane_state *plane_state;
  43         struct intel_plane *plane;
  44
  45         plane = kzalloc(sizeof(*plane), GFP_KERNEL);
  46         if (!plane)
  47                 return ERR_PTR(-ENOMEM);
  48
  49         plane_state = kzalloc(sizeof(*plane_state), GFP_KERNEL);
  50         if (!plane_state) {
  51                 kfree(plane);
  52                 return ERR_PTR(-ENOMEM);
  53         }
  54
  55         __drm_atomic_helper_plane_reset(&plane->base, &plane_state->base);
  56         plane_state->scaler_id = -1;
  57
  58         return plane;
  59 }
  60
  61 void intel_plane_free(struct intel_plane *plane)
  62 {
  63         intel_plane_destroy_state(&plane->base, plane->base.state);
  64         kfree(plane);
  65 }
  66
  67 /**
  68  * intel_plane_duplicate_state - duplicate plane state
  69  * @plane: drm plane
  70  *
  71  * Allocates and returns a copy of the plane state (both common and
  72  * Intel-specific) for the specified plane.
  73  *
  74  * Returns: The newly allocated plane state, or NULL on failure.
  75  */
  76 struct drm_plane_state *
  77 intel_plane_duplicate_state(struct drm_plane *plane)
  78 {
  79         struct drm_plane_state *state;
  80         struct intel_plane_state *intel_state;
  81
  82         intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
  83
  84         if (!intel_state)
  85                 return NULL;
  86
  87         state = &intel_state->base;
  88
  89         __drm_atomic_helper_plane_duplicate_state(plane, state);
  90
  91         intel_state->vma = NULL;
  92         intel_state->flags = 0;
  93
  94         return state;
  95 }
  96
  97 /**
  98  * intel_plane_destroy_state - destroy plane state
  99  * @plane: drm plane
 100  * @state: state object to destroy
 101  *
 102  * Destroys the plane state (both common and Intel-specific) for the
 103  * specified plane.
 104  */
 105 void
 106 intel_plane_destroy_state(struct drm_plane *plane,
 107                           struct drm_plane_state *state)
 108 {
 109         WARN_ON(to_intel_plane_state(state)->vma);
 110
 111         drm_atomic_helper_plane_destroy_state(plane, state);
 112 }
 113
 114 int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state,
 115                                         struct intel_crtc_state *new_crtc_state,
 116                                         const struct intel_plane_state *old_plane_state,
 117                                         struct intel_plane_state *new_plane_state)
 118 {
 119         struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
 120         int ret;
 121
 122         new_crtc_state->active_planes &= ~BIT(plane->id);
 123         new_crtc_state->nv12_planes &= ~BIT(plane->id);
 124         new_plane_state->base.visible = false;
 125
 126         if (!new_plane_state->base.crtc && !old_plane_state->base.crtc)
 127                 return 0;
 128
 129         ret = plane->check_plane(new_crtc_state, new_plane_state);
 130         if (ret)
 131                 return ret;
 132
 133         /* FIXME pre-g4x don't work like this */
 134         if (new_plane_state->base.visible)
 135                 new_crtc_state->active_planes |= BIT(plane->id);
 136
 137         if (new_plane_state->base.visible &&
 138             new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
 139                 new_crtc_state->nv12_planes |= BIT(plane->id);
 140
 141         if (new_plane_state->base.visible || old_plane_state->base.visible)
 142                 new_crtc_state->update_planes |= BIT(plane->id);
 143
 144         return intel_plane_atomic_calc_changes(old_crtc_state,
 145                                                &new_crtc_state->base,
 146                                                old_plane_state,
 147                                                &new_plane_state->base);
 148 }
 149
 150 static int intel_plane_atomic_check(struct drm_plane *plane,
 151                                     struct drm_plane_state *new_plane_state)
 152 {
 153         struct drm_atomic_state *state = new_plane_state->state;
 154         const struct drm_plane_state *old_plane_state =
 155                 drm_atomic_get_old_plane_state(state, plane);
 156         struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
 157         const struct drm_crtc_state *old_crtc_state;
 158         struct drm_crtc_state *new_crtc_state;
 159
 160         new_plane_state->visible = false;
 161         if (!crtc)
 162                 return 0;
 163
 164         old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
 165         new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
 166
 167         return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state),
 168                                                    to_intel_crtc_state(new_crtc_state),
 169                                                    to_intel_plane_state(old_plane_state),
 170                                                    to_intel_plane_state(new_plane_state));
 171 }
 172
 173 static struct intel_plane *
 174 skl_next_plane_to_commit(struct intel_atomic_state *state,
 175                          struct intel_crtc *crtc,
 176                          struct skl_ddb_entry entries_y[I915_MAX_PLANES],
 177                          struct skl_ddb_entry entries_uv[I915_MAX_PLANES],
 178                          unsigned int *update_mask)
 179 {
 180         struct intel_crtc_state *crtc_state =
 181                 intel_atomic_get_new_crtc_state(state, crtc);
 182         struct intel_plane_state *plane_state;
 183         struct intel_plane *plane;
 184         int i;
 185
 186         if (*update_mask == 0)
 187                 return NULL;
 188
 189         for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
 190                 enum plane_id plane_id = plane->id;
 191
 192                 if (crtc->pipe != plane->pipe ||
 193                     !(*update_mask & BIT(plane_id)))
 194                         continue;
 195
 196                 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id],
 197                                                 entries_y,
 198                                                 I915_MAX_PLANES, plane_id) ||
 199                     skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id],
 200                                                 entries_uv,
 201                                                 I915_MAX_PLANES, plane_id))
 202                         continue;
 203
 204                 *update_mask &= ~BIT(plane_id);
 205                 entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id];
 206                 entries_uv[plane_id] = crtc_state->wm.skl.plane_ddb_uv[plane_id];
 207
 208                 return plane;
 209         }
 210
 211         /* should never happen */
 212         WARN_ON(1);
 213
 214         return NULL;
 215 }
 216
 217 void skl_update_planes_on_crtc(struct intel_atomic_state *state,
 218                                struct intel_crtc *crtc)
 219 {
 220         struct intel_crtc_state *old_crtc_state =
 221                 intel_atomic_get_old_crtc_state(state, crtc);
 222         struct intel_crtc_state *new_crtc_state =
 223                 intel_atomic_get_new_crtc_state(state, crtc);
 224         struct skl_ddb_entry entries_y[I915_MAX_PLANES];
 225         struct skl_ddb_entry entries_uv[I915_MAX_PLANES];
 226         u32 update_mask = new_crtc_state->update_planes;
 227         struct intel_plane *plane;
 228
 229         memcpy(entries_y, old_crtc_state->wm.skl.plane_ddb_y,
 230                sizeof(old_crtc_state->wm.skl.plane_ddb_y));
 231         memcpy(entries_uv, old_crtc_state->wm.skl.plane_ddb_uv,
 232                sizeof(old_crtc_state->wm.skl.plane_ddb_uv));
 233
 234         while ((plane = skl_next_plane_to_commit(state, crtc,
 235                                                  entries_y, entries_uv,
 236                                                  &update_mask))) {
 237                 struct intel_plane_state *new_plane_state =
 238                         intel_atomic_get_new_plane_state(state, plane);
 239
 240                 if (new_plane_state->base.visible) {
 241                         trace_intel_update_plane(&plane->base, crtc);
 242                         plane->update_plane(plane, new_crtc_state, new_plane_state);
 243                 } else if (new_plane_state->slave) {
 244                         struct intel_plane *master =
 245                                 new_plane_state->linked_plane;
 246
 247                         /*
 248                          * We update the slave plane from this function because
 249                          * programming it from the master plane's update_plane
 250                          * callback runs into issues when the Y plane is
 251                          * reassigned, disabled or used by a different plane.
 252                          *
 253                          * The slave plane is updated with the master plane's
 254                          * plane_state.
 255                          */
 256                         new_plane_state =
 257                                 intel_atomic_get_new_plane_state(state, master);
 258
 259                         trace_intel_update_plane(&plane->base, crtc);
 260                         plane->update_slave(plane, new_crtc_state, new_plane_state);
 261                 } else {
 262                         trace_intel_disable_plane(&plane->base, crtc);
 263                         plane->disable_plane(plane, new_crtc_state);
 264                 }
 265         }
 266 }
 267
 268 void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
 269                                 struct intel_crtc *crtc)
 270 {
 271         struct intel_crtc_state *new_crtc_state =
 272                 intel_atomic_get_new_crtc_state(state, crtc);
 273         u32 update_mask = new_crtc_state->update_planes;
 274         struct intel_plane_state *new_plane_state;
 275         struct intel_plane *plane;
 276         int i;
 277
 278         for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {
 279                 if (crtc->pipe != plane->pipe ||
 280                     !(update_mask & BIT(plane->id)))
 281                         continue;
 282
 283                 if (new_plane_state->base.visible) {
 284                         trace_intel_update_plane(&plane->base, crtc);
 285                         plane->update_plane(plane, new_crtc_state, new_plane_state);
 286                 } else {
 287                         trace_intel_disable_plane(&plane->base, crtc);
 288                         plane->disable_plane(plane, new_crtc_state);
 289                 }
 290         }
 291 }
 292
 293 const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
 294         .prepare_fb = intel_prepare_plane_fb,
 295         .cleanup_fb = intel_cleanup_plane_fb,
 296         .atomic_check = intel_plane_atomic_check,
 297 };
 298
 299 /**
 300  * intel_plane_atomic_get_property - fetch plane property value
 301  * @plane: plane to fetch property for
 302  * @state: state containing the property value
 303  * @property: property to look up
 304  * @val: pointer to write property value into
 305  *
 306  * The DRM core does not store shadow copies of properties for
 307  * atomic-capable drivers.  This entrypoint is used to fetch
 308  * the current value of a driver-specific plane property.
 309  */
 310 int
 311 intel_plane_atomic_get_property(struct drm_plane *plane,
 312                                 const struct drm_plane_state *state,
 313                                 struct drm_property *property,
 314                                 u64 *val)
 315 {
 316         DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
 317                       property->base.id, property->name);
 318         return -EINVAL;
 319 }
 320
 321 /**
 322  * intel_plane_atomic_set_property - set plane property value
 323  * @plane: plane to set property for
 324  * @state: state to update property value in
 325  * @property: property to set
 326  * @val: value to set property to
 327  *
 328  * Writes the specified property value for a plane into the provided atomic
 329  * state object.
 330  *
 331  * Returns 0 on success, -EINVAL on unrecognized properties
 332  */
 333 int
 334 intel_plane_atomic_set_property(struct drm_plane *plane,
 335                                 struct drm_plane_state *state,
 336                                 struct drm_property *property,
 337                                 u64 val)
 338 {
 339         DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
 340                       property->base.id, property->name);
 341         return -EINVAL;
 342 }