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25 * DOC: atomic plane helpers
27 * The functions here are used by the atomic plane helper functions to
28 * implement legacy plane updates (i.e., drm_plane->update_plane() and
29 * drm_plane->disable_plane()). This allows plane updates to use the
30 * atomic state infrastructure and perform plane updates as separate
31 * prepare/check/commit/cleanup steps.
34 #include <drm/drm_atomic_helper.h>
35 #include <drm/drm_fourcc.h>
36 #include <drm/drm_plane_helper.h>
38 #include "intel_drv.h"
40 struct intel_plane *intel_plane_alloc(void)
42 struct intel_plane_state *plane_state;
43 struct intel_plane *plane;
45 plane = kzalloc(sizeof(*plane), GFP_KERNEL);
47 return ERR_PTR(-ENOMEM);
49 plane_state = kzalloc(sizeof(*plane_state), GFP_KERNEL);
52 return ERR_PTR(-ENOMEM);
55 __drm_atomic_helper_plane_reset(&plane->base, &plane_state->base);
56 plane_state->scaler_id = -1;
61 void intel_plane_free(struct intel_plane *plane)
63 intel_plane_destroy_state(&plane->base, plane->base.state);
68 * intel_plane_duplicate_state - duplicate plane state
71 * Allocates and returns a copy of the plane state (both common and
72 * Intel-specific) for the specified plane.
74 * Returns: The newly allocated plane state, or NULL on failure.
76 struct drm_plane_state *
77 intel_plane_duplicate_state(struct drm_plane *plane)
79 struct drm_plane_state *state;
80 struct intel_plane_state *intel_state;
82 intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
87 state = &intel_state->base;
89 __drm_atomic_helper_plane_duplicate_state(plane, state);
91 intel_state->vma = NULL;
92 intel_state->flags = 0;
98 * intel_plane_destroy_state - destroy plane state
100 * @state: state object to destroy
102 * Destroys the plane state (both common and Intel-specific) for the
106 intel_plane_destroy_state(struct drm_plane *plane,
107 struct drm_plane_state *state)
109 WARN_ON(to_intel_plane_state(state)->vma);
111 drm_atomic_helper_plane_destroy_state(plane, state);
114 int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state,
115 struct intel_crtc_state *new_crtc_state,
116 const struct intel_plane_state *old_plane_state,
117 struct intel_plane_state *new_plane_state)
119 struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
122 new_crtc_state->active_planes &= ~BIT(plane->id);
123 new_crtc_state->nv12_planes &= ~BIT(plane->id);
124 new_plane_state->base.visible = false;
126 if (!new_plane_state->base.crtc && !old_plane_state->base.crtc)
129 ret = plane->check_plane(new_crtc_state, new_plane_state);
133 /* FIXME pre-g4x don't work like this */
134 if (new_plane_state->base.visible)
135 new_crtc_state->active_planes |= BIT(plane->id);
137 if (new_plane_state->base.visible &&
138 new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
139 new_crtc_state->nv12_planes |= BIT(plane->id);
141 if (new_plane_state->base.visible || old_plane_state->base.visible)
142 new_crtc_state->update_planes |= BIT(plane->id);
144 return intel_plane_atomic_calc_changes(old_crtc_state,
145 &new_crtc_state->base,
147 &new_plane_state->base);
150 static int intel_plane_atomic_check(struct drm_plane *plane,
151 struct drm_plane_state *new_plane_state)
153 struct drm_atomic_state *state = new_plane_state->state;
154 const struct drm_plane_state *old_plane_state =
155 drm_atomic_get_old_plane_state(state, plane);
156 struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
157 const struct drm_crtc_state *old_crtc_state;
158 struct drm_crtc_state *new_crtc_state;
160 new_plane_state->visible = false;
164 old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
165 new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
167 return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state),
168 to_intel_crtc_state(new_crtc_state),
169 to_intel_plane_state(old_plane_state),
170 to_intel_plane_state(new_plane_state));
173 static struct intel_plane *
174 skl_next_plane_to_commit(struct intel_atomic_state *state,
175 struct intel_crtc *crtc,
176 struct skl_ddb_entry entries_y[I915_MAX_PLANES],
177 struct skl_ddb_entry entries_uv[I915_MAX_PLANES],
178 unsigned int *update_mask)
180 struct intel_crtc_state *crtc_state =
181 intel_atomic_get_new_crtc_state(state, crtc);
182 struct intel_plane_state *plane_state;
183 struct intel_plane *plane;
186 if (*update_mask == 0)
189 for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
190 enum plane_id plane_id = plane->id;
192 if (crtc->pipe != plane->pipe ||
193 !(*update_mask & BIT(plane_id)))
196 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id],
198 I915_MAX_PLANES, plane_id) ||
199 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id],
201 I915_MAX_PLANES, plane_id))
204 *update_mask &= ~BIT(plane_id);
205 entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id];
206 entries_uv[plane_id] = crtc_state->wm.skl.plane_ddb_uv[plane_id];
211 /* should never happen */
217 void skl_update_planes_on_crtc(struct intel_atomic_state *state,
218 struct intel_crtc *crtc)
220 struct intel_crtc_state *old_crtc_state =
221 intel_atomic_get_old_crtc_state(state, crtc);
222 struct intel_crtc_state *new_crtc_state =
223 intel_atomic_get_new_crtc_state(state, crtc);
224 struct skl_ddb_entry entries_y[I915_MAX_PLANES];
225 struct skl_ddb_entry entries_uv[I915_MAX_PLANES];
226 u32 update_mask = new_crtc_state->update_planes;
227 struct intel_plane *plane;
229 memcpy(entries_y, old_crtc_state->wm.skl.plane_ddb_y,
230 sizeof(old_crtc_state->wm.skl.plane_ddb_y));
231 memcpy(entries_uv, old_crtc_state->wm.skl.plane_ddb_uv,
232 sizeof(old_crtc_state->wm.skl.plane_ddb_uv));
234 while ((plane = skl_next_plane_to_commit(state, crtc,
235 entries_y, entries_uv,
237 struct intel_plane_state *new_plane_state =
238 intel_atomic_get_new_plane_state(state, plane);
240 if (new_plane_state->base.visible) {
241 trace_intel_update_plane(&plane->base, crtc);
242 plane->update_plane(plane, new_crtc_state, new_plane_state);
243 } else if (new_plane_state->slave) {
244 struct intel_plane *master =
245 new_plane_state->linked_plane;
248 * We update the slave plane from this function because
249 * programming it from the master plane's update_plane
250 * callback runs into issues when the Y plane is
251 * reassigned, disabled or used by a different plane.
253 * The slave plane is updated with the master plane's
257 intel_atomic_get_new_plane_state(state, master);
259 trace_intel_update_plane(&plane->base, crtc);
260 plane->update_slave(plane, new_crtc_state, new_plane_state);
262 trace_intel_disable_plane(&plane->base, crtc);
263 plane->disable_plane(plane, new_crtc_state);
268 void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
269 struct intel_crtc *crtc)
271 struct intel_crtc_state *new_crtc_state =
272 intel_atomic_get_new_crtc_state(state, crtc);
273 u32 update_mask = new_crtc_state->update_planes;
274 struct intel_plane_state *new_plane_state;
275 struct intel_plane *plane;
278 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {
279 if (crtc->pipe != plane->pipe ||
280 !(update_mask & BIT(plane->id)))
283 if (new_plane_state->base.visible) {
284 trace_intel_update_plane(&plane->base, crtc);
285 plane->update_plane(plane, new_crtc_state, new_plane_state);
287 trace_intel_disable_plane(&plane->base, crtc);
288 plane->disable_plane(plane, new_crtc_state);
293 const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
294 .prepare_fb = intel_prepare_plane_fb,
295 .cleanup_fb = intel_cleanup_plane_fb,
296 .atomic_check = intel_plane_atomic_check,
300 * intel_plane_atomic_get_property - fetch plane property value
301 * @plane: plane to fetch property for
302 * @state: state containing the property value
303 * @property: property to look up
304 * @val: pointer to write property value into
306 * The DRM core does not store shadow copies of properties for
307 * atomic-capable drivers. This entrypoint is used to fetch
308 * the current value of a driver-specific plane property.
311 intel_plane_atomic_get_property(struct drm_plane *plane,
312 const struct drm_plane_state *state,
313 struct drm_property *property,
316 DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
317 property->base.id, property->name);
322 * intel_plane_atomic_set_property - set plane property value
323 * @plane: plane to set property for
324 * @state: state to update property value in
325 * @property: property to set
326 * @val: value to set property to
328 * Writes the specified property value for a plane into the provided atomic
331 * Returns 0 on success, -EINVAL on unrecognized properties
334 intel_plane_atomic_set_property(struct drm_plane *plane,
335 struct drm_plane_state *state,
336 struct drm_property *property,
339 DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
340 property->base.id, property->name);