drivers/gpu/drm/i915/i915_suspend.c

   1 /*
   2  *
   3  * Copyright 2008 (c) Intel Corporation
   4  *   Jesse Barnes <jbarnes@virtuousgeek.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26
  27 #include <drm/i915_drm.h>
  28
  29 #include "i915_reg.h"
  30 #include "intel_drv.h"
  31 #include "intel_fbc.h"
  32
  33 static void i915_save_display(struct drm_i915_private *dev_priv)
  34 {
  35         /* Display arbitration control */
  36         if (INTEL_GEN(dev_priv) <= 4)
  37                 dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
  38
  39         /* save FBC interval */
  40         if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
  41                 dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
  42 }
  43
  44 static void i915_restore_display(struct drm_i915_private *dev_priv)
  45 {
  46         /* Display arbitration */
  47         if (INTEL_GEN(dev_priv) <= 4)
  48                 I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
  49
  50         /* only restore FBC info on the platform that supports FBC*/
  51         intel_fbc_global_disable(dev_priv);
  52
  53         /* restore FBC interval */
  54         if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
  55                 I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
  56
  57         i915_redisable_vga(dev_priv);
  58 }
  59
  60 int i915_save_state(struct drm_i915_private *dev_priv)
  61 {
  62         struct pci_dev *pdev = dev_priv->drm.pdev;
  63         int i;
  64
  65         mutex_lock(&dev_priv->drm.struct_mutex);
  66
  67         i915_save_display(dev_priv);
  68
  69         if (IS_GEN(dev_priv, 4))
  70                 pci_read_config_word(pdev, GCDGMBUS,
  71                                      &dev_priv->regfile.saveGCDGMBUS);
  72
  73         /* Cache mode state */
  74         if (INTEL_GEN(dev_priv) < 7)
  75                 dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
  76
  77         /* Memory Arbitration state */
  78         dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
  79
  80         /* Scratch space */
  81         if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
  82                 for (i = 0; i < 7; i++) {
  83                         dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i));
  84                         dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));
  85                 }
  86                 for (i = 0; i < 3; i++)
  87                         dev_priv->regfile.saveSWF3[i] = I915_READ(SWF3(i));
  88         } else if (IS_GEN(dev_priv, 2)) {
  89                 for (i = 0; i < 7; i++)
  90                         dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));
  91         } else if (HAS_GMCH(dev_priv)) {
  92                 for (i = 0; i < 16; i++) {
  93                         dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i));
  94                         dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));
  95                 }
  96                 for (i = 0; i < 3; i++)
  97                         dev_priv->regfile.saveSWF3[i] = I915_READ(SWF3(i));
  98         }
  99
 100         mutex_unlock(&dev_priv->drm.struct_mutex);
 101
 102         return 0;
 103 }
 104
 105 int i915_restore_state(struct drm_i915_private *dev_priv)
 106 {
 107         struct pci_dev *pdev = dev_priv->drm.pdev;
 108         int i;
 109
 110         mutex_lock(&dev_priv->drm.struct_mutex);
 111
 112         if (IS_GEN(dev_priv, 4))
 113                 pci_write_config_word(pdev, GCDGMBUS,
 114                                       dev_priv->regfile.saveGCDGMBUS);
 115         i915_restore_display(dev_priv);
 116
 117         /* Cache mode state */
 118         if (INTEL_GEN(dev_priv) < 7)
 119                 I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
 120                            0xffff0000);
 121
 122         /* Memory arbitration state */
 123         I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
 124
 125         /* Scratch space */
 126         if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
 127                 for (i = 0; i < 7; i++) {
 128                         I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);
 129                         I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);
 130                 }
 131                 for (i = 0; i < 3; i++)
 132                         I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);
 133         } else if (IS_GEN(dev_priv, 2)) {
 134                 for (i = 0; i < 7; i++)
 135                         I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);
 136         } else if (HAS_GMCH(dev_priv)) {
 137                 for (i = 0; i < 16; i++) {
 138                         I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);
 139                         I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);
 140                 }
 141                 for (i = 0; i < 3; i++)
 142                         I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);
 143         }
 144
 145         mutex_unlock(&dev_priv->drm.struct_mutex);
 146
 147         intel_i2c_reset(dev_priv);
 148
 149         return 0;
 150 }