drivers/gpu/drm/i915/i915_priolist_types.h

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2018 Intel Corporation
   5  */
   6
   7 #ifndef _I915_PRIOLIST_TYPES_H_
   8 #define _I915_PRIOLIST_TYPES_H_
   9
  10 #include <linux/list.h>
  11 #include <linux/rbtree.h>
  12
  13 #include <uapi/drm/i915_drm.h>
  14
  15 enum {
  16         I915_PRIORITY_MIN = I915_CONTEXT_MIN_USER_PRIORITY - 1,
  17         I915_PRIORITY_NORMAL = I915_CONTEXT_DEFAULT_PRIORITY,
  18         I915_PRIORITY_MAX = I915_CONTEXT_MAX_USER_PRIORITY + 1,
  19
  20         /* A preemptive pulse used to monitor the health of each engine */
  21         I915_PRIORITY_HEARTBEAT,
  22
  23         /* Interactive workload, scheduled for immediate pageflipping */
  24         I915_PRIORITY_DISPLAY,
  25 };
  26
  27 #define I915_USER_PRIORITY_SHIFT 0
  28 #define I915_USER_PRIORITY(x) ((x) << I915_USER_PRIORITY_SHIFT)
  29
  30 #define I915_PRIORITY_COUNT BIT(I915_USER_PRIORITY_SHIFT)
  31 #define I915_PRIORITY_MASK (I915_PRIORITY_COUNT - 1)
  32
  33 /* Smallest priority value that cannot be bumped. */
  34 #define I915_PRIORITY_INVALID (INT_MIN | (u8)I915_PRIORITY_MASK)
  35
  36 /*
  37  * Requests containing performance queries must not be preempted by
  38  * another context. They get scheduled with their default priority and
  39  * once they reach the execlist ports we ensure that they stick on the
  40  * HW until finished by pretending that they have maximum priority,
  41  * i.e. nothing can have higher priority and force us to usurp the
  42  * active request.
  43  */
  44 #define I915_PRIORITY_UNPREEMPTABLE INT_MAX
  45 #define I915_PRIORITY_BARRIER (I915_PRIORITY_UNPREEMPTABLE - 1)
  46
  47 struct i915_priolist {
  48         struct list_head requests[I915_PRIORITY_COUNT];
  49         struct rb_node node;
  50         unsigned long used;
  51         int priority;
  52 };
  53
  54 #endif /* _I915_PRIOLIST_TYPES_H_ */