2 * SPDX-License-Identifier: MIT
4 * Copyright © 2017-2018 Intel Corporation
10 #include <linux/hrtimer.h>
11 #include <linux/perf_event.h>
12 #include <linux/spinlock_types.h>
13 #include <uapi/drm/i915_drm.h>
15 struct drm_i915_private;
18 __I915_SAMPLE_FREQ_ACT = 0,
19 __I915_SAMPLE_FREQ_REQ,
21 __I915_SAMPLE_RC6_LAST_REPORTED,
22 __I915_NUM_PMU_SAMPLERS
26 * How many different events we track in the global PMU mask.
28 * It is also used to know to needed number of event reference counters.
30 #define I915_PMU_MASK_BITS \
31 ((1 << I915_PMU_SAMPLE_BITS) + \
32 (I915_PMU_LAST + 1 - __I915_PMU_OTHER(0)))
34 #define I915_ENGINE_SAMPLE_COUNT (I915_SAMPLE_SEMA + 1)
36 struct i915_pmu_sample {
42 * @cpuhp: Struct used for CPU hotplug handling.
45 struct hlist_node node;
53 * @closed: i915 is unregistering.
57 * @name: Name as registered with perf core.
61 * @lock: Lock protecting enable mask and ref count handling.
65 * @timer: Timer for internal i915 PMU sampling.
69 * @enable: Bitmask of all currently enabled events.
71 * Bits are derived from uAPI event numbers in a way that low 16 bits
72 * correspond to engine event _sample_ _type_ (I915_SAMPLE_QUEUED is
73 * bit 0), and higher bits correspond to other events (for instance
74 * I915_PMU_ACTUAL_FREQUENCY is bit 16 etc).
76 * In other words, low 16 bits are not per engine but per engine
77 * sampler type, while the upper bits are directly mapped to other
85 * Timestmap of the previous timer invocation.
90 * @enable_count: Reference counts for the enabled events.
92 * Array indices are mapped in the same way as bits in the @enable field
93 * and they are used to control sampling on/off when multiple clients
94 * are using the PMU API.
96 unsigned int enable_count[I915_PMU_MASK_BITS];
98 * @timer_enabled: Should the internal sampling timer be running.
102 * @sample: Current and previous (raw) counters for sampling events.
104 * These counters are updated from the i915 PMU sampling timer.
106 * Only global counters are held here, while the per-engine ones are in
107 * struct intel_engine_cs.
109 struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
111 * @sleep_last: Last time GT parked for RC6 estimation.
115 * @events_attr_group: Device events attribute group.
117 struct attribute_group events_attr_group;
119 * @i915_attr: Memory block holding device attributes.
123 * @pmu_attr: Memory block holding device attributes.
128 #ifdef CONFIG_PERF_EVENTS
129 void i915_pmu_init(void);
130 void i915_pmu_exit(void);
131 void i915_pmu_register(struct drm_i915_private *i915);
132 void i915_pmu_unregister(struct drm_i915_private *i915);
133 void i915_pmu_gt_parked(struct drm_i915_private *i915);
134 void i915_pmu_gt_unparked(struct drm_i915_private *i915);
136 static inline void i915_pmu_init(void) {}
137 static inline void i915_pmu_exit(void) {}
138 static inline void i915_pmu_register(struct drm_i915_private *i915) {}
139 static inline void i915_pmu_unregister(struct drm_i915_private *i915) {}
140 static inline void i915_pmu_gt_parked(struct drm_i915_private *i915) {}
141 static inline void i915_pmu_gt_unparked(struct drm_i915_private *i915) {}