2 * SPDX-License-Identifier: MIT
4 * Copyright © 2019 Intel Corporation
7 #ifndef __I915_GEM_CONTEXT_TYPES_H__
8 #define __I915_GEM_CONTEXT_TYPES_H__
10 #include <linux/atomic.h>
11 #include <linux/list.h>
12 #include <linux/llist.h>
13 #include <linux/kref.h>
14 #include <linux/mutex.h>
15 #include <linux/radix-tree.h>
16 #include <linux/rbtree.h>
17 #include <linux/rcupdate.h>
18 #include <linux/types.h>
20 #include "i915_scheduler.h"
21 #include "intel_context_types.h"
25 struct drm_i915_private;
26 struct drm_i915_file_private;
32 * struct i915_gem_context - client state
34 * The struct i915_gem_context represents the combined view of the driver and
35 * logical hardware state for a particular client.
37 struct i915_gem_context {
38 /** i915: i915 device backpointer */
39 struct drm_i915_private *i915;
41 /** file_priv: owning file descriptor */
42 struct drm_i915_file_private *file_priv;
44 struct i915_timeline *timeline;
47 * @ppgtt: unique address space (GTT)
49 * In full-ppgtt mode, each context has its own address space ensuring
50 * complete seperation of one client from all others.
52 * In other modes, this is a NULL pointer with the expectation that
53 * the caller uses the shared global GTT.
55 struct i915_hw_ppgtt *ppgtt;
58 * @pid: process id of creator
60 * Note that who created the context may not be the principle user,
61 * as the context may be shared across a local socket. However,
62 * that should only affect the default context, all contexts created
63 * explicitly by the client are expected to be isolated.
68 * @name: arbitrary name
70 * A name is constructed for the context from the creator's process
71 * name, pid and user handle in order to uniquely identify the
72 * context in messages.
76 /** link: place with &drm_i915_private.context_list */
77 struct list_head link;
78 struct llist_node free_link;
81 * @ref: reference count
83 * A reference to a context is held by both the client who created it
84 * and on each request submitted to the hardware using the request
85 * (to ensure the hardware has access to the state until it has
86 * finished all pending writes). See i915_gem_context_get() and
87 * i915_gem_context_put() for access.
92 * @rcu: rcu_head for deferred freeing.
97 * @user_flags: small set of booleans controlled by the user
99 unsigned long user_flags;
100 #define UCONTEXT_NO_ZEROMAP 0
101 #define UCONTEXT_NO_ERROR_CAPTURE 1
102 #define UCONTEXT_BANNABLE 2
103 #define UCONTEXT_RECOVERABLE 3
106 * @flags: small set of booleans
109 #define CONTEXT_BANNED 0
110 #define CONTEXT_CLOSED 1
111 #define CONTEXT_FORCE_SINGLE_SUBMISSION 2
114 * @hw_id: - unique identifier for the context
116 * The hardware needs to uniquely identify the context for a few
117 * functions like fault reporting, PASID, scheduling. The
118 * &drm_i915_private.context_hw_ida is used to assign a unqiue
119 * id for the lifetime of the context.
121 * @hw_id_pin_count: - number of times this context had been pinned
122 * for use (should be, at most, once per engine).
124 * @hw_id_link: - all contexts with an assigned id are tracked
125 * for possible repossession.
128 atomic_t hw_id_pin_count;
129 struct list_head hw_id_link;
131 struct list_head active_engines;
134 struct i915_sched_attr sched;
136 /** hw_contexts: per-engine logical HW state */
137 struct rb_root hw_contexts;
138 spinlock_t hw_contexts_lock;
140 /** ring_size: size for allocating the per-engine ring buffer */
142 /** desc_template: invariant fields for the HW context descriptor */
145 /** guilty_count: How many times this context has caused a GPU hang. */
146 atomic_t guilty_count;
148 * @active_count: How many times this context was active during a GPU
149 * hang, but did not cause it.
151 atomic_t active_count;
154 * @hang_timestamp: The last time(s) this context caused a GPU hang
156 unsigned long hang_timestamp[2];
157 #define CONTEXT_FAST_HANG_JIFFIES (120 * HZ) /* 3 hangs within 120s? Banned! */
159 /** remap_slice: Bitmask of cache lines that need remapping */
162 /** handles_vma: rbtree to look up our context specific obj/vma for
163 * the user handle. (user handles are per fd, but the binding is
164 * per vm, which may be one per context or shared with the global GTT)
166 struct radix_tree_root handles_vma;
168 /** handles_list: reverse list of all the rbtree entries in use for
169 * this context, which allows us to free all the allocations on
172 struct list_head handles_list;
175 #endif /* __I915_GEM_CONTEXT_TYPES_H__ */