1 // SPDX-License-Identifier: MIT
3 * Copyright © 2018 Intel Corporation
6 #include <linux/sort.h>
10 #include "intel_gt_requests.h"
11 #include "i915_selftest.h"
12 #include "selftest_engine_heartbeat.h"
14 static void reset_heartbeat(struct intel_engine_cs *engine)
16 intel_engine_set_heartbeat(engine,
17 engine->defaults.heartbeat_interval_ms);
20 static int timeline_sync(struct intel_timeline *tl)
22 struct dma_fence *fence;
25 fence = i915_active_fence_get(&tl->last_request);
29 timeout = dma_fence_wait_timeout(fence, true, HZ / 2);
37 static int engine_sync_barrier(struct intel_engine_cs *engine)
39 return timeline_sync(engine->kernel_context->timeline);
43 struct i915_active active;
47 static int pulse_active(struct i915_active *active)
49 kref_get(&container_of(active, struct pulse, active)->kref);
53 static void pulse_free(struct kref *kref)
55 struct pulse *p = container_of(kref, typeof(*p), kref);
57 i915_active_fini(&p->active);
61 static void pulse_put(struct pulse *p)
63 kref_put(&p->kref, pulse_free);
66 static void pulse_retire(struct i915_active *active)
68 pulse_put(container_of(active, struct pulse, active));
71 static struct pulse *pulse_create(void)
75 p = kmalloc(sizeof(*p), GFP_KERNEL);
80 i915_active_init(&p->active, pulse_active, pulse_retire);
85 static void pulse_unlock_wait(struct pulse *p)
87 i915_active_unlock_wait(&p->active);
90 static int __live_idle_pulse(struct intel_engine_cs *engine,
91 int (*fn)(struct intel_engine_cs *cs))
96 GEM_BUG_ON(!intel_engine_pm_is_awake(engine));
102 err = i915_active_acquire(&p->active);
106 err = i915_active_acquire_preallocate_barrier(&p->active, engine);
108 i915_active_release(&p->active);
112 i915_active_acquire_barrier(&p->active);
113 i915_active_release(&p->active);
115 GEM_BUG_ON(i915_active_is_idle(&p->active));
116 GEM_BUG_ON(llist_empty(&engine->barrier_tasks));
122 GEM_BUG_ON(!llist_empty(&engine->barrier_tasks));
124 if (engine_sync_barrier(engine)) {
125 struct drm_printer m = drm_err_printer("pulse");
127 pr_err("%s: no heartbeat pulse?\n", engine->name);
128 intel_engine_dump(engine, &m, "%s", engine->name);
134 GEM_BUG_ON(READ_ONCE(engine->serial) != engine->wakeref_serial);
136 pulse_unlock_wait(p); /* synchronize with the retirement callback */
138 if (!i915_active_is_idle(&p->active)) {
139 struct drm_printer m = drm_err_printer("pulse");
141 pr_err("%s: heartbeat pulse did not flush idle tasks\n",
143 i915_active_print(&p->active, &m);
154 static int live_idle_flush(void *arg)
156 struct intel_gt *gt = arg;
157 struct intel_engine_cs *engine;
158 enum intel_engine_id id;
161 /* Check that we can flush the idle barriers */
163 for_each_engine(engine, gt, id) {
164 st_engine_heartbeat_disable(engine);
165 err = __live_idle_pulse(engine, intel_engine_flush_barriers);
166 st_engine_heartbeat_enable(engine);
174 static int live_idle_pulse(void *arg)
176 struct intel_gt *gt = arg;
177 struct intel_engine_cs *engine;
178 enum intel_engine_id id;
181 /* Check that heartbeat pulses flush the idle barriers */
183 for_each_engine(engine, gt, id) {
184 st_engine_heartbeat_disable(engine);
185 err = __live_idle_pulse(engine, intel_engine_pulse);
186 st_engine_heartbeat_enable(engine);
187 if (err && err != -ENODEV)
196 static int cmp_u32(const void *_a, const void *_b)
198 const u32 *a = _a, *b = _b;
203 static int __live_heartbeat_fast(struct intel_engine_cs *engine)
205 const unsigned int error_threshold = max(20000u, jiffies_to_usecs(6));
206 struct intel_context *ce;
207 struct i915_request *rq;
213 ce = intel_context_create(engine);
217 intel_engine_pm_get(engine);
219 err = intel_engine_set_heartbeat(engine, 1);
223 for (i = 0; i < ARRAY_SIZE(times); i++) {
225 /* Manufacture a tick */
226 intel_engine_park_heartbeat(engine);
227 GEM_BUG_ON(engine->heartbeat.systole);
228 engine->serial++; /* pretend we are not idle! */
229 intel_engine_unpark_heartbeat(engine);
231 flush_delayed_work(&engine->heartbeat.work);
232 if (!delayed_work_pending(&engine->heartbeat.work)) {
233 pr_err("%s: heartbeat %d did not start\n",
240 rq = READ_ONCE(engine->heartbeat.systole);
242 rq = i915_request_get_rcu(rq);
247 while (rq == READ_ONCE(engine->heartbeat.systole))
248 yield(); /* work is on the local cpu! */
251 i915_request_put(rq);
252 times[i] = ktime_us_delta(t1, t0);
255 sort(times, ARRAY_SIZE(times), sizeof(times[0]), cmp_u32, NULL);
257 pr_info("%s: Heartbeat delay: %uus [%u, %u]\n",
259 times[ARRAY_SIZE(times) / 2],
261 times[ARRAY_SIZE(times) - 1]);
264 * Ideally, the upper bound on min work delay would be something like
265 * 2 * 2 (worst), +1 for scheduling, +1 for slack. In practice, we
266 * are, even with system_wq_highpri, at the mercy of the CPU scheduler
267 * and may be stuck behind some slow work for many millisecond. Such
268 * as our very own display workers.
270 if (times[ARRAY_SIZE(times) / 2] > error_threshold) {
271 pr_err("%s: Heartbeat delay was %uus, expected less than %dus\n",
273 times[ARRAY_SIZE(times) / 2],
278 reset_heartbeat(engine);
280 intel_engine_pm_put(engine);
281 intel_context_put(ce);
285 static int live_heartbeat_fast(void *arg)
287 struct intel_gt *gt = arg;
288 struct intel_engine_cs *engine;
289 enum intel_engine_id id;
292 /* Check that the heartbeat ticks at the desired rate. */
293 if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
296 for_each_engine(engine, gt, id) {
297 err = __live_heartbeat_fast(engine);
305 static int __live_heartbeat_off(struct intel_engine_cs *engine)
309 intel_engine_pm_get(engine);
312 flush_delayed_work(&engine->heartbeat.work);
313 if (!delayed_work_pending(&engine->heartbeat.work)) {
314 pr_err("%s: heartbeat not running\n",
320 err = intel_engine_set_heartbeat(engine, 0);
325 flush_delayed_work(&engine->heartbeat.work);
326 if (delayed_work_pending(&engine->heartbeat.work)) {
327 pr_err("%s: heartbeat still running\n",
333 if (READ_ONCE(engine->heartbeat.systole)) {
334 pr_err("%s: heartbeat still allocated\n",
341 reset_heartbeat(engine);
343 intel_engine_pm_put(engine);
347 static int live_heartbeat_off(void *arg)
349 struct intel_gt *gt = arg;
350 struct intel_engine_cs *engine;
351 enum intel_engine_id id;
354 /* Check that we can turn off heartbeat and not interrupt VIP */
355 if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
358 for_each_engine(engine, gt, id) {
359 if (!intel_engine_has_preemption(engine))
362 err = __live_heartbeat_off(engine);
370 int intel_heartbeat_live_selftests(struct drm_i915_private *i915)
372 static const struct i915_subtest tests[] = {
373 SUBTEST(live_idle_flush),
374 SUBTEST(live_idle_pulse),
375 SUBTEST(live_heartbeat_fast),
376 SUBTEST(live_heartbeat_off),
381 if (intel_gt_is_wedged(&i915->gt))
384 saved_hangcheck = i915->params.enable_hangcheck;
385 i915->params.enable_hangcheck = INT_MAX;
387 err = intel_gt_live_subtests(tests, &i915->gt);
389 i915->params.enable_hangcheck = saved_hangcheck;
393 void st_engine_heartbeat_disable(struct intel_engine_cs *engine)
395 engine->props.heartbeat_interval_ms = 0;
397 intel_engine_pm_get(engine);
398 intel_engine_park_heartbeat(engine);
401 void st_engine_heartbeat_enable(struct intel_engine_cs *engine)
403 intel_engine_pm_put(engine);
405 engine->props.heartbeat_interval_ms =
406 engine->defaults.heartbeat_interval_ms;