1 // SPDX-License-Identifier: MIT
3 * Copyright © 2020 Intel Corporation
6 #include <linux/slab.h>
8 #include "gem/i915_gem_lmem.h"
10 #include "i915_trace.h"
11 #include "intel_gtt.h"
12 #include "gen6_ppgtt.h"
13 #include "gen8_ppgtt.h"
15 struct i915_page_table *alloc_pt(struct i915_address_space *vm)
17 struct i915_page_table *pt;
19 pt = kmalloc(sizeof(*pt), I915_GFP_ALLOW_FAIL);
21 return ERR_PTR(-ENOMEM);
23 pt->base = vm->alloc_pt_dma(vm, I915_GTT_PAGE_SIZE_4K);
24 if (IS_ERR(pt->base)) {
26 return ERR_PTR(-ENOMEM);
29 atomic_set(&pt->used, 0);
33 struct i915_page_directory *__alloc_pd(int count)
35 struct i915_page_directory *pd;
37 pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
41 pd->entry = kcalloc(count, sizeof(*pd->entry), I915_GFP_ALLOW_FAIL);
42 if (unlikely(!pd->entry)) {
47 spin_lock_init(&pd->lock);
51 struct i915_page_directory *alloc_pd(struct i915_address_space *vm)
53 struct i915_page_directory *pd;
55 pd = __alloc_pd(I915_PDES);
57 return ERR_PTR(-ENOMEM);
59 pd->pt.base = vm->alloc_pt_dma(vm, I915_GTT_PAGE_SIZE_4K);
60 if (IS_ERR(pd->pt.base)) {
63 return ERR_PTR(-ENOMEM);
69 void free_px(struct i915_address_space *vm, struct i915_page_table *pt, int lvl)
71 BUILD_BUG_ON(offsetof(struct i915_page_directory, pt));
74 struct i915_page_directory *pd =
75 container_of(pt, typeof(*pd), pt);
80 i915_gem_object_put(pt->base);
86 write_dma_entry(struct drm_i915_gem_object * const pdma,
87 const unsigned short idx,
88 const u64 encoded_entry)
90 u64 * const vaddr = __px_vaddr(pdma);
92 vaddr[idx] = encoded_entry;
93 clflush_cache_range(&vaddr[idx], sizeof(u64));
97 __set_pd_entry(struct i915_page_directory * const pd,
98 const unsigned short idx,
99 struct i915_page_table * const to,
100 u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
102 /* Each thread pre-pins the pd, and we may have a thread per pde. */
103 GEM_BUG_ON(atomic_read(px_used(pd)) > NALLOC * I915_PDES);
105 atomic_inc(px_used(pd));
107 write_dma_entry(px_base(pd), idx, encode(px_dma(to), I915_CACHE_LLC));
111 clear_pd_entry(struct i915_page_directory * const pd,
112 const unsigned short idx,
113 const struct drm_i915_gem_object * const scratch)
115 GEM_BUG_ON(atomic_read(px_used(pd)) == 0);
117 write_dma_entry(px_base(pd), idx, scratch->encode);
118 pd->entry[idx] = NULL;
119 atomic_dec(px_used(pd));
123 release_pd_entry(struct i915_page_directory * const pd,
124 const unsigned short idx,
125 struct i915_page_table * const pt,
126 const struct drm_i915_gem_object * const scratch)
130 if (atomic_add_unless(&pt->used, -1, 1))
133 spin_lock(&pd->lock);
134 if (atomic_dec_and_test(&pt->used)) {
135 clear_pd_entry(pd, idx, scratch);
138 spin_unlock(&pd->lock);
143 int i915_ppgtt_init_hw(struct intel_gt *gt)
145 struct drm_i915_private *i915 = gt->i915;
147 gtt_write_workarounds(gt);
149 if (GRAPHICS_VER(i915) == 6)
150 gen6_ppgtt_enable(gt);
151 else if (GRAPHICS_VER(i915) == 7)
152 gen7_ppgtt_enable(gt);
157 static struct i915_ppgtt *
158 __ppgtt_create(struct intel_gt *gt)
160 if (GRAPHICS_VER(gt->i915) < 8)
161 return gen6_ppgtt_create(gt);
163 return gen8_ppgtt_create(gt);
166 struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt)
168 struct i915_ppgtt *ppgtt;
170 ppgtt = __ppgtt_create(gt);
174 trace_i915_ppgtt_create(&ppgtt->vm);
179 void ppgtt_bind_vma(struct i915_address_space *vm,
180 struct i915_vm_pt_stash *stash,
181 struct i915_vma *vma,
182 enum i915_cache_level cache_level,
187 if (!test_bit(I915_VMA_ALLOC_BIT, __i915_vma_flags(vma))) {
188 vm->allocate_va_range(vm, stash, vma->node.start, vma->size);
189 set_bit(I915_VMA_ALLOC_BIT, __i915_vma_flags(vma));
192 /* Applicable to VLV, and gen8+ */
194 if (i915_gem_object_is_readonly(vma->obj))
195 pte_flags |= PTE_READ_ONLY;
196 if (i915_gem_object_is_lmem(vma->obj))
199 vm->insert_entries(vm, vma, cache_level, pte_flags);
203 void ppgtt_unbind_vma(struct i915_address_space *vm, struct i915_vma *vma)
205 if (test_and_clear_bit(I915_VMA_ALLOC_BIT, __i915_vma_flags(vma)))
206 vm->clear_range(vm, vma->node.start, vma->size);
209 static unsigned long pd_count(u64 size, int shift)
211 /* Beware later misalignment */
212 return (size + 2 * (BIT_ULL(shift) - 1)) >> shift;
215 int i915_vm_alloc_pt_stash(struct i915_address_space *vm,
216 struct i915_vm_pt_stash *stash,
222 shift = vm->pd_shift;
226 count = pd_count(size, shift);
228 struct i915_page_table *pt;
232 i915_vm_free_pt_stash(vm, stash);
236 pt->stash = stash->pt[0];
240 for (n = 1; n < vm->top; n++) {
241 shift += ilog2(I915_PDES); /* Each PD holds 512 entries */
242 count = pd_count(size, shift);
244 struct i915_page_directory *pd;
248 i915_vm_free_pt_stash(vm, stash);
252 pd->pt.stash = stash->pt[1];
253 stash->pt[1] = &pd->pt;
260 int i915_vm_map_pt_stash(struct i915_address_space *vm,
261 struct i915_vm_pt_stash *stash)
263 struct i915_page_table *pt;
266 for (n = 0; n < ARRAY_SIZE(stash->pt); n++) {
267 for (pt = stash->pt[n]; pt; pt = pt->stash) {
268 err = map_pt_dma_locked(vm, pt->base);
277 void i915_vm_free_pt_stash(struct i915_address_space *vm,
278 struct i915_vm_pt_stash *stash)
280 struct i915_page_table *pt;
283 for (n = 0; n < ARRAY_SIZE(stash->pt); n++) {
284 while ((pt = stash->pt[n])) {
285 stash->pt[n] = pt->stash;
291 int ppgtt_set_pages(struct i915_vma *vma)
293 GEM_BUG_ON(vma->pages);
295 vma->pages = vma->obj->mm.pages;
296 vma->page_sizes = vma->obj->mm.page_sizes;
301 void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt)
303 struct drm_i915_private *i915 = gt->i915;
306 ppgtt->vm.i915 = i915;
307 ppgtt->vm.dma = i915->drm.dev;
308 ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size);
310 dma_resv_init(&ppgtt->vm._resv);
311 i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT);
313 ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma;
314 ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
315 ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages;
316 ppgtt->vm.vma_ops.clear_pages = clear_pages;