1 /* SPDX-License-Identifier: MIT */
3 * Copyright © 2019 Intel Corporation
9 #include <linux/types.h>
11 #include "intel_engine_types.h"
15 #define GEN8_GT_IRQS (GEN8_GT_RCS_IRQ | \
23 void gen11_gt_irq_reset(struct intel_gt *gt);
24 void gen11_gt_irq_postinstall(struct intel_gt *gt);
25 void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
27 bool gen11_gt_reset_one_iir(struct intel_gt *gt,
28 const unsigned int bank,
29 const unsigned int bit);
31 void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
33 void gen5_gt_irq_postinstall(struct intel_gt *gt);
34 void gen5_gt_irq_reset(struct intel_gt *gt);
35 void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
36 void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
38 void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
40 void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl);
41 void gen8_gt_irq_reset(struct intel_gt *gt);
42 void gen8_gt_irq_postinstall(struct intel_gt *gt);
44 static inline void intel_engine_cs_irq(struct intel_engine_cs *engine, u16 iir)
47 engine->irq_handler(engine, iir);
51 intel_engine_set_irq_handler(struct intel_engine_cs *engine,
52 void (*fn)(struct intel_engine_cs *engine,
56 * As the interrupt is live as allocate and setup the engines,
57 * err on the side of caution and apply barriers to updating
58 * the irq handler callback. This assures that when we do use
59 * the engine, we will receive interrupts only to ourselves,
62 smp_store_mb(engine->irq_handler, fn);
65 #endif /* INTEL_GT_IRQ_H */