2 * SPDX-License-Identifier: MIT
4 * Copyright © 2017 Intel Corporation
7 #include <linux/prime_numbers.h>
9 #include "i915_selftest.h"
11 #include "gem/i915_gem_region.h"
12 #include "gem/i915_gem_lmem.h"
13 #include "gem/i915_gem_pm.h"
15 #include "gt/intel_gt.h"
17 #include "igt_gem_utils.h"
18 #include "mock_context.h"
20 #include "selftests/mock_drm.h"
21 #include "selftests/mock_gem_device.h"
22 #include "selftests/mock_region.h"
23 #include "selftests/i915_random.h"
25 static const unsigned int page_sizes[] = {
26 I915_GTT_PAGE_SIZE_2M,
27 I915_GTT_PAGE_SIZE_64K,
28 I915_GTT_PAGE_SIZE_4K,
31 static unsigned int get_largest_page_size(struct drm_i915_private *i915,
36 for (i = 0; i < ARRAY_SIZE(page_sizes); ++i) {
37 unsigned int page_size = page_sizes[i];
39 if (HAS_PAGE_SIZES(i915, page_size) && rem >= page_size)
46 static void huge_pages_free_pages(struct sg_table *st)
48 struct scatterlist *sg;
50 for (sg = st->sgl; sg; sg = __sg_next(sg)) {
52 __free_pages(sg_page(sg), get_order(sg->length));
59 static int get_huge_pages(struct drm_i915_gem_object *obj)
61 #define GFP (GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY)
62 unsigned int page_mask = obj->mm.page_mask;
64 struct scatterlist *sg;
65 unsigned int sg_page_sizes;
68 st = kmalloc(sizeof(*st), GFP);
72 if (sg_alloc_table(st, obj->base.size >> PAGE_SHIFT, GFP)) {
83 * Our goal here is simple, we want to greedily fill the object from
84 * largest to smallest page-size, while ensuring that we use *every*
85 * page-size as per the given page-mask.
88 unsigned int bit = ilog2(page_mask);
89 unsigned int page_size = BIT(bit);
90 int order = get_order(page_size);
95 GEM_BUG_ON(order >= MAX_ORDER);
96 page = alloc_pages(GFP | __GFP_ZERO, order);
100 sg_set_page(sg, page, page_size, 0);
101 sg_page_sizes |= page_size;
111 } while ((rem - ((page_size-1) & page_mask)) >= page_size);
113 page_mask &= (page_size-1);
116 if (i915_gem_gtt_prepare_pages(obj, st))
119 GEM_BUG_ON(sg_page_sizes != obj->mm.page_mask);
120 __i915_gem_object_set_pages(obj, st, sg_page_sizes);
125 sg_set_page(sg, NULL, 0, 0);
127 huge_pages_free_pages(st);
132 static void put_huge_pages(struct drm_i915_gem_object *obj,
133 struct sg_table *pages)
135 i915_gem_gtt_finish_pages(obj, pages);
136 huge_pages_free_pages(pages);
138 obj->mm.dirty = false;
141 static const struct drm_i915_gem_object_ops huge_page_ops = {
143 .flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE |
144 I915_GEM_OBJECT_IS_SHRINKABLE,
145 .get_pages = get_huge_pages,
146 .put_pages = put_huge_pages,
149 static struct drm_i915_gem_object *
150 huge_pages_object(struct drm_i915_private *i915,
152 unsigned int page_mask)
154 static struct lock_class_key lock_class;
155 struct drm_i915_gem_object *obj;
158 GEM_BUG_ON(!IS_ALIGNED(size, BIT(__ffs(page_mask))));
160 if (size >> PAGE_SHIFT > INT_MAX)
161 return ERR_PTR(-E2BIG);
163 if (overflows_type(size, obj->base.size))
164 return ERR_PTR(-E2BIG);
166 obj = i915_gem_object_alloc();
168 return ERR_PTR(-ENOMEM);
170 drm_gem_private_object_init(&i915->drm, &obj->base, size);
171 i915_gem_object_init(obj, &huge_page_ops, &lock_class);
173 i915_gem_object_set_volatile(obj);
175 obj->write_domain = I915_GEM_DOMAIN_CPU;
176 obj->read_domains = I915_GEM_DOMAIN_CPU;
177 obj->cache_level = I915_CACHE_NONE;
179 obj->mm.page_mask = page_mask;
184 static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
186 struct drm_i915_private *i915 = to_i915(obj->base.dev);
187 const u64 max_len = rounddown_pow_of_two(UINT_MAX);
189 struct scatterlist *sg;
190 unsigned int sg_page_sizes;
193 st = kmalloc(sizeof(*st), GFP);
197 if (sg_alloc_table(st, obj->base.size >> PAGE_SHIFT, GFP)) {
202 /* Use optimal page sized chunks to fill in the sg table */
203 rem = obj->base.size;
208 unsigned int page_size = get_largest_page_size(i915, rem);
209 unsigned int len = min(page_size * div_u64(rem, page_size),
212 GEM_BUG_ON(!page_size);
216 sg_dma_len(sg) = len;
217 sg_dma_address(sg) = page_size;
219 sg_page_sizes |= len;
234 __i915_gem_object_set_pages(obj, st, sg_page_sizes);
239 static int fake_get_huge_pages_single(struct drm_i915_gem_object *obj)
241 struct drm_i915_private *i915 = to_i915(obj->base.dev);
243 struct scatterlist *sg;
244 unsigned int page_size;
246 st = kmalloc(sizeof(*st), GFP);
250 if (sg_alloc_table(st, 1, GFP)) {
258 page_size = get_largest_page_size(i915, obj->base.size);
259 GEM_BUG_ON(!page_size);
262 sg->length = obj->base.size;
263 sg_dma_len(sg) = obj->base.size;
264 sg_dma_address(sg) = page_size;
266 __i915_gem_object_set_pages(obj, st, sg->length);
272 static void fake_free_huge_pages(struct drm_i915_gem_object *obj,
273 struct sg_table *pages)
275 sg_free_table(pages);
279 static void fake_put_huge_pages(struct drm_i915_gem_object *obj,
280 struct sg_table *pages)
282 fake_free_huge_pages(obj, pages);
283 obj->mm.dirty = false;
286 static const struct drm_i915_gem_object_ops fake_ops = {
288 .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
289 .get_pages = fake_get_huge_pages,
290 .put_pages = fake_put_huge_pages,
293 static const struct drm_i915_gem_object_ops fake_ops_single = {
295 .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
296 .get_pages = fake_get_huge_pages_single,
297 .put_pages = fake_put_huge_pages,
300 static struct drm_i915_gem_object *
301 fake_huge_pages_object(struct drm_i915_private *i915, u64 size, bool single)
303 static struct lock_class_key lock_class;
304 struct drm_i915_gem_object *obj;
307 GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
309 if (size >> PAGE_SHIFT > UINT_MAX)
310 return ERR_PTR(-E2BIG);
312 if (overflows_type(size, obj->base.size))
313 return ERR_PTR(-E2BIG);
315 obj = i915_gem_object_alloc();
317 return ERR_PTR(-ENOMEM);
319 drm_gem_private_object_init(&i915->drm, &obj->base, size);
322 i915_gem_object_init(obj, &fake_ops_single, &lock_class);
324 i915_gem_object_init(obj, &fake_ops, &lock_class);
326 i915_gem_object_set_volatile(obj);
328 obj->write_domain = I915_GEM_DOMAIN_CPU;
329 obj->read_domains = I915_GEM_DOMAIN_CPU;
330 obj->cache_level = I915_CACHE_NONE;
335 static int igt_check_page_sizes(struct i915_vma *vma)
337 struct drm_i915_private *i915 = vma->vm->i915;
338 unsigned int supported = INTEL_INFO(i915)->page_sizes;
339 struct drm_i915_gem_object *obj = vma->obj;
342 /* We have to wait for the async bind to complete before our asserts */
343 err = i915_vma_sync(vma);
347 if (!HAS_PAGE_SIZES(i915, vma->page_sizes.sg)) {
348 pr_err("unsupported page_sizes.sg=%u, supported=%u\n",
349 vma->page_sizes.sg & ~supported, supported);
353 if (!HAS_PAGE_SIZES(i915, vma->page_sizes.gtt)) {
354 pr_err("unsupported page_sizes.gtt=%u, supported=%u\n",
355 vma->page_sizes.gtt & ~supported, supported);
359 if (vma->page_sizes.phys != obj->mm.page_sizes.phys) {
360 pr_err("vma->page_sizes.phys(%u) != obj->mm.page_sizes.phys(%u)\n",
361 vma->page_sizes.phys, obj->mm.page_sizes.phys);
365 if (vma->page_sizes.sg != obj->mm.page_sizes.sg) {
366 pr_err("vma->page_sizes.sg(%u) != obj->mm.page_sizes.sg(%u)\n",
367 vma->page_sizes.sg, obj->mm.page_sizes.sg);
371 if (obj->mm.page_sizes.gtt) {
372 pr_err("obj->page_sizes.gtt(%u) should never be set\n",
373 obj->mm.page_sizes.gtt);
380 static int igt_mock_exhaust_device_supported_pages(void *arg)
382 struct i915_ppgtt *ppgtt = arg;
383 struct drm_i915_private *i915 = ppgtt->vm.i915;
384 unsigned int saved_mask = INTEL_INFO(i915)->page_sizes;
385 struct drm_i915_gem_object *obj;
386 struct i915_vma *vma;
391 * Sanity check creating objects with every valid page support
392 * combination for our mock device.
395 for (i = 1; i < BIT(ARRAY_SIZE(page_sizes)); i++) {
396 unsigned int combination = SZ_4K; /* Required for ppGTT */
398 for (j = 0; j < ARRAY_SIZE(page_sizes); j++) {
400 combination |= page_sizes[j];
403 mkwrite_device_info(i915)->page_sizes = combination;
405 for (single = 0; single <= 1; ++single) {
406 obj = fake_huge_pages_object(i915, combination, !!single);
412 if (obj->base.size != combination) {
413 pr_err("obj->base.size=%zu, expected=%u\n",
414 obj->base.size, combination);
419 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
425 err = i915_vma_pin(vma, 0, 0, PIN_USER);
429 err = igt_check_page_sizes(vma);
431 if (vma->page_sizes.sg != combination) {
432 pr_err("page_sizes.sg=%u, expected=%u\n",
433 vma->page_sizes.sg, combination);
438 i915_gem_object_put(obj);
448 i915_gem_object_put(obj);
450 mkwrite_device_info(i915)->page_sizes = saved_mask;
455 static int igt_mock_memory_region_huge_pages(void *arg)
457 const unsigned int flags[] = { 0, I915_BO_ALLOC_CONTIGUOUS };
458 struct i915_ppgtt *ppgtt = arg;
459 struct drm_i915_private *i915 = ppgtt->vm.i915;
460 unsigned long supported = INTEL_INFO(i915)->page_sizes;
461 struct intel_memory_region *mem;
462 struct drm_i915_gem_object *obj;
463 struct i915_vma *vma;
467 mem = mock_region_create(i915, 0, SZ_2G, I915_GTT_PAGE_SIZE_4K, 0);
469 pr_err("%s failed to create memory region\n", __func__);
473 for_each_set_bit(bit, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
474 unsigned int page_size = BIT(bit);
475 resource_size_t phys;
478 for (i = 0; i < ARRAY_SIZE(flags); ++i) {
479 obj = i915_gem_object_create_region(mem, page_size,
486 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
492 err = i915_vma_pin(vma, 0, 0, PIN_USER);
496 err = igt_check_page_sizes(vma);
500 phys = i915_gem_object_get_dma_address(obj, 0);
501 if (!IS_ALIGNED(phys, page_size)) {
502 pr_err("%s addr misaligned(%pa) page_size=%u\n",
503 __func__, &phys, page_size);
508 if (vma->page_sizes.gtt != page_size) {
509 pr_err("%s page_sizes.gtt=%u, expected=%u\n",
510 __func__, vma->page_sizes.gtt,
517 __i915_gem_object_put_pages(obj);
518 i915_gem_object_put(obj);
527 i915_gem_object_put(obj);
529 intel_memory_region_put(mem);
533 static int igt_mock_ppgtt_misaligned_dma(void *arg)
535 struct i915_ppgtt *ppgtt = arg;
536 struct drm_i915_private *i915 = ppgtt->vm.i915;
537 unsigned long supported = INTEL_INFO(i915)->page_sizes;
538 struct drm_i915_gem_object *obj;
543 * Sanity check dma misalignment for huge pages -- the dma addresses we
544 * insert into the paging structures need to always respect the page
548 bit = ilog2(I915_GTT_PAGE_SIZE_64K);
550 for_each_set_bit_from(bit, &supported,
551 ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
552 IGT_TIMEOUT(end_time);
553 unsigned int page_size = BIT(bit);
554 unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
557 round_up(page_size, I915_GTT_PAGE_SIZE_2M) << 1;
558 struct i915_vma *vma;
560 obj = fake_huge_pages_object(i915, size, true);
564 if (obj->base.size != size) {
565 pr_err("obj->base.size=%zu, expected=%u\n",
566 obj->base.size, size);
571 err = i915_gem_object_pin_pages(obj);
575 /* Force the page size for this object */
576 obj->mm.page_sizes.sg = page_size;
578 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
584 err = i915_vma_pin(vma, 0, 0, flags);
589 err = igt_check_page_sizes(vma);
591 if (vma->page_sizes.gtt != page_size) {
592 pr_err("page_sizes.gtt=%u, expected %u\n",
593 vma->page_sizes.gtt, page_size);
603 * Try all the other valid offsets until the next
604 * boundary -- should always fall back to using 4K
607 for (offset = 4096; offset < page_size; offset += 4096) {
608 err = i915_vma_unbind(vma);
612 err = i915_vma_pin(vma, 0, 0, flags | offset);
616 err = igt_check_page_sizes(vma);
618 if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
619 pr_err("page_sizes.gtt=%u, expected %llu\n",
620 vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
629 if (igt_timeout(end_time,
630 "%s timed out at offset %x with page-size %x\n",
631 __func__, offset, page_size))
635 i915_gem_object_unpin_pages(obj);
636 __i915_gem_object_put_pages(obj);
637 i915_gem_object_put(obj);
643 i915_gem_object_unpin_pages(obj);
645 i915_gem_object_put(obj);
650 static void close_object_list(struct list_head *objects,
651 struct i915_ppgtt *ppgtt)
653 struct drm_i915_gem_object *obj, *on;
655 list_for_each_entry_safe(obj, on, objects, st_link) {
656 list_del(&obj->st_link);
657 i915_gem_object_unpin_pages(obj);
658 __i915_gem_object_put_pages(obj);
659 i915_gem_object_put(obj);
663 static int igt_mock_ppgtt_huge_fill(void *arg)
665 struct i915_ppgtt *ppgtt = arg;
666 struct drm_i915_private *i915 = ppgtt->vm.i915;
667 unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
668 unsigned long page_num;
671 IGT_TIMEOUT(end_time);
674 for_each_prime_number_from(page_num, 1, max_pages) {
675 struct drm_i915_gem_object *obj;
676 u64 size = page_num << PAGE_SHIFT;
677 struct i915_vma *vma;
678 unsigned int expected_gtt = 0;
681 obj = fake_huge_pages_object(i915, size, single);
687 if (obj->base.size != size) {
688 pr_err("obj->base.size=%zd, expected=%llu\n",
689 obj->base.size, size);
690 i915_gem_object_put(obj);
695 err = i915_gem_object_pin_pages(obj);
697 i915_gem_object_put(obj);
701 list_add(&obj->st_link, &objects);
703 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
709 err = i915_vma_pin(vma, 0, 0, PIN_USER);
713 err = igt_check_page_sizes(vma);
720 * Figure out the expected gtt page size knowing that we go from
721 * largest to smallest page size sg chunks, and that we align to
722 * the largest page size.
724 for (i = 0; i < ARRAY_SIZE(page_sizes); ++i) {
725 unsigned int page_size = page_sizes[i];
727 if (HAS_PAGE_SIZES(i915, page_size) &&
729 expected_gtt |= page_size;
734 GEM_BUG_ON(!expected_gtt);
737 if (expected_gtt & I915_GTT_PAGE_SIZE_4K)
738 expected_gtt &= ~I915_GTT_PAGE_SIZE_64K;
742 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
743 if (!IS_ALIGNED(vma->node.start,
744 I915_GTT_PAGE_SIZE_2M)) {
745 pr_err("node.start(%llx) not aligned to 2M\n",
751 if (!IS_ALIGNED(vma->node.size,
752 I915_GTT_PAGE_SIZE_2M)) {
753 pr_err("node.size(%llx) not aligned to 2M\n",
760 if (vma->page_sizes.gtt != expected_gtt) {
761 pr_err("gtt=%u, expected=%u, size=%zd, single=%s\n",
762 vma->page_sizes.gtt, expected_gtt,
763 obj->base.size, yesno(!!single));
768 if (igt_timeout(end_time,
769 "%s timed out at size %zd\n",
770 __func__, obj->base.size))
776 close_object_list(&objects, ppgtt);
778 if (err == -ENOMEM || err == -ENOSPC)
784 static int igt_mock_ppgtt_64K(void *arg)
786 struct i915_ppgtt *ppgtt = arg;
787 struct drm_i915_private *i915 = ppgtt->vm.i915;
788 struct drm_i915_gem_object *obj;
789 const struct object_info {
794 /* Cases with forced padding/alignment */
797 .gtt = I915_GTT_PAGE_SIZE_64K,
801 .size = SZ_64K + SZ_4K,
802 .gtt = I915_GTT_PAGE_SIZE_4K,
806 .size = SZ_64K - SZ_4K,
807 .gtt = I915_GTT_PAGE_SIZE_4K,
812 .gtt = I915_GTT_PAGE_SIZE_64K,
816 .size = SZ_2M - SZ_4K,
817 .gtt = I915_GTT_PAGE_SIZE_4K,
821 .size = SZ_2M + SZ_4K,
822 .gtt = I915_GTT_PAGE_SIZE_64K | I915_GTT_PAGE_SIZE_4K,
826 .size = SZ_2M + SZ_64K,
827 .gtt = I915_GTT_PAGE_SIZE_64K,
831 .size = SZ_2M - SZ_64K,
832 .gtt = I915_GTT_PAGE_SIZE_64K,
835 /* Try without any forced padding/alignment */
839 .gtt = I915_GTT_PAGE_SIZE_4K,
843 .offset = SZ_2M - SZ_64K,
844 .gtt = I915_GTT_PAGE_SIZE_4K,
847 struct i915_vma *vma;
852 * Sanity check some of the trickiness with 64K pages -- either we can
853 * safely mark the whole page-table(2M block) as 64K, or we have to
854 * always fallback to 4K.
857 if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K))
860 for (i = 0; i < ARRAY_SIZE(objects); ++i) {
861 unsigned int size = objects[i].size;
862 unsigned int expected_gtt = objects[i].gtt;
863 unsigned int offset = objects[i].offset;
864 unsigned int flags = PIN_USER;
866 for (single = 0; single <= 1; single++) {
867 obj = fake_huge_pages_object(i915, size, !!single);
871 err = i915_gem_object_pin_pages(obj);
876 * Disable 2M pages -- We only want to use 64K/4K pages
879 obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
881 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
884 goto out_object_unpin;
888 flags |= PIN_OFFSET_FIXED | offset;
890 err = i915_vma_pin(vma, 0, 0, flags);
892 goto out_object_unpin;
894 err = igt_check_page_sizes(vma);
898 if (!offset && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
899 if (!IS_ALIGNED(vma->node.start,
900 I915_GTT_PAGE_SIZE_2M)) {
901 pr_err("node.start(%llx) not aligned to 2M\n",
907 if (!IS_ALIGNED(vma->node.size,
908 I915_GTT_PAGE_SIZE_2M)) {
909 pr_err("node.size(%llx) not aligned to 2M\n",
916 if (vma->page_sizes.gtt != expected_gtt) {
917 pr_err("gtt=%u, expected=%u, i=%d, single=%s\n",
918 vma->page_sizes.gtt, expected_gtt, i,
925 i915_gem_object_unpin_pages(obj);
926 __i915_gem_object_put_pages(obj);
927 i915_gem_object_put(obj);
936 i915_gem_object_unpin_pages(obj);
938 i915_gem_object_put(obj);
943 static int gpu_write(struct intel_context *ce,
944 struct i915_vma *vma,
950 i915_gem_object_lock(vma->obj, NULL);
951 err = i915_gem_object_set_to_gtt_domain(vma->obj, true);
952 i915_gem_object_unlock(vma->obj);
956 return igt_gpu_fill_dw(ce, vma, dw * sizeof(u32),
957 vma->size >> PAGE_SHIFT, val);
961 __cpu_check_shmem(struct drm_i915_gem_object *obj, u32 dword, u32 val)
963 unsigned int needs_flush;
967 i915_gem_object_lock(obj, NULL);
968 err = i915_gem_object_prepare_read(obj, &needs_flush);
972 for (n = 0; n < obj->base.size >> PAGE_SHIFT; ++n) {
973 u32 *ptr = kmap_atomic(i915_gem_object_get_page(obj, n));
975 if (needs_flush & CLFLUSH_BEFORE)
976 drm_clflush_virt_range(ptr, PAGE_SIZE);
978 if (ptr[dword] != val) {
979 pr_err("n=%lu ptr[%u]=%u, val=%u\n",
980 n, dword, ptr[dword], val);
989 i915_gem_object_finish_access(obj);
991 i915_gem_object_unlock(obj);
996 static int __cpu_check_vmap(struct drm_i915_gem_object *obj, u32 dword, u32 val)
998 unsigned long n = obj->base.size >> PAGE_SHIFT;
1002 err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
1006 ptr = i915_gem_object_pin_map(obj, I915_MAP_WC);
1008 return PTR_ERR(ptr);
1013 pr_err("base[%u]=%08x, val=%08x\n",
1019 ptr += PAGE_SIZE / sizeof(*ptr);
1022 i915_gem_object_unpin_map(obj);
1026 static int cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
1028 if (i915_gem_object_has_struct_page(obj))
1029 return __cpu_check_shmem(obj, dword, val);
1031 return __cpu_check_vmap(obj, dword, val);
1034 static int __igt_write_huge(struct intel_context *ce,
1035 struct drm_i915_gem_object *obj,
1036 u64 size, u64 offset,
1039 unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
1040 struct i915_vma *vma;
1043 vma = i915_vma_instance(obj, ce->vm, NULL);
1045 return PTR_ERR(vma);
1047 err = i915_vma_unbind(vma);
1051 err = i915_vma_pin(vma, size, 0, flags | offset);
1054 * The ggtt may have some pages reserved so
1055 * refrain from erroring out.
1057 if (err == -ENOSPC && i915_is_ggtt(ce->vm))
1063 err = igt_check_page_sizes(vma);
1067 err = gpu_write(ce, vma, dword, val);
1069 pr_err("gpu-write failed at offset=%llx\n", offset);
1073 err = cpu_check(obj, dword, val);
1075 pr_err("cpu-check failed at offset=%llx\n", offset);
1080 i915_vma_unpin(vma);
1084 static int igt_write_huge(struct i915_gem_context *ctx,
1085 struct drm_i915_gem_object *obj)
1087 struct i915_gem_engines *engines;
1088 struct i915_gem_engines_iter it;
1089 struct intel_context *ce;
1090 I915_RND_STATE(prng);
1091 IGT_TIMEOUT(end_time);
1092 unsigned int max_page_size;
1101 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
1103 size = obj->base.size;
1104 if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
1105 size = round_up(size, I915_GTT_PAGE_SIZE_2M);
1110 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1112 if (!intel_engine_can_store_dword(ce->engine))
1115 max = min(max, ce->vm->total);
1118 i915_gem_context_unlock_engines(ctx);
1123 * To keep things interesting when alternating between engines in our
1124 * randomized order, lets also make feeding to the same engine a few
1125 * times in succession a possibility by enlarging the permutation array.
1127 order = i915_random_order(count * count, &prng);
1131 max_page_size = rounddown_pow_of_two(obj->mm.page_sizes.sg);
1132 max = div_u64(max - size, max_page_size);
1135 * Try various offsets in an ascending/descending fashion until we
1136 * timeout -- we want to avoid issues hidden by effectively always using
1140 engines = i915_gem_context_lock_engines(ctx);
1141 for_each_prime_number_from(num, 0, max) {
1142 u64 offset_low = num * max_page_size;
1143 u64 offset_high = (max - num) * max_page_size;
1144 u32 dword = offset_in_page(num) / 4;
1145 struct intel_context *ce;
1147 ce = engines->engines[order[i] % engines->num_engines];
1148 i = (i + 1) % (count * count);
1149 if (!ce || !intel_engine_can_store_dword(ce->engine))
1153 * In order to utilize 64K pages we need to both pad the vma
1154 * size and ensure the vma offset is at the start of the pt
1155 * boundary, however to improve coverage we opt for testing both
1156 * aligned and unaligned offsets.
1158 if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
1159 offset_low = round_down(offset_low,
1160 I915_GTT_PAGE_SIZE_2M);
1162 err = __igt_write_huge(ce, obj, size, offset_low,
1167 err = __igt_write_huge(ce, obj, size, offset_high,
1172 if (igt_timeout(end_time,
1173 "%s timed out on %s, offset_low=%llx offset_high=%llx, max_page_size=%x\n",
1174 __func__, ce->engine->name, offset_low, offset_high,
1178 i915_gem_context_unlock_engines(ctx);
1185 typedef struct drm_i915_gem_object *
1186 (*igt_create_fn)(struct drm_i915_private *i915, u32 size, u32 flags);
1188 static inline bool igt_can_allocate_thp(struct drm_i915_private *i915)
1190 return i915->mm.gemfs && has_transparent_hugepage();
1193 static struct drm_i915_gem_object *
1194 igt_create_shmem(struct drm_i915_private *i915, u32 size, u32 flags)
1196 if (!igt_can_allocate_thp(i915)) {
1197 pr_info("%s missing THP support, skipping\n", __func__);
1198 return ERR_PTR(-ENODEV);
1201 return i915_gem_object_create_shmem(i915, size);
1204 static struct drm_i915_gem_object *
1205 igt_create_internal(struct drm_i915_private *i915, u32 size, u32 flags)
1207 return i915_gem_object_create_internal(i915, size);
1210 static struct drm_i915_gem_object *
1211 igt_create_system(struct drm_i915_private *i915, u32 size, u32 flags)
1213 return huge_pages_object(i915, size, size);
1216 static struct drm_i915_gem_object *
1217 igt_create_local(struct drm_i915_private *i915, u32 size, u32 flags)
1219 return i915_gem_object_create_lmem(i915, size, flags);
1222 static u32 igt_random_size(struct rnd_state *prng,
1229 GEM_BUG_ON(!is_power_of_2(min_page_size));
1230 GEM_BUG_ON(!is_power_of_2(max_page_size));
1231 GEM_BUG_ON(min_page_size < PAGE_SIZE);
1232 GEM_BUG_ON(min_page_size > max_page_size);
1234 mask = ((max_page_size << 1ULL) - 1) & PAGE_MASK;
1235 size = prandom_u32_state(prng) & mask;
1236 if (size < min_page_size)
1237 size |= min_page_size;
1242 static int igt_ppgtt_smoke_huge(void *arg)
1244 struct i915_gem_context *ctx = arg;
1245 struct drm_i915_private *i915 = ctx->i915;
1246 struct drm_i915_gem_object *obj;
1247 I915_RND_STATE(prng);
1253 { igt_create_internal, SZ_64K, SZ_2M, },
1254 { igt_create_shmem, SZ_64K, SZ_32M, },
1255 { igt_create_local, SZ_64K, SZ_1G, },
1261 * Sanity check that the HW uses huge pages correctly through our
1262 * various backends -- ensure that our writes land in the right place.
1265 for (i = 0; i < ARRAY_SIZE(backends); ++i) {
1266 u32 min = backends[i].min;
1267 u32 max = backends[i].max;
1270 size = igt_random_size(&prng, min, rounddown_pow_of_two(size));
1272 obj = backends[i].fn(i915, size, 0);
1275 if (err == -E2BIG) {
1278 } else if (err == -ENODEV) {
1286 err = i915_gem_object_pin_pages(obj);
1288 if (err == -ENXIO || err == -E2BIG) {
1289 i915_gem_object_put(obj);
1296 if (obj->mm.page_sizes.phys < min) {
1297 pr_info("%s unable to allocate huge-page(s) with size=%u, i=%d\n",
1303 err = igt_write_huge(ctx, obj);
1305 pr_err("%s write-huge failed with size=%u, i=%d\n",
1309 i915_gem_object_unpin_pages(obj);
1310 __i915_gem_object_put_pages(obj);
1312 i915_gem_object_put(obj);
1314 if (err == -ENOMEM || err == -ENXIO)
1326 static int igt_ppgtt_sanity_check(void *arg)
1328 struct i915_gem_context *ctx = arg;
1329 struct drm_i915_private *i915 = ctx->i915;
1330 unsigned int supported = INTEL_INFO(i915)->page_sizes;
1335 { igt_create_system, 0, },
1336 { igt_create_local, I915_BO_ALLOC_CONTIGUOUS, },
1345 { SZ_2M - SZ_64K, SZ_64K },
1346 { SZ_2M - SZ_4K, SZ_64K | SZ_4K },
1347 { SZ_2M + SZ_4K, SZ_64K | SZ_4K },
1348 { SZ_2M + SZ_4K, SZ_2M | SZ_4K },
1349 { SZ_2M + SZ_64K, SZ_2M | SZ_64K },
1354 if (supported == I915_GTT_PAGE_SIZE_4K)
1358 * Sanity check that the HW behaves with a limited set of combinations.
1359 * We already have a bunch of randomised testing, which should give us
1360 * a decent amount of variation between runs, however we should keep
1361 * this to limit the chances of introducing a temporary regression, by
1362 * testing the most obvious cases that might make something blow up.
1365 for (i = 0; i < ARRAY_SIZE(backends); ++i) {
1366 for (j = 0; j < ARRAY_SIZE(combos); ++j) {
1367 struct drm_i915_gem_object *obj;
1368 u32 size = combos[j].size;
1369 u32 pages = combos[j].pages;
1371 obj = backends[i].fn(i915, size, backends[i].flags);
1374 if (err == -ENODEV) {
1375 pr_info("Device lacks local memory, skipping\n");
1383 err = i915_gem_object_pin_pages(obj);
1385 i915_gem_object_put(obj);
1389 GEM_BUG_ON(pages > obj->base.size);
1390 pages = pages & supported;
1393 obj->mm.page_sizes.sg = pages;
1395 err = igt_write_huge(ctx, obj);
1397 i915_gem_object_unpin_pages(obj);
1398 __i915_gem_object_put_pages(obj);
1399 i915_gem_object_put(obj);
1402 pr_err("%s write-huge failed with size=%u pages=%u i=%d, j=%d\n",
1403 __func__, size, pages, i, j);
1418 static int igt_tmpfs_fallback(void *arg)
1420 struct i915_gem_context *ctx = arg;
1421 struct drm_i915_private *i915 = ctx->i915;
1422 struct vfsmount *gemfs = i915->mm.gemfs;
1423 struct i915_address_space *vm = i915_gem_context_get_vm_rcu(ctx);
1424 struct drm_i915_gem_object *obj;
1425 struct i915_vma *vma;
1430 * Make sure that we don't burst into a ball of flames upon falling back
1431 * to tmpfs, which we rely on if on the off-chance we encouter a failure
1432 * when setting up gemfs.
1435 i915->mm.gemfs = NULL;
1437 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE);
1443 vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
1444 if (IS_ERR(vaddr)) {
1445 err = PTR_ERR(vaddr);
1448 *vaddr = 0xdeadbeaf;
1450 __i915_gem_object_flush_map(obj, 0, 64);
1451 i915_gem_object_unpin_map(obj);
1453 vma = i915_vma_instance(obj, vm, NULL);
1459 err = i915_vma_pin(vma, 0, 0, PIN_USER);
1463 err = igt_check_page_sizes(vma);
1465 i915_vma_unpin(vma);
1467 i915_gem_object_put(obj);
1469 i915->mm.gemfs = gemfs;
1475 static int igt_shrink_thp(void *arg)
1477 struct i915_gem_context *ctx = arg;
1478 struct drm_i915_private *i915 = ctx->i915;
1479 struct i915_address_space *vm = i915_gem_context_get_vm_rcu(ctx);
1480 struct drm_i915_gem_object *obj;
1481 struct i915_gem_engines_iter it;
1482 struct intel_context *ce;
1483 struct i915_vma *vma;
1484 unsigned int flags = PIN_USER;
1489 * Sanity check shrinking huge-paged object -- make sure nothing blows
1493 if (!igt_can_allocate_thp(i915)) {
1494 pr_info("missing THP support, skipping\n");
1498 obj = i915_gem_object_create_shmem(i915, SZ_2M);
1504 vma = i915_vma_instance(obj, vm, NULL);
1510 err = i915_vma_pin(vma, 0, 0, flags);
1514 if (obj->mm.page_sizes.phys < I915_GTT_PAGE_SIZE_2M) {
1515 pr_info("failed to allocate THP, finishing test early\n");
1519 err = igt_check_page_sizes(vma);
1525 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1526 if (!intel_engine_can_store_dword(ce->engine))
1529 err = gpu_write(ce, vma, n++, 0xdeadbeaf);
1533 i915_gem_context_unlock_engines(ctx);
1534 i915_vma_unpin(vma);
1539 * Now that the pages are *unpinned* shrink-all should invoke
1540 * shmem to truncate our pages.
1542 i915_gem_shrink_all(i915);
1543 if (i915_gem_object_has_pages(obj)) {
1544 pr_err("shrink-all didn't truncate the pages\n");
1549 if (obj->mm.page_sizes.sg || obj->mm.page_sizes.phys) {
1550 pr_err("residual page-size bits left\n");
1555 err = i915_vma_pin(vma, 0, 0, flags);
1560 err = cpu_check(obj, n, 0xdeadbeaf);
1566 i915_vma_unpin(vma);
1568 i915_gem_object_put(obj);
1575 int i915_gem_huge_page_mock_selftests(void)
1577 static const struct i915_subtest tests[] = {
1578 SUBTEST(igt_mock_exhaust_device_supported_pages),
1579 SUBTEST(igt_mock_memory_region_huge_pages),
1580 SUBTEST(igt_mock_ppgtt_misaligned_dma),
1581 SUBTEST(igt_mock_ppgtt_huge_fill),
1582 SUBTEST(igt_mock_ppgtt_64K),
1584 struct drm_i915_private *dev_priv;
1585 struct i915_ppgtt *ppgtt;
1588 dev_priv = mock_gem_device();
1592 /* Pretend to be a device which supports the 48b PPGTT */
1593 mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL;
1594 mkwrite_device_info(dev_priv)->ppgtt_size = 48;
1596 ppgtt = i915_ppgtt_create(&dev_priv->gt);
1597 if (IS_ERR(ppgtt)) {
1598 err = PTR_ERR(ppgtt);
1602 if (!i915_vm_is_4lvl(&ppgtt->vm)) {
1603 pr_err("failed to create 48b PPGTT\n");
1608 /* If we were ever hit this then it's time to mock the 64K scratch */
1609 if (!i915_vm_has_scratch_64K(&ppgtt->vm)) {
1610 pr_err("PPGTT missing 64K scratch page\n");
1615 err = i915_subtests(tests, ppgtt);
1618 i915_vm_put(&ppgtt->vm);
1620 mock_destroy_device(dev_priv);
1624 int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
1626 static const struct i915_subtest tests[] = {
1627 SUBTEST(igt_shrink_thp),
1628 SUBTEST(igt_tmpfs_fallback),
1629 SUBTEST(igt_ppgtt_smoke_huge),
1630 SUBTEST(igt_ppgtt_sanity_check),
1632 struct i915_gem_context *ctx;
1633 struct i915_address_space *vm;
1637 if (!HAS_PPGTT(i915)) {
1638 pr_info("PPGTT not supported, skipping live-selftests\n");
1642 if (intel_gt_is_wedged(&i915->gt))
1645 file = mock_file(i915);
1647 return PTR_ERR(file);
1649 ctx = live_context(i915, file);
1655 mutex_lock(&ctx->mutex);
1656 vm = i915_gem_context_vm(ctx);
1658 WRITE_ONCE(vm->scrub_64K, true);
1659 mutex_unlock(&ctx->mutex);
1661 err = i915_subtests(tests, ctx);