drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright 2012 Red Hat Inc
   5  */
   6
   7 #include <linux/dma-buf.h>
   8 #include <linux/highmem.h>
   9 #include <linux/dma-resv.h>
  10
  11 #include "i915_drv.h"
  12 #include "i915_gem_object.h"
  13 #include "i915_scatterlist.h"
  14
  15 static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
  16 {
  17         return to_intel_bo(buf->priv);
  18 }
  19
  20 static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,
  21                                              enum dma_data_direction dir)
  22 {
  23         struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
  24         struct sg_table *st;
  25         struct scatterlist *src, *dst;
  26         int ret, i;
  27
  28         ret = i915_gem_object_pin_pages(obj);
  29         if (ret)
  30                 goto err;
  31
  32         /* Copy sg so that we make an independent mapping */
  33         st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
  34         if (st == NULL) {
  35                 ret = -ENOMEM;
  36                 goto err_unpin_pages;
  37         }
  38
  39         ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
  40         if (ret)
  41                 goto err_free;
  42
  43         src = obj->mm.pages->sgl;
  44         dst = st->sgl;
  45         for (i = 0; i < obj->mm.pages->nents; i++) {
  46                 sg_set_page(dst, sg_page(src), src->length, 0);
  47                 dst = sg_next(dst);
  48                 src = sg_next(src);
  49         }
  50
  51         ret = dma_map_sgtable(attachment->dev, st, dir, DMA_ATTR_SKIP_CPU_SYNC);
  52         if (ret)
  53                 goto err_free_sg;
  54
  55         return st;
  56
  57 err_free_sg:
  58         sg_free_table(st);
  59 err_free:
  60         kfree(st);
  61 err_unpin_pages:
  62         i915_gem_object_unpin_pages(obj);
  63 err:
  64         return ERR_PTR(ret);
  65 }
  66
  67 static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
  68                                    struct sg_table *sg,
  69                                    enum dma_data_direction dir)
  70 {
  71         struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
  72
  73         dma_unmap_sgtable(attachment->dev, sg, dir, DMA_ATTR_SKIP_CPU_SYNC);
  74         sg_free_table(sg);
  75         kfree(sg);
  76
  77         i915_gem_object_unpin_pages(obj);
  78 }
  79
  80 static int i915_gem_dmabuf_vmap(struct dma_buf *dma_buf, struct dma_buf_map *map)
  81 {
  82         struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
  83         void *vaddr;
  84
  85         vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
  86         if (IS_ERR(vaddr))
  87                 return PTR_ERR(vaddr);
  88
  89         dma_buf_map_set_vaddr(map, vaddr);
  90
  91         return 0;
  92 }
  93
  94 static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, struct dma_buf_map *map)
  95 {
  96         struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
  97
  98         i915_gem_object_flush_map(obj);
  99         i915_gem_object_unpin_map(obj);
 100 }
 101
 102 static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
 103 {
 104         struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
 105         int ret;
 106
 107         if (obj->base.size < vma->vm_end - vma->vm_start)
 108                 return -EINVAL;
 109
 110         if (!obj->base.filp)
 111                 return -ENODEV;
 112
 113         ret = call_mmap(obj->base.filp, vma);
 114         if (ret)
 115                 return ret;
 116
 117         fput(vma->vm_file);
 118         vma->vm_file = get_file(obj->base.filp);
 119
 120         return 0;
 121 }
 122
 123 static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
 124 {
 125         struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
 126         bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);
 127         int err;
 128
 129         err = i915_gem_object_pin_pages(obj);
 130         if (err)
 131                 return err;
 132
 133         err = i915_gem_object_lock_interruptible(obj, NULL);
 134         if (err)
 135                 goto out;
 136
 137         err = i915_gem_object_set_to_cpu_domain(obj, write);
 138         i915_gem_object_unlock(obj);
 139
 140 out:
 141         i915_gem_object_unpin_pages(obj);
 142         return err;
 143 }
 144
 145 static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
 146 {
 147         struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
 148         int err;
 149
 150         err = i915_gem_object_pin_pages(obj);
 151         if (err)
 152                 return err;
 153
 154         err = i915_gem_object_lock_interruptible(obj, NULL);
 155         if (err)
 156                 goto out;
 157
 158         err = i915_gem_object_set_to_gtt_domain(obj, false);
 159         i915_gem_object_unlock(obj);
 160
 161 out:
 162         i915_gem_object_unpin_pages(obj);
 163         return err;
 164 }
 165
 166 static const struct dma_buf_ops i915_dmabuf_ops =  {
 167         .map_dma_buf = i915_gem_map_dma_buf,
 168         .unmap_dma_buf = i915_gem_unmap_dma_buf,
 169         .release = drm_gem_dmabuf_release,
 170         .mmap = i915_gem_dmabuf_mmap,
 171         .vmap = i915_gem_dmabuf_vmap,
 172         .vunmap = i915_gem_dmabuf_vunmap,
 173         .begin_cpu_access = i915_gem_begin_cpu_access,
 174         .end_cpu_access = i915_gem_end_cpu_access,
 175 };
 176
 177 struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int flags)
 178 {
 179         struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
 180         DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
 181
 182         exp_info.ops = &i915_dmabuf_ops;
 183         exp_info.size = gem_obj->size;
 184         exp_info.flags = flags;
 185         exp_info.priv = gem_obj;
 186         exp_info.resv = obj->base.resv;
 187
 188         if (obj->ops->dmabuf_export) {
 189                 int ret = obj->ops->dmabuf_export(obj);
 190                 if (ret)
 191                         return ERR_PTR(ret);
 192         }
 193
 194         return drm_gem_dmabuf_export(gem_obj->dev, &exp_info);
 195 }
 196
 197 static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
 198 {
 199         struct sg_table *pages;
 200         unsigned int sg_page_sizes;
 201
 202         pages = dma_buf_map_attachment(obj->base.import_attach,
 203                                        DMA_BIDIRECTIONAL);
 204         if (IS_ERR(pages))
 205                 return PTR_ERR(pages);
 206
 207         sg_page_sizes = i915_sg_page_sizes(pages->sgl);
 208
 209         __i915_gem_object_set_pages(obj, pages, sg_page_sizes);
 210
 211         return 0;
 212 }
 213
 214 static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
 215                                              struct sg_table *pages)
 216 {
 217         dma_buf_unmap_attachment(obj->base.import_attach, pages,
 218                                  DMA_BIDIRECTIONAL);
 219 }
 220
 221 static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
 222         .name = "i915_gem_object_dmabuf",
 223         .get_pages = i915_gem_object_get_pages_dmabuf,
 224         .put_pages = i915_gem_object_put_pages_dmabuf,
 225 };
 226
 227 struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
 228                                              struct dma_buf *dma_buf)
 229 {
 230         static struct lock_class_key lock_class;
 231         struct dma_buf_attachment *attach;
 232         struct drm_i915_gem_object *obj;
 233         int ret;
 234
 235         /* is this one of own objects? */
 236         if (dma_buf->ops == &i915_dmabuf_ops) {
 237                 obj = dma_buf_to_obj(dma_buf);
 238                 /* is it from our device? */
 239                 if (obj->base.dev == dev) {
 240                         /*
 241                          * Importing dmabuf exported from out own gem increases
 242                          * refcount on gem itself instead of f_count of dmabuf.
 243                          */
 244                         return &i915_gem_object_get(obj)->base;
 245                 }
 246         }
 247
 248         /* need to attach */
 249         attach = dma_buf_attach(dma_buf, dev->dev);
 250         if (IS_ERR(attach))
 251                 return ERR_CAST(attach);
 252
 253         get_dma_buf(dma_buf);
 254
 255         obj = i915_gem_object_alloc();
 256         if (obj == NULL) {
 257                 ret = -ENOMEM;
 258                 goto fail_detach;
 259         }
 260
 261         drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
 262         i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops, &lock_class);
 263         obj->base.import_attach = attach;
 264         obj->base.resv = dma_buf->resv;
 265
 266         /* We use GTT as shorthand for a coherent domain, one that is
 267          * neither in the GPU cache nor in the CPU cache, where all
 268          * writes are immediately visible in memory. (That's not strictly
 269          * true, but it's close! There are internal buffers such as the
 270          * write-combined buffer or a delay through the chipset for GTT
 271          * writes that do require us to treat GTT as a separate cache domain.)
 272          */
 273         obj->read_domains = I915_GEM_DOMAIN_GTT;
 274         obj->write_domain = 0;
 275
 276         return &obj->base;
 277
 278 fail_detach:
 279         dma_buf_detach(dma_buf, attach);
 280         dma_buf_put(dma_buf);
 281
 282         return ERR_PTR(ret);
 283 }
 284
 285 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 286 #include "selftests/mock_dmabuf.c"
 287 #include "selftests/i915_gem_dmabuf.c"
 288 #endif