2 * SPDX-License-Identifier: MIT
4 * Copyright 2012 Red Hat Inc
7 #include <linux/dma-buf.h>
8 #include <linux/highmem.h>
9 #include <linux/dma-resv.h>
12 #include "i915_gem_object.h"
13 #include "i915_scatterlist.h"
15 static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
17 return to_intel_bo(buf->priv);
20 static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,
21 enum dma_data_direction dir)
23 struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
25 struct scatterlist *src, *dst;
28 ret = i915_gem_object_pin_pages_unlocked(obj);
32 /* Copy sg so that we make an independent mapping */
33 st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
39 ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
43 src = obj->mm.pages->sgl;
45 for (i = 0; i < obj->mm.pages->nents; i++) {
46 sg_set_page(dst, sg_page(src), src->length, 0);
51 ret = dma_map_sgtable(attachment->dev, st, dir, DMA_ATTR_SKIP_CPU_SYNC);
62 i915_gem_object_unpin_pages(obj);
67 static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
69 enum dma_data_direction dir)
71 struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
73 dma_unmap_sgtable(attachment->dev, sg, dir, DMA_ATTR_SKIP_CPU_SYNC);
77 i915_gem_object_unpin_pages(obj);
80 static int i915_gem_dmabuf_vmap(struct dma_buf *dma_buf, struct dma_buf_map *map)
82 struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
85 vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
87 return PTR_ERR(vaddr);
89 dma_buf_map_set_vaddr(map, vaddr);
94 static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, struct dma_buf_map *map)
96 struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
98 i915_gem_object_flush_map(obj);
99 i915_gem_object_unpin_map(obj);
102 static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
104 struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
107 if (obj->base.size < vma->vm_end - vma->vm_start)
113 ret = call_mmap(obj->base.filp, vma);
117 vma_set_file(vma, obj->base.filp);
122 static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
124 struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
125 bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);
126 struct i915_gem_ww_ctx ww;
129 i915_gem_ww_ctx_init(&ww, true);
131 err = i915_gem_object_lock(obj, &ww);
133 err = i915_gem_object_pin_pages(obj);
135 err = i915_gem_object_set_to_cpu_domain(obj, write);
136 i915_gem_object_unpin_pages(obj);
138 if (err == -EDEADLK) {
139 err = i915_gem_ww_ctx_backoff(&ww);
143 i915_gem_ww_ctx_fini(&ww);
147 static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
149 struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
150 struct i915_gem_ww_ctx ww;
153 i915_gem_ww_ctx_init(&ww, true);
155 err = i915_gem_object_lock(obj, &ww);
157 err = i915_gem_object_pin_pages(obj);
159 err = i915_gem_object_set_to_gtt_domain(obj, false);
160 i915_gem_object_unpin_pages(obj);
162 if (err == -EDEADLK) {
163 err = i915_gem_ww_ctx_backoff(&ww);
167 i915_gem_ww_ctx_fini(&ww);
171 static const struct dma_buf_ops i915_dmabuf_ops = {
172 .map_dma_buf = i915_gem_map_dma_buf,
173 .unmap_dma_buf = i915_gem_unmap_dma_buf,
174 .release = drm_gem_dmabuf_release,
175 .mmap = i915_gem_dmabuf_mmap,
176 .vmap = i915_gem_dmabuf_vmap,
177 .vunmap = i915_gem_dmabuf_vunmap,
178 .begin_cpu_access = i915_gem_begin_cpu_access,
179 .end_cpu_access = i915_gem_end_cpu_access,
182 struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int flags)
184 struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
185 DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
187 exp_info.ops = &i915_dmabuf_ops;
188 exp_info.size = gem_obj->size;
189 exp_info.flags = flags;
190 exp_info.priv = gem_obj;
191 exp_info.resv = obj->base.resv;
193 if (obj->ops->dmabuf_export) {
194 int ret = obj->ops->dmabuf_export(obj);
199 return drm_gem_dmabuf_export(gem_obj->dev, &exp_info);
202 static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
204 struct sg_table *pages;
205 unsigned int sg_page_sizes;
207 pages = dma_buf_map_attachment(obj->base.import_attach,
210 return PTR_ERR(pages);
212 sg_page_sizes = i915_sg_page_sizes(pages->sgl);
214 __i915_gem_object_set_pages(obj, pages, sg_page_sizes);
219 static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
220 struct sg_table *pages)
222 dma_buf_unmap_attachment(obj->base.import_attach, pages,
226 static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
227 .name = "i915_gem_object_dmabuf",
228 .get_pages = i915_gem_object_get_pages_dmabuf,
229 .put_pages = i915_gem_object_put_pages_dmabuf,
232 struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
233 struct dma_buf *dma_buf)
235 static struct lock_class_key lock_class;
236 struct dma_buf_attachment *attach;
237 struct drm_i915_gem_object *obj;
240 /* is this one of own objects? */
241 if (dma_buf->ops == &i915_dmabuf_ops) {
242 obj = dma_buf_to_obj(dma_buf);
243 /* is it from our device? */
244 if (obj->base.dev == dev) {
246 * Importing dmabuf exported from out own gem increases
247 * refcount on gem itself instead of f_count of dmabuf.
249 return &i915_gem_object_get(obj)->base;
253 if (i915_gem_object_size_2big(dma_buf->size))
254 return ERR_PTR(-E2BIG);
257 attach = dma_buf_attach(dma_buf, dev->dev);
259 return ERR_CAST(attach);
261 get_dma_buf(dma_buf);
263 obj = i915_gem_object_alloc();
269 drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
270 i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops, &lock_class, 0);
271 obj->base.import_attach = attach;
272 obj->base.resv = dma_buf->resv;
274 /* We use GTT as shorthand for a coherent domain, one that is
275 * neither in the GPU cache nor in the CPU cache, where all
276 * writes are immediately visible in memory. (That's not strictly
277 * true, but it's close! There are internal buffers such as the
278 * write-combined buffer or a delay through the chipset for GTT
279 * writes that do require us to treat GTT as a separate cache domain.)
281 obj->read_domains = I915_GEM_DOMAIN_GTT;
282 obj->write_domain = 0;
287 dma_buf_detach(dma_buf, attach);
288 dma_buf_put(dma_buf);
293 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
294 #include "selftests/mock_dmabuf.c"
295 #include "selftests/i915_gem_dmabuf.c"